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Transcript
International Journal of Electrical, Electronics and Data Communication, ISSN: 2320-2084
Volume-2, Issue-4, April-2014
INTERLINE UNIFIED POWER QUALITY CONDITIONER: DESIGN
AND SIMULATION
1
V.S.VENKATESAN, 2P.CHANDHRA SEKHAR, 3R.A.DESHPANDE, 4V.MURALIDHARA
1,2,3
Distribution Systems Division Central Power Research Institute, Bangalore
4
Associate Director & Prof. of EEE SET, Jain University, Bangalore
Email: [email protected], [email protected], [email protected], [email protected]
Abstract—This paper proposes a new connection for a UPQC to improve the power quality of two feeders in a distribution
system. A UPQC consists of a series dynamic-voltage restorer (DVR) and a shunt active power filter (APF) both joined
together by a common dc bus. It is demonstrated how this device can be connected between two independent feeders to
regulate the bus voltage of one of the feeders while regulating the current across a load in the other feeder. Since the UPQC
is connected between two different feeders (lines), this connection of the UPQC will be called an interline UPQC (IUPQC).
The structure, control and capability of the IUPQC are discussed in this paper. The efficacy of the proposed configuration has
been verified through simulation studies using Matlab.
Keywords— Distribution System, Interline Unified Power Quality Conditioner (IUPQC), Power Quality.
I.
To define power quality, the following terms are used
1. Long duration voltage variations (over voltage,
under voltage, sustained interruption)
2. Short duration voltage variations (sag, swell,
interruption, flicker)
3. Transients
4. Voltage imbalance
5. Voltage fluctuations
6. Wave form distortion
7. Power frequency variations/ transients
INTRODUCTION
Power quality is defined as the concept of powering
and grounding electronic equipment in a manner that
is suitable to the operation of that equipment and
compatible with the premise wiring system and other
connected equipment in Institute of Electrical and
Electronics Engineers (IEEE) Standard 1159-2009.
International Electrotechnical Commission (IEC)
defined power quality as set of parameters defining the
properties of power quality as delivered to the user in
terms
of
supply
and
characteristics
of
voltage(frequency and magnitude).
The most significant and critical power quality
problems are voltage sags, voltage swells and current
harmonics which are shown in Figure 1, 2 and 3
respectively.
The causes of power quality problems can be classified
into two categories
Voltage Sags:
First categories:
These are natural phenomenon.
 Lightning strikes on transmission line (or)
distribution feeders.
 Falling of tree branches on transmission line (or)
distribution feeders.
Figure 1. Voltage Sag Waveform
Sag is a decrease in the rms voltage from 0.1 pu to 0.8
pu for a time period less than 1 minute. As per IEC
standard voltage sags are referred by a term called dip.
A 20% of sag will decrease the nominal voltage to
80% (or) 0.8 pu.
For e.g. if an induction motor is stared it may draw 6 to
8 times the rated load current and finally resulting in a
voltage sag.
Second categories:
This category contributes to voltage sags, voltage
swells, harmonics, etc.,
 Transformer energization.
 Usage of power electronics loads like UPS, ASDS,
etc.,
 Capacitor or feeder switching.
 Arc furnace operation.
 Heating systems.
 Switching ON/OFF of large loads.
 Lighting systems.
Voltage Swells:
Figure 2. Voltage Swell Waveform
Interline Unified Power Quality Conditioner: Design And Simulation
57
International Journal of Electrical, Electronics and Data Communication, ISSN: 2320-2084
A swell is defined as the increase in the fundamental
frequency voltage from 1.1 pu to 1.8 pu for a time
period less than 1 minute. Sometimes voltage swells
can be experienced by an unfaulted phase during a
single line ground fault. The severity of the swell
depends on fault location, system impedance and
grounding.
Volume-2, Issue-4, April-2014
Interline Unified Power Quality Conditioner (IUPQC)
is a relatively new member of the custom power
device. It is a combination of shunt and series
compensators. Generally power quality problems arise
either because of supply voltage distortion or because
of load current distortion. Since a UPQC has both
series and shunt compensators, it can handle supply
voltage and load current problem simultaneously
when installed at the point of common coupling. It can
protect sensitive loads from power quality events
arising from the utility side and at the same time can
stop the disturbance being injected in to the utility
from load side. To improve the quality of power for
non-linear and voltage sensitive load UPQC is one of
the best solution.
Each of the two VSCs is realized by three H-bridge
inverters. In its structure, each switch represents a
power semiconductor device (IGBT- Insulated Gate
Bipolar Transistor) and an anti-parallel diode. All the
inverters are supplied from a common single dc
capacitor Cdc and each inverter has a transformer
connected at its output.
Series inverter control: Sag/ swell detection, voltage
reference generation, voltage injection strategies and
methods for generating of gating signals.
Shunt inverter control: Current reference generation,
methods for generating of gating signals and capacitor
voltage control.
The complete structure of a three-phase IUPQC with
two such VSCs is shown in Figure.4 The distribution
sides of the shunt-connected transformers (VSC-1) are
connected in star with the neutral point being
connected to the load neutral. The secondary winding
of the series-connected transformers (VSC-2) are
directly connected in series with the bus B-2 and load
L-2. The ac filter capacitors Cf and Ck are also
connected in each phase to prevent the flow of the
harmonic currents generated due to switching. The six
inverters of the IUPQC are controlled independently.
The switching action is obtained using output
feedback control.
The feeder impedances are denoted by the pairs (Rs1,
Ls1) and (Rs2, Ls2). It can be seen that the two feeders
supply the loads L-1 and L-2. The load L-1 is assumed
to have two separate components an unbalanced part
(L-11) and a non-linear part (L-12). The currents
drawn by these two loads are denoted by il1 and il2,
respectively. We further assume that the load L-2 is a
sensitive load that requires uninterrupted and
regulated voltage.
The shunt VSC (VSC-1) is connected to bus B-1 at the
end of Feeder-1, while the series VSC (VSC-2) is
connected at bus B-2 at the end of Feeder-2. The
voltages of buses B-1 and B-2 and across the sensitive
load terminal are denoted by Vt1, Vt2, and Vl2,
respectively.
II.
III.
Current Harmonic Distortion:
Figure 3. Current Harmonic Distortion Waveform
The harmonic voltage and current distortion are
strongly linked with each other because harmonic
voltage distortion is mainly due to non-sinusoidal load
current. Current harmonic distortion requires over
rating of series components like transformer and
cables. As the series resistance increases with
frequency, a distorted current will cause more losses
than a sinusoidal current of the same rms value.
INTERLINE UNIFIED POWER QUALITY
CONDITIONER
CONTROL SCHEME
The voltage compensation signal Verror is compared
with a fixed frequency carrier wave to generate the
firing pulses as Pulse Width Modulation (PWM)
signals as shown in Figure. 5. The voltage in the same
phase with supply side generated by voltage source
inverter is injected to the load side.
The Interline Unified Power Quality Conditioner
(IUPQC) consists of two Voltage Source Converters
(VSC-1 and VSC-2) that are connected back to back
through a common energy storage dc capacitor.
The VSC-1 is connected in shunt to feeder-1 while the
VSC-2 is connected in series with feeder-2.
Figure 4. Typical IUPQC connected in a distribution system
Figure 5. Generation of PWM gate signals
Interline Unified Power Quality Conditioner: Design And Simulation
58
International Journal of Electrical, Electronics and Data Communication, ISSN: 2320-2084
The VSC switching strategy is based on a sinusoidal
PWM technique which offers simplicity and good
response. Since custom power is a relatively low
power application, PWM methods offer a more
flexible option than the fundamental frequency
switching (FFS) methods favored in FACTS
applications. Besides, high switching frequencies can
be used to improve the efficiency of the converter,
without incurring significant switching losses. The
shunt bidirectional converter that is connected
through an inductor in parallel with the load terminals
accomplishes three functions simultaneously. It
injects reactive current to compensate current
harmonics of the load. It provides reactive power for
the load and there by improve power factor of the
system. It also draws the fundamental current to
compensate the power loss of the system and make the
voltage of DC capacitor constant.
V.
Volume-2, Issue-4, April-2014
SIMULATION RESULTS
The simulation results are presented to show the
performance of IUPQC for harmonic elimination and
swell mitigation
1) Without IUPQC
The voltage of bus B-1 and load L-1 currents, when no
IUPQC is connected to the distribution system are
shown in figure 7, 8 and 9. All the figures showing
three phase waveforms the phases A, B and C are
showed by red, yellow and green lines respectively.
Figure 7 (a), (b) and (c) that due to the presence of
unbalanced and nonlinear load L-1, the voltage Vt1 is
both unbalanced and distorted.
x 10
V o lta g e (V )
2
4
Va
0
-2
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
Time(Sec)
IV.
SIMULATION MODEL OF THE IUPQC
Figure 7. (a) Instantaneous load voltage (A Phase)
x 10
2
V o lt a g e (V )
The simulation model of IUPQC is shown in Figure 6
4
Vb
0
-2
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
Time(Sec)
Figure 7. (b) Instantaneous load voltage (B Phase)
x 10
V o l ta g e (V )
2
4
Vc
0
-2
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
Time(Sec)
Figure 7. (c) Instantaneous load voltage (C Phase)
Figure 8 (a), (b) and (c) the load L-11 causes an unbalanced in
the current il12.
L11 Ia
C u rre n t (A )
200
0
-200
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
Time(Sec)
Figure 8. (a) Instantaneous load (L11) current (A Phase)
L11 Ib
C u rre n t(A )
200
0
-200
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
Time(Sec)
Figure 8. (b) Instantaneous load (L11) current (B Phase)
L11 Ic
C u rre n t (A )
100
0
-100
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
Time(Sec)
Figure 8. (c) Instantaneous load (L11) current (C Phase)
Figure 9 (a), (b) and (c) the load L-12 causes distortion in the
current il11.
Figure 6. Simulation Model of IUPQC
Interline Unified Power Quality Conditioner: Design And Simulation
59
International Journal of Electrical, Electronics and Data Communication, ISSN: 2320-2084
L12 Ia
200
100
V o lt a g e ( V )
C u rre n t (A )
100
0
-100
Volume-2, Issue-4, April-2014
0
-100
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
Time(Sec)
-200
Figure 9. (a) Instantaneous load (L12) current (A Phase)
0
0.05
0.1
0.15
0.2
L12 Ib
C u rre n t (A )
100
0.25
Time(Sec)
0.3
0.35
0.4
0.45
0.5
Figure 13. B-2 bus voltages (Vt2)
The dc capacitor voltage Vdc is shown in figure 14
0
Vdc
-100
0
0.05
0.1
0.15
0.2
0.25
0.3
6000
0.35
V o lt a g e ( V )
Time(Sec)
4000
Figure 9. (b) Instantaneous load (L12) current (B Phase)
L12 Ic
2000
C u rre n t (A )
100
0
0
-100
0.05
0.1
0.15
0.2
0.25
0.3
0.06
0.08
0.1
Time(Sec)
0.12
0.14
0.16
0.18
0.2
Mitigation of Voltage Swell
A three phase supply voltage (11kv, 50Hz) with
momentary swell of 0.15 pu magnitude and the
duration about 0.2 to 20 cycles is taken.
2) With IUPQC
The figures 10, 11, 12 and 13 showing three phase
waveforms the phases A, B and C are showed by red,
blue and green lines respectively.
Figure 10 and 11 shows the three phase B-1 voltages
Vt1 are perfectly balanced and once the voltage
become balanced the current drawn by feeder-1 is1
also become balance.
x 10
1) Without IUPQC
The system generated swells waveform shown in
Figure 15
400
4
200
V o lt a g e ( V )
V o l t a g e (V )
0.04
0.35
Time(Sec)
0
0
-200
-400
-1
0.02
Figure 14. Vdc voltage
0
Figure 9. (c) Instantaneous load (L12) current (C Phase)
1
0
0
0.05
0.1
0.15
0.2
0.25
Time(Sec)
0.3
0.35
0.4
0.45
0
0.05
0.1
0.15
0.5
0.2
Time(Sec)
0.25
0.3
0.35
0.4
Figure 15. System with voltage swells
Figure 10. B-1 bus voltages (Vt1)
4
C u rr e n t (A )
2
x 10
2) With IUPQC
The system mitigated swells waveform shown in
Figure 16
0
2
0
0.05
0.1
0.15
0.2
0.25
Time(Sec)
0.3
0.35
0.4
0.45
0.5
V o lt a g e (V )
-2
Figure 11. Feeder-1 currents (is1)
V o lta g e (V )
2
x 10
0
0.1
0.15
0.2
0.25
Time(Sec)
0.3
0.35
0.4
0.45
0.05
0.1
0.15
0.2
Time(Sec)
0.25
0.3
0.35
0.4
CONCLUSION
4
0.05
0
Figure 16. System with mitigated voltage swells
This paper describes a new connection for a unified
power quality conditioner (UPQC) to improve
the power quality of two feeders in a distribution
system. It is demonstrated how this device is
connected between two independent feeders to
regulate the bus voltage of one of the feeders while
0
-2
4
0
-2
Figure 12 and 13 shows the load L-2 bus voltages Vl2
are also perfectly sinusoidal with the desired peak the
converter VSC-2 injects the required voltage in the
system and the bus B-2 voltages Vt2 can be seen to
have a much smaller magnitude.
x 10
0.5
Figure 12. L-2 load voltages (Vl2)
Interline Unified Power Quality Conditioner: Design And Simulation
60
International Journal of Electrical, Electronics and Data Communication, ISSN: 2320-2084
Volume-2, Issue-4, April-2014
[4] Ghosh and G. Ledwich, “Power Quality Enhancement Using
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[5] J. Holtz, “Pulse width modulation—A survey,” IEEE Trans.
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[6] F. Z. Peng and J. S. Lai, “Generalized instantaneous reactive
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[8] M. K. Mishra, A. Ghosh, and A. Joshi, “Operation of a
DSTATCOM in voltage control mode,” IEEE Trans. Power
Del., vol. 18, no. 1, pp.258–264, Jan. 2003.
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conditioner for voltage regulation of critical load bus,” in Proc.
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(UPQC) for simultaneous voltage and current compensation,”
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[11] N.H. Woodley, A.Sundaram, B. Coulter and D.Moris,
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[13] R. C. Dugan, M. F. McGranaghan, S. Santoso, and H. W. Beaty,
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McGraw-Hill, 2003, ch. 8.
regulating the current across a load in the other feeder.
From the result, it can be concluded that, whenever
there is a voltage swell in either of the feeders, one
feeder readily compensates for the other. The
structure, control and capability of the IUPQC have
been discussed in this paper. The efficacy of the
proposed configuration has been verified through
simulation studies using Matlab. For all the types of
disturbances the Total Harmonic Distortion (THD)
after compensation is to be less than 5% which is as
per IEEE standards.
ACKNOWLEDGMENT
The authors wish to thank the management of Central
Power Research Institute, Bangalore for permitting to
publish this paper.
REFERENCES
[1] “Understanding Power Quality Problems, Voltage Sags and
Interruptions” By Math.HJ .Bollen
[2] “Electrical Power Systems Quality” Second Edition, by Roger
C. Dugan/ Mark F. Mc Granaghan, Surya Santoso/ H. Wayne
Beaty
[3] H. Fujita and H. Akagi, “The unified power quality conditioner:
The integration of series and shunt active filters”, IEEE
Transactions on Power Electronics”, Vol 13, No. 2, Mar. 1998
pp. 315-322.

Interline Unified Power Quality Conditioner: Design And Simulation
61