Download R09 SET-1 Code No: R09221902

Code No: R09221902
R09
SET-1
B.Tech II Year - II Semester Examinations, December-2011 / January-2012
ANALOG AND DIGITAL IC APPLICATIONS
(ELECTRONICS & COMPUTER ENGINEERING)
Time: 3 hours
Max. Marks: 75
Answer any five questions
All questions carry equal marks
--1.a)
b)
2.a)
b)
Draw the Pin Diagram and Schematic Symbol of a typical Op-amp IC 741 and
explain the function of each Pin. Also Discuss its Features.
An op-amp with a slew rate = 0.5V/µs is used as an inverting amplifier to obtain a
gain of 100. The voltage gain Vs frequency characteristic of the amplifier is flat up
to 10 KHz. Determine
i) The maximum peak-to-peak input signal that can be applied without any distortion
to the output.
ii) The maximum frequency of the input signal to obtain a sine wave output of 2V
peak.
[8+7]
Show with the help of Circuit diagram, an IC 741 Op-amp used as
i) Inverting Adder
ii) Non Inverting Adder.
Draw an Op-amp circuit whose output is V1+V2-V3-V4 .
Find the condition to keep the LED ‘ON’ in the figure given below Figure.1. [10+5]
Figure.1
3.a)
b)
4.a)
b)
5.a)
b)
c)
Justify the below statement
“At very high time constant the Low Pass Butter Worth Filter acts as an Integrator”.
Construct the RC phase shift Oscillator using IC 741 Op-amp. Derive the
condition for the Sustained Oscillation and the Frequency of Oscillation of the
output signal.
[5+10]
Explain the operation of Astable Multivibrator using 555 Timer and Derive the
expression for the frequency of its output Square wave.
Give the functional block diagram of VCO NE566 and explain its working and
derive the necessary expression for free running frequency.
[8+7]
Compare R – 2R and Weight resistor types of DACs.
Write short notes on A/d Converters.
Define the following terms as related to DAC:
i) Linearity
ii) Resolution.
1
[7+4+4]
6.a)
b)
What is meant by Tri-state logic? Draw the circuit of Tri-state TTL logic and
explain its functions.
Draw the schematic circuit of TTL active pull-up NAND gate and explain its
operation with the help of Truth-Table.
[8+7]
7.a)
b)
Design 1:8 Demultiplexer using two 1:4 Demultiplexer.
Design 3 to 8 Decoder using 74×138 ICs.
[8+7]
8.a)
b)
Design a conversion circuit to convert a D flip-flop to J-K flip-flop.
Design a 4-bit binary synchronous counter using 74×74 ICs.
[7+8]
********
2
Code No: R09221902
R09
SET-2
B.Tech II Year - II Semester Examinations, December-2011 / January-2012
ANALOG AND DIGITAL IC APPLICATIONS
(ELECTRONICS & COMPUTER ENGINEERING)
Time: 3 hours
Max. Marks: 75
Answer any five questions
All questions carry equal marks
--1.a) What are the Four Differential Amplifier Configurations? Compare and Contrast
these configurations with Circuit Diagrams.
b) For an Op-Amp, PSRR=70dB, CMRR=105, differential mode gain Ad=105. The
output voltage changes by 20V in 4μsec. Calculate
i) Numerical value of SVRR
ii) Common mode gain Ac
iii) Slew rate of the Op-Amp.
[10+5]
2.a)
b)
Explain how to get the Square and Square root of the given Analog signal using IC
741 Op-amp.
Define Comparator. Draw the Characteristics of an ideal Comparator and Practical
Comparator. List different types and applications of Comparator.
[9+6]
3.a)
b)
c)
Draw the Circuit Diagram of Low Pass Butter Worth Filter and derive its Gain.
Explain the difference between Signal Generator, Function Generator and Oscillator.
Design an RC phase shift oscillator for 300HZ frequency using IC µA 741 and ±15V
power supplies. Assume necessary component values.
[5+5+5]
4.a)
b)
Design a 555 Astable multivibrator to operate at 10 KHz with 40% duty cycle.
Give the functional block diagram of NE 565 PLL and for the given component
values. C1 = 390PF, C2 = 680PF and R1 = 10k,Vcc = ± 6V. Find
i) The free running frequency.
ii) The lock range and capture range.
Where C1 is the capacitor connected between pin number 9 and - VCC, C2 is
the capacitor connected between + VCC and output pin 7, and R1 is connected
between pin number 8 and + VCC.
[7+8]
5.a)
With a neat sketch explain the operation of an n-bit Weighted Resistor DAC and
obtain expression for its output.
Which is the fastest ADC, explain the operation and discuss its merits & de-merits?
[8+7]
b)
6.a)
b)
Design CMOS transistor circuit for 2-input AND gate. With the help of function
table explain the circuit.
Draw the resistive model of a CMOS inverter and explain its behavior for LOW
and HIGH outputs.
[8+7]
7.a)
b)
Explain the necessity of tri state buffer.
Design a 16-bit comparator using 74×85 ICs.
8.a)
b)
Explain 4 bit serial in parallel out register.
Draw the circuit of edge trigged SR flip flop made up of by basic gates & explain
the operation. Sketch the wave form.
[7+8]
********
3
[7+8]
Code No: R09221902
R09
SET-3
B.Tech II Year - II Semester Examinations, December-2011 / January-2012
ANALOG AND DIGITAL IC APPLICATIONS
(ELECTRONICS & COMPUTER ENGINEERING)
Time: 3 hours
Max. Marks: 75
Answer any five questions
All questions carry equal marks
--1.a)
b)
2.a)
b)
3.a)
b)
4.a)
b)
5.a)
b)
c)
Derive closed loop Voltage gain, input resistance, output resistance and band width
for Op- amp inverting amplifier with feedback arrangement.
In an Op-amp, V2=0 (inverting terminal input). What is the voltage at V1 (non
inverting terminal input) for an output of 5v if AOL=50000.
[10+5]
What is Regenerative comparator? Explain the operation of Regenerative
comparator with the help of Op-amp circuit diagram and calculate the Threshold
levels and Hysteresis width.
Construct the non-inverting integrator circuit by applying the input at non-inverting
terminal of Op-amp and derive the expression for output voltage.
[10+5]
Design a Butterworth active low pass filter for a given normalized polynomial of
s2+1.414s+1 at a cut-off frequency of 5 KHz.
Draw the circuit of a Op-amp based triangular-wave generator, explain its operation
and derive expressions for frequency of oscillations.
[7+8]
Explain the operation of Monostable Multivibrator using 555 timer and derive the
expression for output pulse width.
Draw the circuit of PLL as frequency multiplier and explain its working.
[9+6]
Define the following terms as related to DAC:
i) Linearity
ii) Resolution.
Define the following terms as related to ADC
i) Conversion time
ii) Percentage Resolution
Which type of DAC is more preferable? Draw the circuit diagram and obtain
expression for output voltage for 4 bits.
[4+4+7]
6.
List out standard TTL Characteristics and explain them briefly with necessary
diagrams.
[15]
7.a)
b)
Design a serial binary adder.
Design a full subtractor with logic gates.
8.a)
b)
Explain 4 bit serial in parallel out register.
Draw the circuit of edge trigged SR flip flop made up of basic gates & explain
the operation. Sketch the wave form.
[7+8]
********
4
[8+7]
Code No: R09221902
R09
SET-4
B.Tech II Year - II Semester Examinations, December-2011 / January-2012
ANALOG AND DIGITAL IC APPLICATIONS
(ELECTRONICS & COMPUTER ENGINEERING)
Time: 3 hours
Max. Marks: 75
Answer any five questions
All questions carry equal marks
--1.a)
b)
Define CMRR. Derive the expression for CMRR for practical Op-amp.
The CMRR of an Op-amp is 80dB. Two sets of signals are applied to it. First set is
V1= +20µV and V2= -20 µV and second set is V1= 540 µV and V2=500 µV.
Calculate the percent difference in output voltage for the two sets of signals. [8+7]
2.a)
Justify the below statement
“At very less time constant the High Pass Butter Worth Filter acts as Differentiator”
Explain the operation of Square wave form generator using Op-amp by drawing the
capacitor and output voltage waveforms and derive the expression for the output
square wave.
[5+10]
b)
3.a)
b)
4.a)
b)
5.a)
b)
c)
Draw the schematic diagram for fourth order low pass Butter Worth filter using
Op- amp and derive its Gain.
Draw the PIN Diagram & functional block diagram of NE566 VCO and explain its
working and derive expression for its free running frequency.
[7+8]
Design a Monostable Multivibrator using 555 timer to produce a pulse width of
100 msec.
Analyze the behavior of an analog phase detector through necessary circuit
diagram, waveforms, mathematical expressions and characteristic curves.
[7+8]
Explain how the deficiencies of weighted resister type DAC can be overcome
through an R-2R ladder type network. Explain the conversion procedure in R-2R
ladder type DAC.
Define the terms ‘Resolution’, ‘Conversion time’ and ‘Linearity’ of an Analog to
Digital converter.
What is the resolution of a 11-bit Analog to Digital converter for a full scale input
voltage of 10.24 volts.
[7+4+4]
6.a)
b)
c)
List out the advantages of CMOS logic.
Draw the circuit of CMOS NOR gate and verify the Boolean function.
Give the working principle of I2 L logic with neat circuit diagram.
7.a)
b)
Design 1:8 Demultiplexer using two 1:4 Demultiplexer.
Write short notes on full subtractor.
[8+7]
8.a)
b)
Write a note on applications, advantages and disadvantages of SRAM.
Design MOD 6 synchronous counter.
[8+7]
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5
[5+5+5]