Download Resistor-Transistor Logic

Digital Electronics
Lab # 06
Resistor-Transistor Logic
Consider the most basic transistor circuit, such as the one shown to the left. We will only be applying one of two
voltages to the input I: 0 volts (logic 0) or +V volts (logic 1). The exact voltage used as +V depends on
the circuit design parameters; in RTL integrated circuits, the usual voltage is +3.6v. We'll assume an
ordinary NPN transistor here, with a reasonable dc current gain, an emitter-base forward voltage of 0.65
volt, and a collector-emitter saturation voltage no higher than 0.3 volt. In standard RTL ICs, the base
resistor is 470 and the collector resistor is 640 .
When the input voltage is zero volts (actually, anything under 0.5 volt), there is no forward
bias to the emitter-base junction, and the transistor does not conduct. Therefore no current
flows through the collector resistor, and the output voltage is +V volts. Hence, a logic 0 input
results in a logic 1 output.
When the input voltage is +V volts, the transistor's emitter-base junction will clearly be
forward biased. For those who like the mathematics, we'll assume a similar output circuit
connected to this input. Thus, we'll have a voltage of 3.6 - 0.65 = 2.95 volts applied across a
series combination of a 640 output resistor and a 470 input resistor. This gives us a base
current of:
2.95v / 1110 = 0.0026576577 amperes = 2.66 ma.
RTL is a relatively old technology, and the transistors used in RTL ICs have a dc forward current gain of
around 30. If we assume a current gain of 30, 2.66 ma base current will support a maximum of 79.8 ma
collector current. However, if we drop all but 0.3 volts across the 640 collector resistor, it will carry
3.3/640 = 5.1 ma. Therefore this transistor is indeed fully saturated; it is turned on as hard as it can be.
With a logic 1 input, then, this circuit produces a logic 0 output. We have already seen that
a logic 0 input will produce a logic 1 output. Hence, this is a basic inverter circuit.
As we can see from the above calculations, the amount of current provided to the base of
the transistor is far more than is necessary to drive the transistor into saturation. Therefore, we
have the possibility of using one output to drive multiple inputs of other gates, and of having
gates with multiple input resistors. Such a circuit is shown to the right.
In this circuit, we have four input resistors. Raising any one input to +3.6 volts will be
sufficient to turn the transistor on, and applying additional logic 1 (+3.6 volt) inputs will not
really have any appreciable effect on the output voltage. Remember that the forward bias
voltage on the transistor's base will not exceed 0.65 volt, so the current through a grounded
input resistor will not exceed 0.65v/470 = 1.383 ma. This does provide us with a practical
limit on the number of allowable input resistors to a single transistor, but doesn't cause any
serious problems within that limit.
The RTL gate shown above will work, but has a problem due to possible signal interactions
through the multiple input resistors. A better way to implement the NOR function is shown to
the left.
Here, each transistor has only one input resistor, so there is no interaction between inputs.
The NOR function is performed at the common collector connection of all transistors, which
share a single collector load resistor.
This is in fact the pattern for all standard RTL ICs. The very commonly-used µL914 is a
dual two-input NOR gate, where each gate is a two-transistor version of the circuit to the left. It
is rated to draw 12 ma of current from the 3.6V power supply when both outputs are at logic 0.
This corresponds quite well with the calculations we have already made.
Standard fan-out for RTL gates is rated at 16. However, the fan-in for a standard RTL gate
input is 3. Thus, a gate can produce 16 units of drive current from the output, but requires 3
units to drive an input. There are low-power versions of these gates that increase the values of
the base and collector resistors to 1.5K and 3.6K, respectively. Such gates demand less current,
and typically have a fan-in of 1 and a fan-out of 2 or 3. They also have reduced frequency
response, so they cannot operate as rapidly as the standard gates. To get greater output drive
capabilities, buffers are used. These are typically inverters which have been designed with a
fan-out of 80. They also have a fan-in requirement of 6, since they use pairs of input transistors
to get increased drive.
We can get a NAND function in either of two ways. We can simply invert the inputs to the
NOR/OR gate, thus turning it into an AND/NAND gate, or we can use the circuit shown to the
right.
In this circuit, each transistor has its own separate input resistor, so each is controlled by a
different input signal. However, the only way the output can be pulled down to logic 0 is if both
transistors are turned on by logic 1 inputs. If either input is a logic 0 that transistor cannot
conduct, so there is no current through either one. The output is then a logic 1. This is the
behavior of a NAND gate. Of course, an inverter can also be included to provide an AND
output at the same time.
The problem with this NAND circuit stems from the fact that transistors are not ideal
devices. Remember that 0.3 volt collector saturation voltage? Ideally it should be zero. Since it
isn't, we need to look at what happens when we "stack" transistors this way. With two, the
combined collector saturation voltage is 0.6 volt -- only slightly less than the 0.65 volt base
voltage that will turn a transistor on.
If we stack three transistors for a 3-input NAND gate, the combined collector saturation
voltage is 0.9 volt. This is too high; it will promote conduction in the next transistor no matter
what. In addition, the load presented by the upper transistor to the gate that drives it will be
different from the load presented by the lower transistor. This kind of unevenness can cause
some odd problems to appear, especially as the frequency of operation increases. Because of
these problems, this approach is not used in standard RTL ICs.
RTL Inverter
Introduction
Resistor-Transistor Logic (RTL) is a large step beyond Diode Logic (DL). Basically, RTL
replaces the diode switch with a transistor switch. If a +5v signal (logic 1) is applied to the base
of the transistor (through an appropriate resistor to limit base-emitter forward voltage and
current), the transistor turns fully on and grounds the output signal. If the input is grounded
(logic 0), the transistor is off and the output signal is allowed to rise to +5 volts. In this way, the
transistor does invert the logic sense of the signal, but it also ensures that the output voltage
will always be a valid logic level under all circumstances.
Because of this, RTL circuits can be cascaded indefinitely, where DL circuits cannot be
cascaded reliably at all.
Schematic Diagram
The basic RTL inverter is actually very similar to the driver circuit we're using for LED
indicators. The primary difference is that the LED driver includes an LED in series with the
transistor collector lead. Resistor values are also adjusted to accommodate the different purpose
of the LED driver circuit.
Some years ago, when RTL ICs were the standard logic devices used in both commercial
and experimental digital circuits, transistors typically had a forward current gain of about 30.
With improved manufacturing techniques, modern transistors show current gains of 100 or
more. There is also far less variation between transistors of a given type. As a result, we can
tolerate a much lower input current to drive the transistor reliably into saturation. The resistor
values in the schematic diagram to the right reflect the capabilities of modern transistors; they
are significantly higher than the values used in RTL ICs, allowing working circuits to be built
that require far less operating current.
Parts List
To construct and test the RTL inverter circuit on your breadboard, you will need the
experimental parts listed below.
 (1) 15K (brown-green-orange), ¼-watt resistor.
 (1) 1K (brown-black-red), ¼-watt resistor.
 (1) 2N4124 NPN silicon transistor, or equivalent.
 (1) 0.3" Black jumper wire.
 (1) 3" Orange jumper wire.
 (1) 10" White jumper wire.
Constructing the Circuit
Select an area on your breadboard socket that is clear of other circuits. Our construction
procedure places this circuit just to the right of the center divider of the breadboard socket, as
shown in the construction image below. Refer to this image and the step-by step instructions as
you install the experimental parts for this circuit. Use the following images as a guide to
forming short jumpers and components leads to fit readily on your breadboard socket.
Performing the Experiment
Turn on power to your experimental circuit,
and move switch S0 back and forth between
logic 1 input and logic 0 input. What is the
output state of this circuit for each of the
possible input states? Record your results in the
table to the right.
Measure the output voltage of this circuit
for both output states. How much does the
output voltage change if L0 is disconnected
from the circuit? Will this circuit maintain a
legitimate logic 1 output when a reasonable
number of other gate inputs are connected to its
output?
Input
Output
S0
L0
0
?
1
?
Voltage
With L0
Voltage
Without
L0
V
V
V
V
When you have made this determination,
turn off the power to your experimental circuit
and compare your results with the discussion
below.
Discussion
You should have found that when the input was a logic 0, L0 turned on indicating a logic 1
output from this circuit. When you switched the input to logic 1, L0 turned off to indicate a
logic 0 output. Thus, this circuit did indeed function as a logic inverter, reversing the logic
sense of whatever signal was applied to its input.
The output voltage of our experimental circuit was 4.70 volts for a logic 1 and 0.03 volt for
a logic 0, with L0 connected. Disconnecting L0 had no significant effect on the logic 0 output,
but allowed the logic 1 output to rise to 4.88 volts. This shows that we cannot drive an infinite
number of gates from this output, but we can drive a reasonable number of inputs without
overloading this output circuit.
When you have completed this experiment, leave the experimental components in place on
your breadboard socket. You will expand this circuit to prepare for the next experiment.
4-Input RTL NOR Gate
Introduction
In the previous experiment, we looked at the basic RTL inverter circuit. We found that it
performed its job properly and well, and that the output voltage is not seriously degraded by a
connection to a similar circuit, which then acts as a load on the first output.
Now it's time to use RTL technology to combine multiple logic signals into a single output
signal. In this experiment, we will combine multiple RTL inverters into a single 4-input NOR
gate. However, the method we will demonstrate here can be used for any number of inputs.
Schematic Diagram
It is possible to create an RTL NOR gate by connecting multiple input resistors to a single
transistor. However, because the base of the transistor does not operate at ground potential,
there will be some interaction between input signals and a limit on the number of input signals
that can be applied to one transistor. To avoid that problem, the circuit to the right is preferred.
Here, each input signal is applied to its own transistor, just as in an inverter circuit. However,
the transistor collectors are connected together with just a single collector load resistor. This
way, the signals all combine only after inversion has occurred, so the input signals cannot
interfere or interact with each other under any circumstances.
Any number of transistors can be used in this configuration to produce an RTL NOR gate
of that many inputs.
Parts List
To construct and test the 4-input RTL NOR gate circuit on your breadboard, you will need
the RTL inverter circuit from the previous experiment plus the following additional parts:
 (3) 15K, ¼-watt resistors (brown-green-orange).
 (3) 2N4124 NPN transistors.
 (3) 0.3" black jumper wires.
 (1) 0.3" white jumper wire.
Constructing the Circuit
You should still have your experimental RTL inverter circuit in place from the previous
experiment. If you did not perform that experiment, you should do so now. Then, proceed with
the assembly phase of this experiment.
Performing the Experiment
Set all active four logic switches to provide a logic 0 to
your experimental circuit. Then, turn on power and observe
the state of L0. Record this state on the first line of the table
to the right.
Inputs
Output
S3
S2
S1
S0
L0
Continue to set the four input switches for this circuit to
all 16 possible combinations, and record your results for
each combination on the appropriate line to the right. Be
sure you test all possible combinations.
0
0
0
0
?
0
0
0
1
?
When you have recorded the output state for all
combinations of input states, turn off power and then look
over your results. Is this the correct output pattern for a NOR
gate?
0
0
1
0
?
0
0
1
1
?
0
1
0
0
?
0
1
0
1
?
0
1
1
0
?
0
1
1
1
?
1
0
0
0
?
1
0
0
1
?
1
0
1
0
?
1
0
1
1
?
1
1
0
0
?
1
1
0
1
?
1
1
1
0
?
1
1
1
1
?
Discussion
With all four logic inputs set to logic 0, all four transistors are turned off. The resulting
output is therefore a logic 1. With all other input combinations, at least one input is a logic 1,
and the corresponding transistor is therefore turned on. This pulls the output voltage down to a
logic 0.
Having more transistors turned on makes no difference; the output cannot be pulled down
any harder or any further. It remains at logic 0.
This gate is therefore verified to perform a logical NOR function upon its input signals.
When you have completed this experiment, leave your experimental circuit in place for the
next experiment. You will be extending it without making any changes to the present circuit.
4-Input RTL OR Gate
Introduction
Resistor-Transistor Logic (RTL) is a large step beyond Diode Logic (DL). Basically, RTL
replaces the diode switch with a transistor switch. If a +5v signal (logic 1) is applied to the base
of the transistor (through an appropriate resistor to limit base forward voltage and current), the
transistor turns fully on and grounds the output signal. If the input is grounded (logic 0), the
transistor is off and the output signal is allowed to rise to +5 volts. In this way, the transistor
does invert the logic sense of the signal, but it also ensures that the output voltage will always
be a valid logic level under all circumstances.
Because of this, RTL circuits can be cascaded indefinitely, where DL circuits cannot be
cascaded reliably at all.
Schematic Diagram
Since a transistor will inherently invert the logic sense of a signal, we can't use transistors to
merely combine input signals in an OR function. What we can do, however, is to take the NOR
gate we studied in the last experiment and re-invert the output, as shown to the right. This will
give us a NOT-NOR function, which brings us back to an OR function.
The NOR output is still available as well, so this circuit provides complementary outputs if
they're needed.
Parts List
The OR gate you'll be constructing for this experiment is mostly present on your
breadboard socket already. You will simply be adding an RTL inverter — just like the one
from your first RTL experiment — to the output circuit. You will leave the NOR output
connected to L2, and connect the inverted output signal to L1. That way you'll be able to
monitor both output signals at the same time.
To construct the additional inverter circuit for this experiment, you will need the following
parts:
 (1) 1K, ¼-watt resistor (brown-black-red).
 (1) 15K, ¼-watt resistor (brown-green-orange).
 (1) 2N4124 NPN transistor.
 (1) 0.3" black jumper.
 (1) 0.6" white jumper.
 (1) 10" green jumper.
Constructing the Circuit
You should still have your experimental RTL 4-input NOR gate in place from the previous
experiment. If you did not perform that experiment, you should do so now. Leave all
components and jumpers in place. Now, continue your assembly with the steps below.
Performing the Experiment
Set all four logic switches to provide a
logic 0 to your experimental circuit. Then,
turn on power and observe the state of L1.
Record this state on the first line of the table
to the right. Also note the state of L0, and
record this value to the right of your
recorded value for L1.
Continue to set the four input switches
for this circuit to all 16 possible
combinations, and record your results for
each combination on the appropriate line to
the right. Be sure you test all possible
combinations and record the output states of
both LEDs. Then, turn off power before
looking over your results.
When you have recorded both output
states for all combinations of input states,
Inputs
Outputs
S3
S2
S1
S0
L1
L0
0
0
0
0
?
?
0
0
0
1
?
?
0
0
1
0
?
?
0
0
1
1
?
?
0
1
0
0
?
?
look over your results. Does L0 still reflect
the correct pattern for a NOR gate? Does L1
show the correct outputs for an OR gate?
0
1
0
1
?
?
0
1
1
0
?
?
0
1
1
1
?
?
1
0
0
0
?
?
1
0
0
1
?
?
1
0
1
0
?
?
1
0
1
1
?
?
1
1
0
0
?
?
1
1
0
1
?
?
1
1
1
0
?
?
1
1
1
1
?
?
Discussion
You should have found that L0 produced exactly the same output pattern as it did in the
previous experiment: logic 1 when all switches were set to logic 0, and logic 0 all the rest of the
time. Thus, the addition of the inverter circuit did not affect the output state of the NOR gate.
L1 showed the opposite state from L0 at all times, indicating that this is indeed an inverter
circuit, just like the inverter you built and tested in your first RTL experiment. Thus, L1
showed a logic 0 when all switches were at logic 0, and a logic 1 for all other switch
combinations. This is correct OR gate behavior, showing that this circuit operates correctly for
all possible input states.
This concludes our experiments with RTL gates. Make sure you have power turned off, and
then remove all of the experimental components from your breadboard socket. Set these aside
carefully; you'll be using them in future experiments.