Download Part 8 (PPT File) - DESE, IISc Bangalore

Multilevel Voltage Space Vector
Generation for Induction Motor
Drives using Conventional Two-level
Inverters and H-bridge cells
K. Siva Kumar
CEDT, IISc, Bangalore
CEDT, Indian Institute of Science Bangalore
1
Overview of the presentation






Introduction
Proposed three-level inverter scheme
Experimental results
Proposed Five-level inverter schemes
Experimental results
Conclusion
CEDT, Indian Institute of Science Bangalore
2
INTRODUCTION
CEDT, Indian Institute of Science Bangalore
3
 The induction motor is called as a work horse of the industry
 The induction motor requires a variable voltage magnitude and
frequency to control the rotor speed
Conventional two-level inverter
CEDT, Indian Institute of Science Bangalore
4
Inverter pole voltage (sine-triangle PWM)



Normalized harmonics spectrum of pole
voltage
The harmonic components in the inverter pole voltage are present
at higher (switching) frequencies
The popular PWM control scheme is space vector pulse width
modulation (SVPWM) technique
Space vector (Vr) is nothing but a resultant representation of all
three phase voltage phasors and it is defined as
Vr =vAO +vBOe j120° +vCOe j240°
CEDT, Indian Institute of Science Bangalore
5
space vector diagram of conventional two-level inverter
 The symbols ‘+’ and ‘-’ respectively indicate that the top switch and
the bottom switch in a given phase leg are turned on
 The conventional two-level inverter has to switch at higher
frequencies to get a better harmonic profile at the inverter output
voltage
 But in high power applications, high switching frequency is
generally not preferred because of the high switching losses and
large dv/dt.
CEDT, Indian Institute of Science Bangalore
6
 This dv/dt effect causes EMI problem in the motor and increases
stress on the motor winding
 To overcome these disadvantages, many multilevel inverter
configurations and associated analysis of PWM techniques have
been suggested
 The most significant advantages of the multi-level inverters
compared to two-level inverters
 It is possible to use power semiconductor devices of
lower voltage ratings to realize high voltage levels at
inverter output
 It is possible to obtain refined output voltage
waveforms and reduced total harmonic distortion
(THD)
 It is possible to reduce the EMI problems by reducing
the switching dv/dt
CEDT, Indian Institute of Science Bangalore
7
Multilevel Voltage Source Inverter
One phase leg of general n-level inverter
The most popular topologies to realize the multilevel inverters are
 Neutral Point Clamped (NPC) topology
 Cascaded H-bridge (CHB) topology
 Flying capacitor (FC) topology
CEDT, Indian Institute of Science Bangalore
8
Multi-level Inverter topologies feeding from one side
of the induction motor
NPC
inverter
FC
inverter
H-Bridge
inverter
CEDT, Indian Institute of Science Bangalore
9
Multi-level inverters with open-end winding
induction motor
 The concept of multilevel inverters with open-end winding is
introduced by H. Stemmler and P. Guggenbach in the year 1993
 The three-level inverter topology can be realized by feeding an
open-end winding induction motor with two two-level inverter
from both sides of the winding
Three-level inverter topology for open-end winding
induction motor
CEDT, Indian Institute of Science Bangalore
10
 The triplen harmonic voltage introduced by the PWM inverters
will cause triplen harmonic currents in the motor phase
windings, because of the lake of isolated neutral
 This topology requires either harmonic filter or isolated dc-link
voltages to prevent triplen harmonic currents flowing through
the motor phase windings
 The dc-link voltage requirement for each inverter Vdc/2, which is
half the dc-link voltage of conventional three-level inverter fed
IM drive
 But the radii of the combined voltage vector hexagon will be Vdc
 This multilevel inverter topology is free from capacitor voltage
balancing issues
CEDT, Indian Institute of Science Bangalore
11
Motivation
 Many interesting multi level inverter topologies are proposed by
various research groups across the world from industry and
academic institutions
 Apart from the conventional 3-level NPC and H-bridge topology,
others are not yet highly preferred for general high and medium
power drives applications
 In this respect, two different five-level inverter topologies and
one three-level inverter topology for high power induction motor
drive applications are proposed
CEDT, Indian Institute of Science Bangalore
12
Part - 1
A Dual Two-Level Inverter scheme for
a Four-Pole Induction Motor Drive
with a single voltage source
CEDT, Indian Institute of Science Bangalore
13
Induction machine stator winding arrangement
 Stator winding of an induction machine is an arrangement of
conductors in the machine slots to produce nearly sinusoidal air gap
MMF
Four pole induction motor stator winding (full pitch) diagram
 The conductors in the slots 1 to 3 and 19 to 21 should have the same
voltage profile to produce identical magnetic poles
 Similarly the conductor in the slots 10 to 12 and 28 to 30 should have the
same voltage profile
CEDT, Indian Institute of Science Bangalore
14
 In a four pole induction motor, two sets of identical voltage profile
coils will be present in the total phase winding, at a phase
displacement of 360o (electrical)
 The identical voltage profile winding coils (or pole pair winding coils)
in the stator winding will equally share the applied voltage vector
Voltage vector distribution in the four pole induction machine winding
CEDT, Indian Institute of Science Bangalore
15
Modified four pole induction motor stator winding diagram

These identical voltage profile winding coils can be
disconnected from a conventional four pole induction
machine without any design change
Coil connection after the identical pole pair winding disconnection
CEDT, Indian Institute of Science Bangalore
16
 These two identical voltage profile coil groups can be connected in
parallel instead of series, thereby the voltage vector Vr/2 is sufficient
to drive the four pole induction motor with the same air gap flux
profile
 With this arrangement the dc-link voltage magnitude requirement
will come down to half compared to the conventional arrangement
 From the above discussion one can observe that, it is sufficient to
feed the disconnected pole pair winding coils with the same
fundamental voltage to get a performance similar to the
conventional induction motor
CEDT, Indian Institute of Science Bangalore
17
Three-level voltage space vector generation for an
open-end winding induction motor drive with single
voltage source using decoupled space-vector PWM
strategy
Proposed three-level inverter with one active source for fourpole induction motor drive
CEDT, Indian Institute of Science Bangalore
Cont..
18

The two identical voltage profile, pole pair winding coils, in each
phase of a four pole induction motor, is connected in two star
groups

These two star connected winding coil groups are fed from two
inverters

But these two inverters should produce the same fundamental
voltage on the motor pole pair winding to generate uniform air gap
flux

So a decoupled space-vector PWM scheme is used to drive the
inverters

inverter-I and inverter-II are operated with a reference voltage
space vector of Vr/2 and –Vr/2
CEDT, Indian Institute of Science Bangalore
19
Space vector diagram of the two inverters
Space vector diagram of three-level inverter
CEDT, Indian Institute of Science Bangalore
20
Timing distribution of the switching states for two inverters in
one sampling interval



Using the decoupled PWM technique the voltage reference is
equally divided in to two new reference vectors for two two-level
inverters to generate the same fundamental voltage
In a switching time period Ts the voltage vectors OA and OA’ can
be generated with a sequence of switching states 8-1-2-7 for
inverter-I and 8’-5’-4’-7’ for inverter-II
The resultant switching sequence is 88’-15’-25’-24’-77’
CEDT, Indian Institute of Science Bangalore
21
2 Vr
vA1O ( Avg ) max   * (max)
3 2
2 Vdc
vA1O ( Avg )  *
*cos(30)  0.289VDC
3 2
Similarly
vA 4O ( Avg )
Vdc
2
 *( ) *cos(30)  0.289VDC
3
2
Maximum modulation index
Resultant Phase voltage
vA1A4  vA10  vA40  0.289Vdc  (0.289Vdc )  0.577Vdc
 The proposed topology is capable of producing a maximum phase
voltage of 0.577Vdc in linear modulation with a single dc link
voltage of Vdc/2
 So in the proposed scheme, the dc-bus utilization is increased by
15% compared to the earlier schemes presented with a single
voltage source
CEDT, Indian Institute of Science Bangalore
22
Experimental results
 The proposed topology are experimentally verified on a 5 H.P
four pole induction motor (pole pair winding disconnected) drive
 The drive is operated in open loop V/f control for different
voltage reference covering the entire speed range
 A decoupled space vector PWM scheme is used to generate the
switching pulses
 The inverter switching frequency is kept at 1 kHz for the entire
speed range
 The controller is implemented on TMS320F2812 DSP platform
CEDT, Indian Institute of Science Bangalore
23
Block diagram of V/f control scheme used for the proposed
three-level inverter topology
 The modulation index (M) given by the Vr/Vdc, so at the end of
linear modulation M equal is to 0.866
CEDT, Indian Institute of Science Bangalore
24
Experimental results for modulation index
0.4 (i.e. 20Hz operation)
pole voltages
[Y-axis: 100V/div]
phase voltage
[Y-axis: 200V/div]
Phase currents
[Y-axis: 2A/div, X-axis: 10ms/div]
CKT DIG
Normalized harmonic spectrum of the two inverters pole voltages
CEDT, Indian Institute of Science Bangalore
25
Phase voltage
[Y-axis: 200V/div]
common mode voltage
[Y-axis: 100V/div]
Effective phase voltage
[Y-axis: 200V/div, X-axis: 10ms/div]
phase currents
Normalized harmonic spectrum of the
effective phase voltage
effective phase
current
 The first center band harmonics are completely eliminated
CEDT, Indian Institute of Science Bangalore
26
Experimental results for modulation index
0.8 (i.e. 40Hz operation)
pole voltages
[Y-axis: 100V/div]
phase voltage
[Y-axis: 200V/div]
Phase currents
[Y-axis: 2A/div,
X-axis: 10ms/div]


The first centre band harmonics
appear at 25 (1000Hz/40Hz) times
the fundamental frequency
The isolated neutral presented in
the proposed topology will not
allow the triplen currents to flow
through the motor phase windings
Normalized harmonic
spectrum of the two
inverters pole voltages
CEDT, Indian Institute of Science Bangalore
27
Phase voltage
[Y-axis: 200V/div]
common mode voltage
[Y-axis: 100V/div]
Effective phase voltage
[Y-axis: 200V/div, X-axis: 10ms/div]
phase currents
Normalized harmonic spectrum of the
effective phase voltage
effective phase
current
 The first center band harmonics are completely eliminated
 the ripple content in the two currents are approximately equal
in magnitude with opposite direction
CEDT, Indian Institute of Science Bangalore
28
Experimental results for over modulation
pole voltages
[Y-axis: 100V/div]
phase voltage
[Y-axis: 200V/div]
Phase currents
[Y-axis: 2A/div,
X-axis: 10ms/div]


The first center band harmonics appear at
approximately 21 (1000Hz/47Hz) times
the fundamental frequency
Because of this square wave operation
fifth and seventh harmonic will be
presented in the inverter pole voltages
Normalized harmonic
spectrum of the two
inverters pole voltages
CEDT, Indian Institute of Science Bangalore
29
Phase voltage
[Y-axis: 200V/div]
common mode voltage
[Y-axis: 100V/div]
Effective phase voltage
[Y-axis: 200V/div, X-axis: 10ms/div]
 From the above results it is clear that,
for full modulation range the first
center band harmonics are suppressed
in the effective motor phase voltage
Normalized harmonic spectrum
of the effective phase voltage
CEDT, Indian Institute of Science Bangalore
30
Salient features
 The identical voltage profile winding coils are disconnected and
connected in two star groups
 These star connected phase windings are fed from independently
controlled inverters
 The two inverters are fed from a single dc-link voltage source (The
isolated neutrals provided by two star winding groups will not allow the
triplen currents to flow through the motor phase windings)
 The first center band harmonics are at two times the carrier frequency
 The implementation of the proposed scheme does not necessitate any
special design requirements for the induction motor
 It can be extended to induction motor with number of poles more than
four
CEDT, Indian Institute of Science Bangalore
31
Part - 2
A Five Level Inverter Scheme for a Four
Pole Induction Motor Drive by Feeding
the Identical Voltage Profile Windings
from Both Sides
CEDT, Indian Institute of Science Bangalore
32
Proposed Five-level Inverter Power circuit

The advantages of the open-end winding structure along with
identical voltage profile winding coils for a four pole induction
motor are effectively utilized to realize multilevel structures using
conventional two-level inverters
CEDT, Indian Institute of Science Bangalore
33
 In the proposed topology, three isolated voltage source with a
magnitude of Vdc/4 (where Vdc is the dc-bus voltage required for a
conventional NPC three-level inverter) is used to deny the path for
zero sequence currents
 The switches S11 to S46, in the above figure, are part of the two level
inverters which are fed from the voltage source magnitude of Vdc/4
 So the maximum voltage blocking capacity of the switches (labelled as
Sxy, where x= 1 to 4 and y= 1 to 6) is Vdc/4
 With the proposed topology, it is possible to switch four two-level
inverters independently and thereby each inverter will have eight
switching states
 Therefore a total of 4096 (8x8x8x8) switching combinations are
possible, which are spread over 61 locations
CEDT, Indian Institute of Science Bangalore
34
Voltage space vector locations for a Five-level inverter

Note that each voltage level can be realized in a number of ways
CEDT, Indian Institute of Science Bangalore
35
All switching combinations for the five voltage levels for a-phase
Voltage magnitude
(level)
+Vdc/2 (2)
+Vdc/4 (1)
0 (0)
-Vdc/4 (-1)

-Vdc/2 (-2)
S11
S21
S31
S41
ON
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
ON
ON
OFF
ON
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
OFF
OFF
ON
ON
ON
ON
ON
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
OFF
OFF
ON
OFF
ON
OFF
OFF
ON
ON
OFF
ON
OFF
ON
ON
ON
OFF
ON
OFF
ON
Presently, the bi-directional switches S1 to S6 , in the power
circuit, are assumed to be shorted
CEDT, Indian Institute of Science Bangalore
36
Schematic of possible voltage levels across the A-phase winding
Voltage level at Vdc/2
Voltage level at Vdc/4
Voltage level at 0
Voltage level at -Vdc/4
Voltage level at -Vdc/2

As mentioned above turning on the bidirectional switches (S1 to
S6) permanently will cause a short circuit at the middle of motor
phase windings
CEDT, Indian Institute of Science Bangalore
37
 It will create an unequal voltage sharing between the same
winding groups and this is explained using with switching state
combinations 110 and 20-1
(a)Phase winding connection to the voltage sources for switching state
110 (b) Phase winding connection to the voltage sources for switching
state 20-1
CEDT, Indian Institute of Science Bangalore
38
From the Phase winding connection to the voltage sources for
switching state 110, shown above, it can be observed that





One group of windings (i.e. A1-A2, B1-B2 and C1-C2) is fed
from a voltage vector (110) and the other group of windings
(i.e. A3-A4, B3-B4 and C3-C4) is fed from a zero voltage vector
(000)
part of the A-phase and B-phase winding group (A1A2 & B1B2) has a voltage of Vdc/4 across it and the other phase
group has zero voltage across it
Similarly for switching state 20-1 it can be observed that,
one group of windings (i.e. A1-A2, B1-B2 and C1-C2) is fed
from a voltage vector (100) and the other group of windings
(i.e. A3-A4, B3-B4 and C3-C4) is fed from a voltage vector (101)
However, for a four pole induction machine, two parts of the
winding groups should have identical voltage profile for a
uniform flux distribution
Therefore the present sequence with turning on the
bidirectional switches will result in a distorted flux profile
CEDT, Indian Institute of Science Bangalore
39
(a) Phase winding connection to the voltage sources with equal
voltage distribution across the phase winding groups for switching
state 110 using the bidirectional switches. (b) Phase winding
connection to the voltage sources with equal voltage distribution
across the phase winding groups for switching state 20-1 using the
bidirectional switches
CEDT, Indian Institute of Science Bangalore
40
Possible switching combinations
Voltage
magnitude
S11
S21
S31
S41
S1
S2
ON
OFF
ON
OFF
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
OFF
OFF
ON
OFF
OFF
ON
OFF
OFF
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
ON
ON
ON
OFF
OFF
OFF
ON
OFF
ON
ON
ON
(level)
+Vdc/2 (2)
+Vdc/4 (1)
0 (0)
-Vdc/4 (-1)
-Vdc/2 (-2)
 Based on the above considerations it is not possible to realize all
the switching combinations presented in the above table
CEDT, Indian Institute of Science Bangalore
41
 All the voltage vector locations inside the first and second innermost
hexagon can be realized with the voltage levels ‘-1’, ‘0’ and ‘1’
 By using the switching state redundancy, it is possible to clamp
inverter-2 and inverter-3 up to modulation index of 0.433
 Where the maximum radius of the reference voltage vector within the
second innermost hexagon is achieved at a modulation index of 0.433
 Both the bi-directional switches, in corresponding phases, are
completely turned off for the voltage levels ‘-1’, ‘0’ and ‘1’
 The bi-directional switches are also need not to switch up to the
modulation index 0.433 like inverter-2 and inverter-3
 So in case of any switch failure in inverter-2 or inverter-3, the
proposed five-level inverter can still be operated as a three-level
inverter for lower modulation indices
CEDT, Indian Institute of Science Bangalore
42
voltage rating of the bidirectional switches
Phase winding connection to the voltage sources for switching state 22-2,
with bi-directional switches
 the voltage equation for the loop (using Kirchhoff’s voltage
Law) (B1 B2 X C2 C1 B1)
Vdc eb ec
   2*Vs  0
4
2 2


1  Vdc  eb ec  
Vs   
   
2  4  2 2 
The maximum voltage across the switch is half the voltage
difference between Vdc/4 and the difference between the back emf’s
of two phases
Maximum voltage appears across the bidirectional switches is Vdc/8
CEDT, Indian Institute of Science Bangalore
43
Switching strategy


Space vector pulse width modulation (SVPWM) technique is
used to generate gating pulses for the proposed inverter
The voltage space vector reference (Vr*) can be generated from
the motor speed requirement using V/f control
o
 Vr =va +vb e j120 +vc e j240
o
voltages


, where va, vb and vc are three phase
The individual phase voltage references (va*,vb* and vc*) can be
derived from voltage space vector
To have maximum utilization of dc-bus voltage, in linear
modulation, an offset voltage is added to the three reference
voltages
Voffset = -[max(va*,vb* and vc*) + min(va*,vb* and vc*)]/2
van*= va*+Voffset
CEDT, Indian Institute of Science Bangalore
44
The A-phase reference voltage Van* modulation
index (M= Vr/Vdc) equal to 0.8

In actual experimental verification using a DSP it is difficult to generate
four level shifted triangles
CEDT, Indian Institute of Science Bangalore
45
The modified A-phase reference voltage and triangle carriers


The voltage level required by the load is released by comparing the
reference wave form with carrier wave
The switching state can be select from the above mentioned table
CEDT, Indian Institute of Science Bangalore
46
EXPERIMENTAL
RESULTS
 The proposed five-level inverter topology is experimentally
verified on a 5hp four pole induction motor
 The motor is run at no load condition to show the effect of
changing PWM patterns on the motor current
 Open loop V/f control is used to test the drive for the full
modulation range
 Throughout the speed range, the switching frequency is kept at 1
kHz
 The controller is implemented in TMS320F2812 DSP platform
 The gating signals generated from GAL22V10B
CEDT, Indian Institute of Science Bangalore
47
Block diagram of V/f control scheme used for the
proposed five-level inverter topology
CEDT, Indian Institute of Science Bangalore
48
Experimental results for modulation index
0.2 (i.e. 10Hz operation)
Total phase voltage
voltage across the one
phase winding coils
phase current
[X-axis: 20ms/div, Y-axis: 100V/div, 1A/div]
 From the phase voltage it can be noted that, the proposed
inverter is operating in two-level mode
CEDT, Indian Institute of Science Bangalore
49
Voltage between the point A2,A3
Inverter-1 pole voltage
Inverter-4 pole voltage
phase current
[X-axis: 20ms/div, Y-axis: 100V/div, 1A/div]
Voltage across the bidirectional switch
 The inverter 1 and 4 are switching half of the period in a fundamental
cycle
 The negative and positive voltage peaks (across the bidirectional
switch) are less than half of the inverter pole voltage peak
 So the maximum voltage appear across the bidirectional switch is Vdc/8
CEDT, Indian Institute of Science Bangalore
50
Experimental results for modulation index
0.4 (i.e. 20Hz operation)
Total phase voltage
voltage across the one
phase winding coils
phase current
[X-axis: 20ms/div, Y-axis: 100V/div, 1A/div]
 From the phase voltage it can be noted that, the proposed
inverter is operating in three-level mode
CEDT, Indian Institute of Science Bangalore
51
Voltage between the point A2,A3
Inverter-1 pole voltage
Inverter-4 pole voltage
phase current
[X-axis: 20ms/div, Y-axis: 100V/div, 1A/div]
Voltage across the bidirectional switch
 Here also the inverter 1 and 4 are switching half of the period in a
fundamental cycle
 The middle inverters (i.e. Inverter 3 and 4) are not switching for full
fundamental cycle
 The negative and positive voltage peaks (across the bidirectional
switch) are less than half of the inverter pole voltage peak
CEDT, Indian Institute of Science Bangalore
52
Experimental results for modulation index
0.6 (i.e. 30Hz operation)
Total phase voltage
voltage across the one
phase winding coils
phase current
[X-axis: 20ms/div, Y-axis: 100V/div, 1A/div]
 From the phase voltage it can be noted that, the proposed
inverter is operating in four-level mode
CEDT, Indian Institute of Science Bangalore
53
Voltage between the point A2,A3
Inverter-1 pole voltage
Inverter-4 pole voltage
phase current
[X-axis: 20ms/div, Y-axis: 100V/div, 1A/div]
Voltage across the bidirectional switch
 Inverters (inv-2 and inv-3) are switching when the other two
inverters (inv-1 and inv-4) are clamped
 This indicates that, at a time only two inverters are switching,
in a fundamental cycle of operation
CEDT, Indian Institute of Science Bangalore
54
Experimental results for modulation index
0.8 (i.e. 40Hz operation)
Total phase voltage
voltage across the one
phase winding coils
phase current
[X-axis: 20ms/div, Y-axis: 100V/div, 1A/div]
 From the phase voltage it can be noted that, the proposed
inverter is operating in five-level mode
CEDT, Indian Institute of Science Bangalore
55
Voltage between the point A2,A3
Inverter-1 pole voltage
Inverter-4 pole voltage
phase current
[X-axis: 20ms/div, Y-axis: 100V/div, 1A/div]
Voltage across the bidirectional switch
 Here also inverters (inv-2 and inv-3) are switching when the
other two inverters (inv-1 and inv-4) are clamped
 This indicates that, at a time only two inverters are switching,
in a fundamental cycle of operation
CEDT, Indian Institute of Science Bangalore
56
Experimental results for over modulation
Total phase voltage
voltage across the one
phase winding coils
phase current
Inverter-1 pole voltage
Inverter-4 pole voltage
Voltage between the point A2,A3
phase current
 Throughout the modulation range, at a time only two inverters are
switched
 This will result in less switching losses, and it will increase the overall
efficiency of the drive system
CEDT, Indian Institute of Science Bangalore
57
Transient performance of the proposed drive
Phase voltage
Phase current
 The transient performance of the proposed drive is tested by
accelerating induction motor from 10Hz operation (i.e. 300rpm)
to 47Hz (i.e. 1410rpm)
 The smooth transition of the voltage profile from two-level to
five-level can be seen from the waveforms
CEDT, Indian Institute of Science Bangalore
58
Comparison between the proposed topology and
conventional topologies
Switches
(with a voltage rating of
Vdc/4)
Voltage
rating of
Clamping
3*Vdc/4
diodes
Vdc/2
Vdc/4
Isolated voltage sources
(voltage magnitude)
Number of capacitor banks
(with a voltage rating of
Vdc/4)
Bi-directional switches
(voltage rating )
NPC
Topology
Flying
capacitor
topology
H-bridge
topology
Proposed
topology
24
24
24
24
6
0
0
0
6
6
0
0
0
0
0
0
1* (Vdc)
1* (Vdc)
6 (Vdc/4)
3 (Vdc/4)
4
18
0
0
0
0
0
6 (Vdc/8)
CEDT, Indian Institute of Science Bangalore
59
Salient features
 Two identical voltage profile winding coils in each phase of a four pole
induction motor are disconnected
 The dc bus voltage magnitude requirement is one-fourth compared to
a conventional five-level NPC inverter
 All the inverters are switching for a maximum period of half, in a
fundamental cycle
 In lower modulation indices (M<0.43) the middle two inverters can be
clamped for the entire period of fundamental cycle
 Only conventional two-level inverters are used so this will eliminate all
capacitor voltage unbalance issues normally encountered in NPC
inverters
 This concept can be easily extended to induction motor with number
of poles more than four and thereby the number of levels on the
phase winding can be further increased
CEDT, Indian Institute of Science Bangalore
60
Part - 3
A Hybrid Five level Inverter Topology
for an Open-end winding Induction
Motor Drive Using Two-Level Inverters
in series with a Capacitor fed H-Bridge
Cell
CEDT, Indian Institute of Science Bangalore
61
Proposed Five-level Inverter Power circuit

In this circuit, only one voltage source is used with a magnitude of
Vdc/2 where Vdc is the dc-link voltage requirement for the
conventional NPC inverter
CEDT, Indian Institute of Science Bangalore
62







This topology is similar to an open-end winding multilevel inverter
structure
In the open-end winding multilevel inverter structure, it is possible to
generate a three voltage levels on phase winding by connecting two
two-level inverters from both sides of the motor phase windings
This concept is further extended by introducing an additional flying
capacitor with H-bridge cell in series with motor phase windings
For the present study, the flying capacitors (Ca, Cb and Cc) are charged
to a voltage Vdc/4
If the two level inverters are now clamped to zero voltage, then the Hbridge cell can produce voltage levels of Vdc/4, 0 and –Vdc/4 on the
motor phase winding
On the other hand, by clamping the H-Bridge cells to zero voltage, the
two two-level inverters, with a voltage source magnitude of Vdc/2, can
independently generate voltage levels of Vdc/2, 0 and –Vdc/2 on the
phase winding
When both of them are operated together, it is possible to have five
voltage levels on the motor phase windings
CEDT, Indian Institute of Science Bangalore
63
ALL
POSSIBLE
SWITCHING
COMBINATIONS FOR THE FIVE
VOLTAGE LEVELS FOR PHASE-A
Phase
voltage
Vdc/2
Sa1
ON
ON
OFF
Sa2
*
ON
OFF
*
Sa3
*
OFF
ON
*
Sa4
OFF
Capacitor
Ideal
Ca status


Vdc/4
0
-Vdc/4
OFF ON
-Vdc/2
OFF
OFF
OFF
*
OFF
ON
*
*
ON
OFF
*
OFF
OFF
OFF ON
ON
OFF
ia>0:
ia>0:
ia<0:
ia<0:
charging
discharging
charging discharging
Ideal
ia<0:
ia<0:
ia>0:
ia>0:
discharging
charging
discharging charging
ON
ideal
Due to the complementary nature of the two-level inverter switches,
switch Sa1 ‘ON’ automatically implies that switch S’a1 ‘OFF’
The current from A to A’ is assumed to be the positive direction of
current and is shown as ia>0
CEDT, Indian Institute of Science Bangalore
64

There are 14 possible switching combinations for one phase to realize
the five voltage levels

Therefore a total of 2744 (14x14x14) switching combinations are
possible for the present work

The flying capacitors can be charged or discharged independent of
the phase current direction for the voltage levels Vdc/4 and –Vdc/4 (it
can be observed from the previous table)

The other voltage levels (i.e. Vdc/2, 0 and -Vdc/2) on the phase
winding is achieved by bypassing the flying capacitors, so it will not
affect the capacitor voltages
CEDT, Indian Institute of Science Bangalore
65
Common Mode Voltage

It is known that inverters controlled by conventional two-dimensional
SVPWM will produce a common mode (triplen) voltage along with the
fundamental voltage on the motor phase windings

The triplen harmonic content in the phase voltage would cause a high
triplen harmonic current to flow through the motor phases and power
semi-conductor devices

To suppress the triplen harmonic current, either harmonic filter or
isolated power supplies should be used

In this proposed topology two isolated voltage sources are used to
deny the path for triplen current
CEDT, Indian Institute of Science Bangalore
66
Modified Five-level inverter topology

The proposed topology can be operate as a dual inverter fed
open-end winding Induction motor drive (i.e. three-level
operation) for full modulation range, by properly clamping the Hbridge cells
CEDT, Indian Institute of Science Bangalore
67
Flying Capacitor Design



The performance of the proposed topology is dependent on flying
capacitor ripple voltage
The capacitors can be designed properly to restrict the ripple voltage
within acceptable limits
The capacitance required by the flying capacitor can be calculated by
using the formula
Ts
T
C  Ip *
 Ip *
V
V
Where
C is flying capacitor (Ca, Cb or Cc)
Ip is peak phase current
Ts is switching time period
∆V is the peak-to-peak voltage ripple allowed in the flying capacitor.
CEDT, Indian Institute of Science Bangalore
68
EXPERIMENTAL RESULTS

The proposed five-level inverter topology is experimentally verified on a
5hp open-end winding induction motor

The motor is run at no load condition to show the effect of changing
PWM patterns on the motor current

Open loop V/f control is used to test the drive for the full modulation
range

Throughout the speed range, the switching frequency is kept at 1 kHz

The flying capacitor value is chosen as 1100μF

The controller is implemented in TMS320F2812 DSP platform

The gating signals generated from SPARTAN XC3S200 FPGA
CEDT, Indian Institute of Science Bangalore
69
The V/f controller block schematic for proposed
five-level inverter scheme

The symbols vca, vcb and vcc represents the voltage across the flying
capacitors (Ca, Cb and Cc)
CEDT, Indian Institute of Science Bangalore
70
Experimental results for modulation index 0.2
Flying capacitor ripple
voltage [2V/div]
phase voltage [Yaxis: 50V/div]
phase current
[Y-axis: 1A/div] [Xaxis: 20ms/div]

The proposed topology is operating in three-level mode

The flying capacitor peak to peak voltage ripple is less than 1V
CEDT, Indian Institute of Science Bangalore
71
inverter-1 pole
voltage
[Y-axis: 50v/div]
inverter-1 pole
voltage
H-bridge cell
output voltage
phase current
[Y-axis: 1A/div] [Xaxis: 20ms/div]

High voltage fed inverters (i.e. inverter-1 and inverter-2) are
switching half of the period in fundamental cycle
CEDT, Indian Institute of Science Bangalore
72
Experimental results for modulation index 0.4
Flying capacitor ripple
voltage [2V/div]
phase voltage [Yaxis: 50V/div]
phase current
[Y-axis: 1A/div] [Xaxis: 10ms/div]

The proposed topology is operating in three-level mode

The flying capacitor peak to peak voltage ripple is less than 1V
CEDT, Indian Institute of Science Bangalore
73
inverter-1 pole
voltage
[Y-axis: 50v/div]
inverter-1 pole
voltage
H-bridge cell
output voltage
phase current
[Y-axis: 1A/div] [Xaxis: 10ms/div]


High voltage fed inverters (i.e. inverter-1 and inverter-2) are
switching half of the period in fundamental cycle
So this will reduce the switching losses of the drive
CEDT, Indian Institute of Science Bangalore
74
Experimental results for modulation index 0.6
Flying capacitor ripple voltage
[2V/div]
phase voltage [Y-axis: 50V/div]
phase current
[Y-axis: 1A/div] [X-axis: 10ms/div]
inverter-1 pole voltage
[Y-axis: 50v/div]
inverter-1 pole voltage
H-bridge cell output voltage
phase current
[Y-axis: 1A/div] [X-axis: 10ms/div]

The proposed topology is operating in three-level mode
CEDT, Indian Institute of Science Bangalore
75
Experimental results for modulation index 0.8
Flying capacitor ripple voltage
[2V/div]
phase voltage [Y-axis: 50V/div]
phase current
[Y-axis: 1A/div] [X-axis: 5ms/div]
inverter-1 pole voltage
[Y-axis: 50v/div]
inverter-1 pole voltage
H-bridge cell output voltage
phase current
[Y-axis: 1A/div] [X-axis: 5ms/div]

The flying capacitor voltage is well balanced (since, ripple voltage
magnitude is less) when the inverter is operating at five-level mode
CEDT, Indian Institute of Science Bangalore
76
Normalized harmonic spectrum of the motor phase voltage
 The first centre band harmonics is present at 25 (1000Hz/40Hz)
times the fundamental frequency
 the peak harmonic voltage magnitude is around 8% and it is
placed at 50 times of the fundamental frequency, thereby the
effect of this harmonic voltage on motor phase current is
insignificant
CEDT, Indian Institute of Science Bangalore
77
Experimental results for over modulation
Flying capacitor ripple voltage
[2V/div]
phase voltage [Y-axis: 50V/div]
phase current
[Y-axis: 1A/div] [X-axis: 5ms/div]
inverter-1 pole voltage
[Y-axis: 50v/div]
inverter-1 pole voltage
H-bridge cell output voltage
phase current
[Y-axis: 1A/div] [X-axis: 5ms/div]
 The H-bridge capacitor voltage is well balanced (since, ripple voltage magnitude
is less) when the inverter is operating at over modulation
CEDT, Indian Institute of Science Bangalore
78
Transient performance of the proposed drive



Transient performance of the proposed scheme during speed reversal
operation of the drive
The capacitor voltage is balanced for the full modulation range
Even though the accelerating and decelerating the motor draws current
much more than the steady state operation, yet the capacitor voltage is
balanced for the full modulation range
CEDT, Indian Institute of Science Bangalore
79
Comparison between the proposed topology and
conventional topologies
NPC
Topology
Flying
capacitor
topology
H-bridge
topology
Proposed
topology
24
24
24
12
0
0
0
12
6
0
0
0
6
6
0
0
0
0
0
0
Isolated voltage sources
(voltage magnitude)
1* (Vdc)
1* (Vdc)
6 (Vdc/4)
2 (Vdc/2)
Number of capacitor banks
(with a voltage rating of
Vdc/4)
4
18
0
3
Switches
Clamping
diodes
voltage
rating of
Vdc/4
Vdc/2
Voltage
rating of
3*Vdc/4
Vdc/2
Vdc/4
CEDT, Indian Institute of Science Bangalore
80
Salient features
 The concept of open-end winding structure is extended by
adding a flying capacitor in series with motor phase winding
 This results in a five level inverter topology
 It does not require any clamping diodes as in a conventional
five-level NPC inverter
 It requires only one capacitor bank for each phase, whereas
five-level flying capacitor require 6 additional capacitor banks
for each phase
 this proposed topology reduces the power circuit complexity
compared to NPC or flying capacitor topologies
 In case of any switch failure in the H-bridge cell, the
proposed inverter topology can be operated as a three-level
inverter for full modulation range using open-end winding
concept
CEDT, Indian Institute of Science Bangalore
81
Overall experimental setup
CEDT, Indian Institute of Science Bangalore
82
List of publications
1. K. Sivakumar, A. Das, R. Ramchand, C. Patel, K. Gopakumar, “A Five Level Inverter
Scheme for a Four Pole Induction Motor Drive by Feeding the Identical Voltage Profile
Windings from Both Sides”, IEEE Trans. on Industrial Electronics(accepted for
publication)
2. K. Sivakumar, A. Das, R. Ramchand, C. Patel, K. Gopakumar, “A Hybrid Multilevel Inverter
Topology for an Open-end winding Induction Motor Drive Using Two-Level Inverters in
series with a Capacitor fed H-Bridge Cell”, IEEE Trans. on Industrial
Electronics(accepted for publication)
3. K.Sivakumar, Rijil Ramchand, Anadarup das, Chintan Patel, K.Gopakumar, “Two different
Schemes for Three-level Voltage Space Vector Generation for Induction Motor drives with
Reduced DC-Link Voltage”, EPE( European power electronics journal),(accepted for
publication and scheduled on march 2010)
4. K. Sivakumar, Anandarup Das, Rijil Ramchand, Chintan Patel, K.Gopakumar, “A Simple
Five-Level Inverter Topology for Induction Motor Drive Using Conventional Two-Level
Inverters and Flying Capacitor Technique”, IEEE IECON 2009, 3-5 November 2009 at
Porto, Portugal.
5. K. Sivakumar, Anandarup Das, Rijil Ramchand, Chintan Patel, K.Gopakumar, “A Three
Level Voltage Space Vector Generation for Open End Winding IM Using Single Voltage
Source Driven Dual Two-Level Inverter”, IEEE TENCON 2009, 23-26 November 2009 at
Singapore.
CEDT, Indian Institute of Science Bangalore
83
THANK YOU
CEDT, Indian Institute of Science Bangalore
84