Download MOD I - SNGCE DIGITAL LIBRARY

MODULE I
STATIC SWITCHES
Power electronics is the technology of converting electric power from one form to
another using electronic power devices. Several types of solid state power semiconductor
devices have been developed, making it possible to build efficient power converter with
excellent facility for control of output parameters, such as voltage, current or frequency. In a
static power converter, the power semiconductor devices function as switches, which operate
statically.
Figure 1.1 shows a scheme of converting DC to AC. This types of power conversion
is called inversion, and the circuit itself is called an inverter. There are 4 switches S1, S2, S3
and S4. The input is a DC voltage source of magnitude V connected to the input terminals of
the inverter which are P (+ve) and Q (-ve). The timing of the switches is shown in figure. For
example, from instant t=0 to instant t = t1, switches S1 and S4 are kept ON, the other being
kept OFF. Therefore the input DC voltage appears at the output terminals with terminal A
+ve. During the next interval from t1 – t2, S1 and S4 are kept OFF, but S2 and S3 are Kept ON.
Therefore during this interval the input DC voltage appears at the output terminals with
reversed polarity ( A –ve). This sequence of switching is repeated, and in this way the input
voltage V of fixed polarity shown in figure is presented at the output terminals PQ as an AC
square wave voltage. This is an example of the role of static switches in the power conversion
process.
Fig.1.1 Power conversion by switching
TYPES OF STATIC SWITCHES.
(a) Uncontrolled Static Switches:
The simplest static switch is the Diode. A power diode is a two-terminal device as shown
in fig. if a diode is present in an electrical circuit in such a way that its anode (A) has a +ve
potential w.r.t its cathode (K), it is said to be forward biased. An ideal diode conducts when
forward biased, with negligible voltage drop across it and a forward current (If) in fig. flows
through it. If it is reverse biased then it doesn’t conduct. A real diode will have a small
forward voltage drop across it when it conducts and a small reverse leakage current when it is
reverse biased. An ideal diode considered as a static switch, turn ON automatically whenever
the external circuit can send a forward current through it. It turns OFF automatically
whenever the external circuit attempts to send a reverse current through it by impressing a
reverse voltage. This device has no control terminal through which we can control its ON and
OFF switching operations. The switch blocks reverse voltage, but has no capability to block
forward voltages. We can describe the ideal power diode as an uncontrolled static switch that
turns ON and turns OFF by itself, depending on the polarity of the voltage.
Fig.1.2 Types of switches
(b)
Controlled switch
A controlled switch is one that could be turned ON and OFF by activating and
deactivating a control circuit. Fig. shows a non- static switch of this kind. It has a control coil
whose terminals are labelled 1 and 2. To turn on this we send a current through the control
coil, which will cause the plunger to move and connect the power terminals. The following
aspects should be noted here.
1. The switch has four terminals- two for the power circuit and two for the control
circuit.
2. The control circuit is electrically isolated from the power circuit.
The control circuit block in a static converter provides the electrical signals to
perform the switching operations of the static switches. The control circuit often consists of
low voltage electronic components such as analogue and digital integrated circuits, working
from a low voltage power supply with respect to ground. The control circuit will be damaged
if large voltages with respect to ground are impressed on it. In a static power converter, the
power terminals of a static switch may reach high voltages w.r.t ground. Also during the
switching , these potential changes by large magnitudes in each switching cycle. It is
important to ensure that these large voltages, as well as fast changes that occur in them donot
disturb the control circuit.
Unfortunately, power semiconductor switching devices presently available do not
provide any isolation at all between the power and control terminals. Hence in the case of
every power semi conductor switch , one of the control terminals is common with one of the
power terminals. All are therefore 3 terminal devices. A typical example is the power
transistor. Here collector and emitter are the power terminal. The third terminal namely the
base and the emitter are the control terminals. When electrical isolation between power and
control circuits is a requirement , we have to use an external isolating device, such as pulse
transformer, to couple the power circuits to the control terminals of the switching device.
The circuit symbol that we shall use to represent an ideal 3 terminal controlled
unidirectional static switch is in fig.(c). The power terminals of the switch are labelled 1 and
2. The arrow shows the direction of ON state current through it. The control input is across
terminals C and 1.
Directional properties of Static Switches- Current Direction
A power diode as a static uncontrolled switch with only one direction for current
flow. the unidirectional power semi conductor switch other than diode, are

Bipolar power transistor

IGBT

SCR (thyristor)

Asymmetrical SCR (ASCR)

GTO

MOS controlled Thyristor (MCT).
The switches with bidirectional current capability are
 Power MOSFET
 The reverse conducting thyristor
 Triac .
Of these, the power MOSFET and the reverse conducting thyristor function as
controlled switches in the forward direction and as uncontrolled switches in the reverse
direction. The Triac works as a controlled switch in both directions.
Directional Voltage capabilities of Static Switches.
A bipolar power transistor is a static switch that can only switch current in the
forward direction. This doesn’t mean that it has ability to block reverse voltages. In fact it has
no significant capability to withstand reverse voltages, and will be permanently damaged if it
is subjected to an appreciable magnitude of reverse voltages and only block the forward
voltage, and should be used in such a way that no significant reverse voltage ever comes
across it. In contrast, the thyristor which is also a unidirectional switch has a symmetrical
voltage blocking capability in that it can block approximately the same voltage in both
forward and reverse directions.
There are two types of switching control:
(1) Continuous :- in this both the turn ON and turn OFF operations can be
implemented by the same control circuit. ie. Turn ON is implemented by
giving a voltage or current input to the control terminal. Turn OFF is
achieved by terminating this input. This type of control is termed as
“continuous”.
(2) Latching:- There are some devices which can be turned ON by a short
positive pulse and turned OFF by a short negative pulse on its control
terminal. This type of control may be described as “ latching ”, because the
device is latched into the required state by a pulse of short duration.
Loss Calculation and selection of heat sink
Power losses within the thyristor are converted into heat and tend to increase the
temperature of the junctions. The rate of dissipation of heat should be such that the junction
temperature doesnot increase beyond the permissible value. The rate of heat dissipation
depends on the surface areas(dissipating heat) and the ambient temperature. The maximum
power ratings have to be specified so that abnormal temperature rise may not occur.
Heat Sink:
Thermal resistance:
Thermal energy or heat flows from a region of higher temperature to a region of lower
temperature. This is similar to the flow of current from higher to lower potential in an electric
circuit.
Thermal resistance is analogues to electrical resistance, i.e the resistance offered to
thermal power flow. Thermal resistance is denoted by θ. If power loss, Pav in watts, causes
the temperature of two points to be at T1° C and T2° C where T1 ˃ T2 then thermal resistance
is given by
12 
T1  T2
C / w
Pav
The heat generated in a thyristor due to internal losses is taken to be developed at a junction
within the semi conductor material. The heat flow in a thyristor is taken as under
i)
From the junction to thyristor case
ii)
From the thyristor case to heat sink
iii)
From the heat sink to the surrounding ambient fluid (air or water )
Fig.1.3 Thermal equivalent circuit for a thyristor
There is thus thermal resistance θjC between temperature Tj and case temperature TC.
similarly there is thermal resistance θCS between TC and sink temperature TS and θSA
between TS and ambient temperature TA. using the electrical analogy, a thermal equivalent
circuit from junction to ambient fluid can be drawn as shown in figure. Here P av is the
average rate of heat generated at a thyristor junction and is analogous to constant current
source.
Pav 
T j  TC

 jC

T j  TA
 jA
TC  TS
CS

TS  TA
 SA
where  jA   jC  CS   SA
is the total thermal resistance between junction and ambient. The junction to case , thermal
resistance θjC is specified in the thyristor data sheet. The case to sink thermal resistance θCS
depends on the size of the device, flatness of the case surface, the clamping pressure and the
use of conducting grease between the interfaces.
In addition to θjC, thyristor data sheet also specify θCS, assuming correct installation
procedure and use of the interface thermal lubrication. θjC & θCS are usually specified by the
manufacturer and θSA depends upon the type of sink used, surface area, and finish of the heat
sink, volume occupied by the heat sink and the type of cooling.
The difference in temperature between junction and ambient is
Tj – TA = Pav (θjC + θCS + θSA)
= Pav (θjK) i.e total equivalent thermal resistance.
The immediate consequence of energy dissipation in a static switch is its temperature
rise. The exact location where the heat is generated is in the silicon pellet that actually is the
switch. The power losses of the switch raises the temperature of the pellet. The temperature
gradient thus created causes the heat power to flow outwards to the casing surface. To
facilitate the easier flow of heat power to the ambient atmosphere outside, it is common
practice to mount the casing on a “ heat sink” . heat sinks are made of metal, and provide a
large surface area from which the heat power can pass by convection and radiation to the
ambient atmosphere. The convection flow can be further enhanced , if needed, by using a fan
to provide forced air cooling.
The various components of the power loss in the junction region of a thyristor are as
under :
(i)
Forward conduction loss
The average forward conduction loss equals the product of average anode current
and the voltage drop across the thyristor. This loss is a major portion of total
losses in a thyristor.
(ii) Loss due to leakage current during forward and reverse blocking
Forward blocking loss occurs when a forward voltage is applied but the
thyristor is not conducting. A forward leakage current flows during this period. It
is the product of the forward blocking voltage and forward leakage current. This
loss is small.
Reverse blocking loss occurs when a reverse voltage is applied. It is equal to
the product of reverse voltage and reverse leakage current. This also small.
(iii) Switching losses at turn on and turn off
During turn on process, the voltage drop across a thyristor is high. Therefore
appreciable power loss occurs during turn on period.
During rapid turn off the reverse current may be as high as forward conduction
current. To limit this current an extra inductance is added in the circuit. The losses may be
appreciable if the thyristors are turned on & off many times in each cycle of main
frequency.
(iv) Gate triggering loss
This loss equals the product of gate voltage and gate current. Most thyristor
circuits use pulse signals for triggering. For such systems the gate power loss is
negligible.
Snubber circuits (switching aid circuit)
A Snubber circuit for a diode serves to protect it from damage that can arise due to an
over voltage spike during reverse recovery. A typical snubber circuit for a power diode
consist of a resistance in series with a capacitor connected across the diode, as shown in
figure.
Fig.1.4 Snubber circuit for power diode
During the decay of the reverse recovery current, the capacitor serves to limit the
voltage spike. The energy stored in the inductance of the reverse recovery loop serves to
charge the capacitor, there by reduce the over voltage spike. The resistance R dissipates some
of the energy and if suitably chosen, will damp out oscillations in the L-C circuit.
Power Diodes
A low power diode, called signal diode, is a pn junction device. A high power diode,
called power diode is also a pn junction device but with constructional features different from
a signal diode. The voltage current and power ratings of power diodes and transistors are
much higher than the corresponding ratings for signal devices. In addition, power devices
operate at lower switching speeds whereas signal diodes and transistors operate at higher
switching speeds. An important parameter that determines the selection of a power diode for
a static power converter application, is its “reverse recovery time”.
The power diode acts as a switch for various functions, such as switches in converters,
free wheeling in switching regulators, charge reversal of capacitor and energy transfer
between components, energy feedback from the load to the power source and voltage
isolation etc.
The p-n Junction
A p-n junction forms the basic building block of all power semiconductor devices. A
p-n junction is formed when p-type semiconductor is brought in metallurgical, or physical
contact with n-type semiconductor. A p-region has greater concentration of holes whereas
n region has more electron- concentration. In p-region, free holes are called majority
carriers and free electrons minority carriers. In n-region, free electrons are called majority
carriers whereas free holes are called minority carriers.
Doping densities in p and n type semiconductors may be different. As such, p type
material may be designated p+, p or p-; similarly n-type material as n+, n- etc.
(a) If doping (or acceptor) density in p-type semiconductor = doping (or donor)
density in n-type semiconductor, then it is called p-n junction. ( doping density
1016 cm-3 to 1017cm-3)
(b) If doping density in p-region(10 19) much greater than that in n-region (1017), it is
called p+ n junction.
(c) If doping density in n-type(1013) is less than that given in part(b), the junction is
called p+ n- junction.
(d) If both p and n layers are heavily doped(1019), it is called p+ n+ junction and if
very lightly doped, a p- n- junction is formed.
In general p+ indicates highly doped p region, n- lightly doped n region and so on.
Depletion Layer
When physical contact between p and n regions is made, free electrons in n material
diffuse across the junction into p material, see Figure 1.5(a). Diffusion of each electron from
n to p, leaves a positive charge behind in the n region near the junction. Similarly diffusion
of each hole from p to n, leaves a negative charge behind in the p region near the junction.
As a result of this diffusion, n region near the junction become positively charged and p
region in the vicinity of junction become negatively charged, figure 1.5(b). These charges
establish an electric field across the junction. When this field grows strong enough, it stops
further diffusion.
Fig.1.5 A p-n junction showing (a) direction of holes and electrons diffusion
(b) depletion region (c) effect of forward biasing and (d) effect of reverse biasing.
When electric field stops further diffusion, charge carriers don’t move. As a
consequence, opposite charges on each side of the junction produce immobile ions, fig 1.5(b).
The region extending into both p and n semiconductor layers is called depletion region or
space charge region. The width of depletion region, or depletion layer, is of the order of
5x10-4mm. in equilibrium, there is a potential difference of 0.7V across the depletion region
in silicon and 0.3V across the depletion region in germanium. This potential difference across
the depletion layer is called barrier potential.
When positive terminal of a battery is connected to p-type material and negative
terminal to n-type material, figure 1.5(c), the p-n junction is forward biased. Positive terminal
of the battery sucks electrons from p material leaving holes there. These holes travel through
p material towards the negative charge at p-n junction and thus neutralize partly this negative
charge. Similarly negative terminal of the battery injects electrons into n layer. These
electrons move through n material, reach the p-n junction thereby neutralizing partly the
positive charge. As a result width of depletion region gets reduced.
In case p material is connected to negative terminal of the battery and n material to
positive terminal of battery, then it can be deduced that width of depletion layer increases.
Fig 1.5(d). A rise in junction temperature also decreases width of depletion layer. As the
barrier potential depends on width of the depletion layer, the barrier potential decreases with
rise in junction temperature.
For power semi-conductor devices, it should be kept in mind that
(i)
A junction with lightly doped layer on its one side requires large
breakdown voltage.
(ii)
A junction with highly doped layers on its both sides requires low
breakdown voltage.
Basic Structure of Power diode
The complexities in constructing power diodes arise from the need to make them
suitable for high voltage and high current applications. The figure 1.5 shows the construction
of power diode. The bottom layer is n+ substrate. The doping density is 1019 cm-3. On n+
substrate, n- layer is epitaxially grown. The n- layer is called drift region and is typically
doped at 1014 cm-3. This drift region is determines the breakdown voltage of the device. On
the other side n+ substrate that forms the cathode of the diode. Finally the pn junction is
formed by diffusing in a heavily doped p+n type region that forms the anode of the diode.
Fig 1.5 (a) structural features of power diode.
(b) circuit symbol
CHARACTERISTICS OF POWER DIODES
Power diode is a two terminal, p-n semi-conductor device. The two terminals of diode
are called anode and cathode, the two important characteristics of power diodes are now
described.
Diode i-v characteristics
When anode is positive with respect to cathode, diode is said to be forward biased.
With increase of the source voltage Vs from zero value, initially diode current is zero. From
Vs = 0 to cut in voltage, the forward –diode current is very small. Cut in voltage is also known
as threshold voltage or turn –on voltage. Beyond cut in voltage, the diode current rises
rapidly and the diode is said to conduct. For silicon diode, the cut in voltage is around 0.7V.
When diode conducts, there is a forward voltage drop of the order of 0.8 to 1 V.
For low power diodes, current in the forward direction increases first exponentially
with voltage and then becomes almost linear as shown in fig 1.6 (b). for power diodes, the
forward current grows almost linearly with voltage, fig 1.6 (c). the high magnitude of current
in a power diode leads to ohmic drops that hide the exponential part of i-v curve. The drift
region (n-) forms a considerable drop in the ohmic resistance of power diodes.
When cathode is positive w.r.t anode, the diode is said to be reverse biased. In the
reverse biased condition a small reverse current called leakage current, of the order of µA or
mA flows. The leakage current is almost independent of the magnitude of reverse voltage
until this voltage reaches breakdown voltage. At this reverse breakdown voltage remains
almost constant but reverse current becomes quite high –limited only by the external circuit
resistance.
Fig 1.6 (a) A forward biased power diode. i-v characteristics of (b) signal diode
(c) power diode (d) ideal diode
A large reverse breakdown voltage, associated with high reverse current, leads to
excessive power loss that may destroy the diode. This shows that reverse breakdown of a
power diode must be avoided by operating it below the specific peak repetitive reverse
voltage VRRM. Fig 1.6 ( c) illustrates the i-v characteristics of power diode and VRRM. For an
ideal diode, the i-v characteristics are shown in figure 1.6 (d). Here voltage drop across
conducting diode vD = 0, reverse leakage current = 0, cut in voltage = 0 and reverse
breakdown voltage VRRM is infinite. VRRM same as peak inverse voltage (PIV). This is the
largest reverse voltage to which a diode may be subjected during its working.
DIODE REVERSE RECOVERY CHARACTERISTICS
After the forward diode current decays to zero, the diode continues to conduct in the
reverse direction because of the presence of stored charge in the depletion region and the
semiconductor layers. The reverse current flows for a time called reverse recovery time trr.
The diode regains its blocking capability until reverse recovery current decays to zero. The
reverse recovery time trr
is
defined as the time between the instant forward diode current
becomes zero and the instant reverse recovery current decays to 25% of its reverse peak
value IRM as shown in Figure.
Fig 1.7 Reverse recovery characteristics (a) Variation of forward current i f
(b) forward voltage drop vf (c) power loss in diode
The reverse recovery time is composed of two segments of time ta and tb ie. trr = ta + tb.
Time ta is the time between zero crossing of forward current and peak reverse current IRM.
During the time ta, charge stored in depletion layer is removed. Time tb is measured from the
instant of reverse peak value IRM to the instant when 0.25 IRM is reached. During tb charge
from the semiconductor layer is removed. The shaded area in figure represents the stored
charge, or reverse recovery charge, QR which must be removed during the reverse recovery
time trr. The ratio tb/ta is called the softness factor or S factor. This factor is a measure of
the voltage transients that occur during the time diode recovers. Figure1.7 (b) represents
the waveform of forward voltage drop vf across the diode. The product of vf and if gives the
power loss in a diode. Its variation is shown in fig.1.7 (c). The average value of vf if gives
the total power loss in a diode. It can be observed that major power loss in a diode occurs
during the period tb.
The peak inverse current IRM = ta.di/dt
where di/dt is the rate of change of reverse current. The reverse recovery characteristics of
figure can be taken to be triangular. Under this assumption, storage charge QR is given by
QR 
1
I RM .t rr
2
Or
I RM 
2QR
t rr
If trr = ta , then from equation above,
I RM  t rr .
di
dt
From these equations, we get
t rr .
di 2QR

dt
t rr
or
t rr
 2Q
R

 di
 dt

1/ 2





i.e.
I RM
di  2QR 
 t rr .  
dt  di 
 dt 
 
1/ 2
.
di
dt
1/ 2
  di 
 2QR  
  dt 
It is seen from these equation that trr and peak inverse current IRM are dependent on
storage charge and rate of change of current di/dt. The storage charge depends on the forward
diode current If. This shows that reverse recovery time and peak inverse current depend on
forward field, or diode current.
A power electronics engineer must know IRM, QR, S factor, PIV etc in order to be able
to design the circuitry employing power diodes. These parameters are usually specified in the
catalogue supplied by the diode manufacturers.
Diodes are classified according to their reverse recovery characteristics, the three
types of power diodes are as under:
(i) General purpose diodes
(ii) Fast recovery diodes
(iii)Schottky diodes
(i) General purpose diodes
These diodes have relatively high reverse recovery time, typically 25µS and
are used in low speed applications. Generally the current rating of these diodes vary
from 1A to several thousands of amperes and the range of voltage rating is from 50V
to 5kV. They are used in electric traction, battery charging, electroplating and UPS.
(ii) Fast recovery Diodes.
The fast recovery diodes have low recovery time, normally less than 5 µS.
These are used in choppers, commutation circuits, SMPS, Induction heating etc.
These diodes current ratings ranges from less than 1A to hundreds of amperes and
voltage ratings from 50V to 3kV.
(iii)Schottky Diodes
The charge storage problem of a p-n junction can be minimised in a schottky
diode. It is accomplished by setting up a ‘barrier potential’ with a contact between a
metal and a semi conductor. The metal is usually aluminium and semi conductor is
silicon. Therefore schottky diode has aluminium-silicon junction. The silicon is n
type.
When schottky diode is forward biased, free electrons in n material move
towards the Al-n junction and then travel through the metal to constitute the flow of
forward current. Since metal doesnot have any holes, this forward current is due to the
movement of electrons only. As the metal has no holes, there is no storage charge and
no reverse recovery time. Therefore, it can be said that rectified current flow in
schottky diode is by the movement of majority carriers (electrons) only and the turn
off delay caused by recombination is avoided. As such, schottky diode can switch off
much faster than p-n junction diode.
As compared to p-n junction diode, a schottky diode has:
(1) lower cut in voltage.
(2) higher reverse leakage current and
(3) higher operating frequency.
CURRENT AND VOLTAGE RATINGS
Current Ratings:
Power diodes are usually mounted on a heat sink. This effectively dissipates the heat
arising due to continuous conduction. Current ratings are estimated based on temperature rise
considerations. The data sheet of a diode normally specifies three different current ratings.
These are: (1) the average current; (2) the rms current; and (3) the peak current.
A design engineer must ensure that each of these values are never exceeded. To do
that, the actual current (average, rms, and peak) in the circuit must be evaluated either by
calculation, simulation, or measurement. These values must be checked against the ones
given in the data sheet for that selected diode. The calculated values must be less than or
equal to the data sheet values.
Voltage Ratings :
For power diodes, a data sheet will give two voltage ratings. One is the repetitive peak
inverse voltage (VRRM) and the other is the non-repetitive peak inverse voltage. The nonrepetitive voltage (VRM) is the diode’s capability to block a reverse voltage that may occur
occasionally due to an overvoltage surge. On the other hand, repetitive voltage is applied on
the diode in a sustained manner.
To choose the repetitive peak reverse voltage, we first look at the theoretical
waveform of the voltge across the diode, that is to be expected in the circuit operation. From
this, we get the peak repetitive voltage to which the diode is subjected.
POWER TRANSISTORS
Power diodes are uncontrolled devices. ie. their turn-on and turn off characteristics are
not under control. Power transistors however possess controlled characteristics. These are
turned on when a current signal is given to base, or control terminal. The transistor is turned
on state so long as control signal is present. When the control signal is removed, a power
transistor is turned off.
Power transistors are of four types as under:
(i) Bipolar junction transistor (BJTs)
(ii) Metal oxide semi conductor field effect transistors (MOSFETs)
(iii) Insulated gate bipolar transistors (IGBTs)
(iv) Static Induction Transistors (SITs)
Bipolar Junction transistors (BJT)
A power BJT is a three layer, two junction npn or pnp semiconductor device. The
term bipolar indicates that current flow consists of a movement of both holes and electrons. A
BJT has 3 terminals named collector C, emitter E, and base B. An emitter is indicated by an
arrowhead indicating the direction of emitter current. Power transistors are npn type are
easy to manufacture and are cheaper also. Therefore use of npn transistors is very wide
in high voltage and high current applications.
Fig.1.8 Bipolar junction transistors (a) npn type and (b) pnp type.
Steady state characteristics:
Out of the 3 possible circuit configurations for a transistor, common emitter
arrangement is more common in switching applications. So a common emitter npn circuit for
obtaining its characteristics is considered as shown in figure 1.9 (a).
Fig 1.9 (a) npn transistor circuit characteristics (b) input characteristics and
(c) output characteristics.
Input characteristics:
A graph between base current IB and base emitter voltage VBE gives input
characteristics. As the base emitter junction of a transistor is like a diode, IB –VBE graph
resembles a diode curve. When collector emitter voltage VCE2 is more than VCE1, base current
, for the same VBE, decreases as shown in figure 1.9 (b).
Output characteristics:
A graph between collector current IC and collector emitter voltage VCE gives output
characteristics of a transistor. For zero base current ie.for IB =0, as VCE is increased, a small
leakage ( colletor) current exists as shown in figure 1.9( c). As the base current is increased
from IB = 0 to IB1, IB2 etc, collector current also rises as shown in figure 1.9 (c ).
Figure 1.10 (a) shows two of the output characteristic curves 1 for IB = 0 and 2 for
IB ≠ 0. The initial part of curve 2, characterised by low VCE, is called the saturation region. In
this region, the transistor acts like a switch. The flat part of curve 2 indicated by increasing
VCE and almost constant IC is the active region. In this region transistor acts like an amplifier.
Almost vertically rising curve is the breakdown region which must be avoided at all costs.
Fig. 1.10 (a) output characteristics and load line for npn transistor and
(b) electron flow in an npn transistor.
For load resistence RC , the collector current IC is given by
VCC  VCE
RC
this is the equation of load line. It is shown as line AB in figure 1.10 (a). A load line is the
IC 
locus of all possible operating points. Ideally when transistor is on, VCE is zero and
IC
=
Vcc / Rc. This collector current is shown by point A on the vertical axis. When the
transistor is off, or in the cutoff region, Vcc appears across collector –emitter terminals and
there is no collector current. This value is indicated by point B on the horizontal axis. For the
resistive load, the line joining points A and B is the load line.
Relation between α and β:
Most of the electrons, propotional to IE givenout by emitter, reach the collector as
shown in fig (b). in other words, collector current IC though less than emitter current IE is
almost equal to IE. A symbol α is used to indicate how close in value these two currents are.
Here α called forward current gain, is defined as

IC
IE
As IC < IE, value of α varies from 0.95 to 0.99
In a transistor , base current is effectively the input current and collector current is the output
current. The ratio of collector (output) current IC to base (input) current IB is known as the
current gain β.

IC
IB
As IB is much smaller, β is much more than unity, its value varies from 50 to 300.
From figure, using KCL we can write
IE = IC + IB
In this, emitter current is the largest of the 3 components, collector current is almost equal to
but less than, emitter current. Base current has the least value.
Dividing both sides of this equation we get,
IE
I
 1 B
IC
IC
1

or  
Transistor switch

1-
 1
1

and  

 1
Transistor operation as a switch means that transistor operates either in the saturation
region or in the cut off region and nowhere else on the load line. As an ideal switch, the
transistor operates at point A in the saturated state as closed switch with VCE = 0 and at point
B in the cut off state as an open switch with IC = 0.
In practice, the large base current will cause the transistor to work in the saturation
region at point A’ with small saturation voltage VCES. Here subscript S is used to denote
saturated value. Voltage VCES represents on state voltage drop of the transistor which is of
the order of about 1V. When the control, or base, signal is reduced to zero, the transistor is
turned off and its operation shift to B’ in the cut off region. A small leakage current ICEO
flows in the collector circuit when the transistor is off.
For Figure , KVL for the circuit consisting of VB, RB and emitter gives
VB – RB IB – VBE = 0
IB 
VB  VBE
RB
VCC  VCE  I C RC
Also from figure
VCE = VCC – IC RC = VCC –β IB RC
Or,
 VCC 
Also
RC
RB
VB  VBE 
VCE = VCB + VBE
Or,
VCB = VCE -VBE
If VCES is the collector current saturation voltage , then collector current ICS is given by
I CS 
VCC  VCES
RC
and the corresponding value of minimum base current, that produces saturation, is
I BS 
I CS

If IB < IBS, the transistor operates in the active region,i.e somewhere between the
saturation and cut off points. If
I
B
>
IBS, VCES is almost zero and
IC is given by
ICS = VCC/ RC. This shows that collector current at saturation remains substantially constant
even if IB is increased. With IB > IBS, hard drive of transistor is obtained. With hard
saturation on- state losses of transistor increases. The ratio of IB and IBS is defined as the
overdrive factor (ODF).
Therefore ODF 
IB
I BS
The ratio of ICS to IB is called forced current gain βf where
f 
I CS
 natural current gain or h FE
IB
The total power loss in the two junctions of a transistor is
PT = VBE IB +VCE IC
Under saturated state, VBES
>
VCES, this means BEJ is forward biased. Also the
equation shows that VCB is negative under saturated conditions, therefore CBJ is also forward
biased. In other words, under saturated conditions, both junctions in a power transistor are
forward biased.
BJT Switching Performance (Dynamic performance)
When base current is applied , a transistor doesnot turn on instantly because of the
presence of internal capacitance. Figure shows the various switching waveforms of an npn
power transistor with resistive load between collector and emitter, Fig.1.11.
Fig 1.11 npn transistor with resistive load
When input voltage VB to base circuit is made –V2 at t0 junction EB or EBJ is reverse
biased, vBE = -V2, the transistor is off, iB =Ic = 0 and vCE = VCC, Fig.1.12. At time t1, input
voltage vB is made +V1 and iB rises to IB1 as shown in figure 1.9. After t1, base emitter voltage
vBE begins to rise gradually from –V2 and collector current iC begins to rise from zero and vCE
starts falling from its initial value VCC. After some time delay td, called delay time, the
collector current rises to 0.1 ICS, vCE falls from VCC to 0.9VCC and vBE reaches VBES = 0.7V.
This delay time is required to charge the base emitter capacitance to VBES = 0.7 V. Thus ,
delay time td is defined as the time during which the collector current rises from zero to 0.1
ICS and collector emitter voltage falls from VCC to 0.9 VCC.
After delay time td, collector current rises from 0.1 ICS to 0.9 ICS and vCE falls from
0.9VCC to 0.1 VCC in time tr. this time tr is known as rise time which depends upon transistor
junction capacitances. Rise time tr is defined as the time during which collector current
rises from 0.1 ICS to 0.9 VCC and collector emitter voltage falls from 0.9 VCC to 0.1 VCC. This
shows that total turn on time ton = td + tr. The transistor remains in the on, or saturated state
so long as input voltage stays at V1, fig.1.12(a).
In order to turn off the transistor, the input voltage vB and input base current iB are
reversed. At time t2, input voltage vB to base circuit is reversed from V1 to –V2. At the same
time, iB changes from IB1 to –IB2 as in figure 1.12(b). Negative IB2 removes excess carriers
from the base. The time ts required to remove these excess carriers is called storage time and
only after ts, base current IB2 begins to decrease towards zero. Transistor comes out of
saturation only after ts. storage time ts is usually defined as the time during which collector
current falls from ICS to 0.9 ICS and collector emitter voltage vCE rises from VCES to 0.1 VCC.,
fig 1.12(d) and (e). Negative input voltage enhances the process of removal of excess carriers
from base and hence reduces the storage time and therefore, the turn off time.
Fig 1.12 Switching waveforms for npn power transistor of Fig.1.11
After ts, collector current begins to fall and collector emitter voltage starts building up.
Time tf, called fall time, is defined as the time during which collector current drops from
0.9 ICS to 0.1 ICS and collector emitter voltage rises from 0.1 VCC to 0.9 VCC, fig 1.12(d) and
(e). Transistor turn off time toff = tS + tf. In the figure, tn = conduction period of transistor
to = off period, T = 1/f is the periodic time and f is the switching frequency.
Safe Operating Area (SOA)
The safe operating area of a power transistor specifies the safe operating limits of
collector current IC versus collector emitter voltage VCE . For reliable operation of the
transistor, the collector current and voltage must always lie within this area. Actually two
types of safe operating areas are specified by the manufacturers, FBSOA and RBSOA.
Fig.1.13 typical forward biased safe
Fig. 1.14 typical reverse block safe
operating area (FBSOA) for a power
operating area (RBSOA) for a power
transistor (logarithmic scale)
transistor
The forward base safe operating area (FBSOA) pertains to the transistor operation
when base emitter junction is forward biased to turn on the transistor. For a power transistor
figure shows typical FBSOA for its dc as well as single pulse operation. The scale for IC and
VCE are logarithmic. Boundary AB is the maximum limit for dc and continuous current for
VCE less than about 80V. For VCE ˃ 80V, collector current has to be reduced to boundary
BC so as to limit the junction temperature to safe value. For still higher VCE current should
further be reduced so as to avoid secondary breakdown limit. Boundary CD defines this
secondary breakdown limit. Boundary DE gives the maximum voltage capability for this
particular transistor.
For pulsed operation power transistor can dissipate more peak power so long as
average power loss is within safe limits of junction temperature. In fig.1.13, 5ms, 500µs etc
indicates pulse widths for transistor is on. It is seen that FBSOA increases as pulse width is
decreased.
During turn off a transistor is subjected to high current and high voltage with base
emitter junction reverse biased. Safe operating area for transistor during turn off is specified
as reverse blocking safe operating area (RBSOA). This RBSOA is a plot of collector current
versus collector –emitter voltage as shown in figure 1.14. RBSOA specifies the limits of
transistor operation at turn off when the base current is zero or when the base emitter
junction is reverse biased ( i.e with base current negative.) With increased reverse bias, area
RBSOA decreases in size as shown in figure 1.14.
Drive Circuits
A well designed base drive circuit should provide adequate base current to guarantee
a saturated ON state under all conditions of collector current that can occur during operation.
Also a fast rising base current wave form will ensure fast turn ON switching. During turn
OFF switching a reverse base current of sufficient amplitude will result in the reduction of
the storage time and therefore faster switching . For this purpose, it will be necessary to apply
a reverse voltage pulse. It is not necessary to maintain this reverse voltage after the reverse
current has fallen to zero, when the excess minority carriers in the base zone have been
removed. It is important to remember that the reverse voltage capability of the base emitter
junction is very small, and any reverse voltage should be well below the rated value to avoid
damage to the transistor.
Fig.15 Example of a base drive circuit for a junction power transistor
An example of base drive circuit for a power transistor switch is given in figure 1.15.
The base is driven from the secondary coil C3 of 3 winding transformer. The transformer has
two primary coil labelled C1 and C2. To implement the turn ON switching, a positive voltage
is applied at the terminal labelled A in figure. This causes the transistor T1 to turn ON ,
energizing the primary coil C1. At this time, the primary C2 is turned OFF by transistor T2.
This happens because T3 turns ON and connects the base of T2 to ground. When the voltage
pulse at A goes to the zero voltage level, both T1 and T3 turn OFF. When T1 turns OFF, the
primary coil C1 is disconnected from the power supply. The turning OFF T3 causes the
primary coil C2 to be energised by the turning ON of T2. Therefore a negative voltage appears
on the secondary coil C3. This negative voltage should be well below the rated reverse
voltage of the base emitter junction.
In this circuit, the reverse voltage on the base terminal may be maintained during the
entire OFF period of the transistor depending on the pulse width capability of the pulse
transformer. The pulse transformer provides isolation between the switching control circuit
and the power circuit of the transistor. This pulse transformer must have the necessary pulse
width capability to ensure the continued presence of the output pulse, during the entire
duration of the ON time of the transistor.
Switching Aid Circuits (Snubber circuits)
Switching circuits also called snubber circuits, are used for the purpose of limiting the
stress on static semiconductor switching devices during switching transistions. A typical
switching aid circuit used with a junction power transistor is shown in figure. This circuit is
for the purpose of limiting the operating point within the safe operating area (SOA) during
turn OFF switching.
The circuit consist of a capacitor C, a diode D and a resistor R when the transistor is
in the ON state, the voltage across it and therefore across the switching aid circuit, is nearly
zero. The purpose of capacitor diode combination is to slow down the rate of rise of voltage
across the switch during the turn OFF switching transition. This happens because during this
time the diode turns ON and the capacitor starts charging. In the OFF state of the transistor,
the capacitor remains charged to the full blocking voltage. It discharges during the next turn
ON switching of the transistor. The resistor R for the purpose of limiting the peak value of
the discharge current through the transistor. Each time the transistor is turned ON, the total
energy stored in the capacitor is dissipated in the resistor. Therefore the power dissipation in
R is proportional to the switching frequency and to the square of the blocking voltage.
POWER DARLINGTONS
Power Darlingtons are used primarily for the purpose of reducing the control current
requirement for turn ON switching. Figure shows how the two junction transistors that
constitute the Darlington switch are interconnected. TM is the main power transistor. TA is the
auxiliary transistor, of low power, which provides the base current to the main transistor. At
the present time integrated Power Darlingtons in which both the transistors and their
interconnections are fabricated on the same silicon chip, are available for large ratings.
Externally they have only three terminals, as in single transistors.
Fig 1. 16 Power Darlington
Referring to figure 1.16 , the base current IBA needed to maintain the saturated ON state for
the auxiliary transistor with a collector current ICA will be given by the relationship
ICA = hFE(A)IBA
The corresponding emitter current which is the base current of the main transistor, will be
IBM = (1+hFE(A)IBA
The corresponding collector current ICM will be
ICM = hFE(M)IBM = hFE(M)(1+hFE(A))IBA
Therefore the total load current in the external circuit will be
I = ICA + ICM = (hFE(A) + hFE(M) + hFE(A) hFE(M)) IBA
Since the hFes are relatively large numbers, their product will be very much larger, and
therefore we may approximate the above expression as
I = hFE(A) hFE(M) IBA
This means that the Darlington switch has an overall current gain approximately equal
to the product of the current gain of the individual transistors constituting the switch. This
explains why the Darlington switch needs only a very much smaller control current for its
operation, in comparison with a single power transistor, to switch the same load current.
However, the switching times of power Darlingtons are somewhat longer than comparable
single transistors, as may be expected from the fact that two transistors need to switch in a
Darlington.
POWER MOSFETs
A metal –oxide-semiconductor field effect transistor (MOSFET) is a recent device
developed by combining the areas of field effect concept and MOS technology.
A power MOSFET has three terminals called drain (D), source (S), and gate (G) in place of
the corresponding 3 terminals collector, emitter and base of BJT. The circuit symbol is shown
in figure 1.17(a). Here arrow indicates the direction of electron flow. It is a voltage controlled
device because the output current (drain current) can be controlled by gate source voltage
(VGS). Power MOSFET is a unipolar device because its operation depends upon the flow of
majority carriers only. The control signal (gate current) required is very less due to its high
input impedance in the order of 109 ohm. MOSFET do not have the problem of secondary
breakdown. They are now finding increasing applications in low-power high frequency
converters.
Power MOSFETs are of two types
1) Depletion MOSFET
2) Enhancement MOSFET
Each types are further classified as
(i) n channel MOSFET
(ii) p channel MOSFET
Out of these, n channel enhancement MOSFET is more common because of its higher
mobility of electrons.A simplified structure of n channel planar MOSFET of low power
rating is shown in Fig. 1.17(b).
Fig.1.17 N channel enhancement power MOSFET
(a) circuit symbol (b) its basic structure.
The figure 1.18 shows the constructional details of power MOSFET. It is a planar
diffused metal oxide semiconductor (DMOS) structure for n channel power MOSFET.
Fig. 1.18 basic structure of n-channel DMOS power MOSFET
The bottom layer is n+ substrate. The doping density of this layer is 1019 cm-3. On n+
substrate, high resistivity n- layer is epitaxially grown. The n- layer is called the drain
drift region and is typically doped at 1014 - 1015 cm-3. This region determines the
breakdown voltage of the device. On the other side n+ substrate, a metal layer is deposited
to form the drain terminal. Now p (1016 cm-3) regions are diffused in the epitaxially
grown n- layer. Further n+ regions(1019cm-3) are diffused in p- regions as shown in figure.
A layer of metal is also deposited on SiO2 layer which is then etched so as to fit metallic
source and gate terminals.
Principle of operation
When the gate source voltage VGS is zero, and drain – source voltage VDD is present,
then n- p- junctions are reverse biased and no current flows from drain to source. Now device
is considered as open switch. When gate terminal is made positive with respect to source, an
electric field is created and electrons form n channel in the p- regions as shown. Now the
current flows from drain to source and the current direction is indicated by arrows. The gate
voltage VGS is increased drain current ID also increases. i.e output current can be controlled
by gate voltage. So power MOSFET is also called as voltage controlled device. Here the
controlling parameter is VGS.
An examination of the basic structure of n channel DMOS power MOSFET
(PMOSFET) reveals that a parasitic npn bipolar junction transistor exists between the source
and drain as shown in figure 1.19.
Fig.1.19 PMOSFET showing parasitic BJT and parasitic diode
The p body act as the base, n+ layer as the emitter (or source) and n- layer as the
collector (or drain) of this BJT. Since source is connected to both base and emitter of
parasitic BJT, the source short circuits both base and emitter. As a result potential difference
between base and emitter of the parasitic BJT is zero and therefore, BJT is always in the cutoff state.
Also vertical travel from source to drain indicates the existence of a parasitic diode as
shown in figure. The parasitic diode with source acting as anode and drain as cathode may be
used in half bridge or full bridge rectifiers. The parasitic diode also shows that reverse
voltage blocking capability of PMOSFET is almost zero. This inbuilt diode is an advantage in
inverter circuits.
In fig.1.18, source is negative and drain is positive. Therefore, electrons flow from
source to n+ layer, then through n channel of p-layer and further through n- and n+ layer to
drain. The current direction is shown in figure 1.18. Since the conduction of currents due to
the movement of electrons only, PMOSFET is a majority carrier device. Hence time delays
caused by removal or recombination of minority carriers are eliminated during the turn off
process of this device. Owing to its low turn-off time, PMOSFET can be operated in a
frequency range of 1 to 10 MHz.
PMOSFET Characteristic
The basic circuit diagram for n channel PMOSFET is shown in figure 1.20, where voltage
and currents are as indicated. The source terminal S is taken as common terminal, as usual,
between the input and output of a MOSFET.
Fig.1.20 N- channel power MOSFET (a) circuit diagram (b) its typical transfer
characteristic.
(a) Transfer Characteristics. This characteristics shows the variation of drain current ID
as a function of gate-source voltage VGS. Figure 1.20(b) shows typical transfer
characteristics for n channel PMOSFET. Threshold voltage VGST is an important
parameter of MOSFET. VGST is the minimum positive voltage between gate and
source to induce n-channel. Thus for threshold voltage below VGST, device is in the
off state. Magnitude of VGST is of the order of 2 to 3V.
(b) Output Characteristics. PMOSFET output characteristics shown in figure.1. 21(a),
indicate the variation of drain current ID as a function of drain-source voltage VDS,
with gate-source voltage VGS as a parameter. For low values of VDS, the graph
between ID-VDS is almost linear; this indicates a constant value of on-resistance
RDS = VDS/ID. for given VGS,if VDS is increased output characteristics is relatively flat,
indicating that drain current is nearly constant. A load line intersects the output
characteristics at A and B. Here A indicates fully on condition and B fully off state.
PMOSFET operates as a switch either at A or at B just like a BJT.
When power MOSFET is driven with large gate source voltage, MOSFET is
turned ON, VDS.ON is small. Here the MOSFET acting as a closed switch, is said to be
driven into ohmic region (called saturation region in BJT). When device turns ON,
PMOSFET traverses iD- VDS characteristics from cut-off, to active region and then to
the ohmic region, fig.1.21(a). When PMOSFET turns OFF, it takes backward journey
from ohmic region to cut off state.
Fig. 1.21 (a) Output characteristics of PMOSFET (b) Switching waveforms for
PMOSFET
(c) Switching Characteristics. The switching characteristics of a power MOSFET are
influenced to a large extent by the internal capacitance of the device and the internal
impedance of the gate drive circuit. At turn on there is an initial delay tdn during
which input capacitance charges to gate threshold voltage VGST. Here tdn is called
turn on delay time.
There is further delay tr called rise time, during which gate voltage rises to VGSP, a
voltage sufficient to drive the MOSFET into on state. During tr drain current rises from zero
to full –on current ID. thus the total turn on time is ton = tdn +tr. The turn on time can be
reduced by using low impedance gate- drive source.
As MOSFET is a majority carrier device, turn-off process is initiated soon after removal
of gate voltage at time t1. The turn off delay time tdf is the time during which input
capacitance discharges from overdrive gate voltage V1 to VGSP.
The fall time tf is the time during which input capacitance discharges from VGSP to
threshold voltage VGST. During tf, drain current falls from ID to zero. So when VGS ≤ VGST ,
PMOSFET turn-off is complete. Switching waveforms for a power MOSFET are shown in
figure 1.21(b).
Switching aid circuit (Snubber Circuits) :
In general it is desirable to use a snubber circuit with a power MOSFET to protect it
from excessive stress during switching transitions. Such a circuit will be similar to those we
have described for junction power transistors. During turn off switching , the charging of the
drain to gate capacitor results in a current flow in the ditection from the drain terminal to the
gate . The external gate circuit condition can be such that this current raises the gate potential
and leads to a spurious turn on. Such an occurance will result in device damage. Therefore
the turn off transition is an interval during which the device may be overstressed because of
the excessive dv/dt. The snubber circuit component s can be suitably chosen to limit the dv/dt
if required.
The power MOSFET has an integral reverse diode whose recovery characteristics are
similar to those we have described earlier for fast recovery diodes. Therefore transient over
voltages can occur leading to excessive values of forward voltage across the device, during
the recovery of the integral diode, in exactly the same way as we described for single diodes.
This aspect also needs to be considered in the choice of the snubber components.
Gate Drive Circuits for Power MOSFETs
To exploit the fast switching capability of the power MOSFET, to realize high
repetitive switching frequencies, it is necessary to provide steeply rising gate pulses, to
achieve fast turn ON. This results in a gate current pulse of large amplitude, because of gate
to drain capacitance and gate to source capacitance. Integrated circuit models specifically
designed as “drivers” for power MOSFETs are presently available.
Electrical isolation between the switching control circuit and the power circuit is
generally needed in static power converters. This is achieved by the use of a pulse
transformer, which should have the required rise time and pulse width capabilities. A gate
drive circuit with these features is shown in figure
Fig.1.22 Gate Drive circuits for power MOSFETs.
(a) Using pulse transformer
(b) using Opto coupler
Two aspects of the circuit of figure 1.22 (a) need careful attention before it can be
made to work satisfactorily. First it should be noted that the pulses applied to the primary of
the pulse transformer are unidirectional and will have a DC component. This can cause
excessive saturation of the core unless the resulting DC component of the primary current is
limited, say by means of a suitably placed resistance. The second aspect is to ensure that the
pulse transformer is designed to reproduce the primary pulse with fast enough rise time and
low droop.
A popular method used for driving power MOSFET is to use an opto-coupler to
provide the required isolation. Such a scheme needs a power supply for the gate circuit that is
isolated from the control circuit power supply. Integrated circuit chips intended for the
specific purpose of the isolated driving of power MOSFETs and IGBTs can be used. Figure
1.22(b) shows such a scheme. The circuit within the IC package is within the broken lines. To
drive the power MOSFET, a current pulse of the required pulse width is sent through the
LED shown. Light from this falls on a photo diode and causes the circuit block shown inside
to turn ON the transistor labelled Q1. This causes the positive power supply voltage labelled
V+ which may be typically about 12V, to be applied to the gate, to turn ON the power device.
The circuit shown also has the means to apply a small negative voltage to the gate, while
turning OFF and during OFF periods. This may help to improve the switching performance.
The external resistance R limits the initial charging gate current to a value safe for the
transistors Q1 and Q2. The isolated power supply provides the positive voltage V+ and the
negative voltage V-. the common terminal of the isolated power supply is connected to the
source terminal of the device.
Comparison Between MOSFET and BJT
MOSFET
BJT
1. Power MOSFET has lower switching BJT has higher switching losses
losses
2. It has more conduction losses
It has low conduction losses
3. It is a voltage controlled device
It is current controlled device
4. It is a unipolar device
It is bipolar device
5. Power MOSFET operate at switching BJT operate at switching frequencies in the
frequencies in the MHz range
6. MOSFET
has
+ve
kHz range
temperature
coefficient
BJT has -ve temperature coefficient
7. Secondary breakdown doesnot occur
in MOSFET
BJT has Secondary breakdown.
8. MOSFETs are available with ratings BJTs are available with ratings upto 1200V,
upto 500V, 140A
800A
INSULATED GATE BIPOLAR TRANSISTOR (IGBTs)
IGBT has been developed by combining into it the best qualities of both BJT and
PMOSFET. Thus IGBT possesses high input impedance like a PMOSFET and has low on
state power loss as in BJT. Also, IGBT is free from second break down problem present in
BJT. All these merits have made IGBT very popular amongst power electronics engineers.
IGBT is also known as metal oxide insulated gate transistor (MOSIGT), conductively
modulated field effect transistor (COMFET) or gain modulated FET (GEMFET). It was also
initially called insulated gate transistor (IGT).
Basic Structure:
Figure 1.23 illustrates the basic structure of an IGBT. It is constructed in the same
manner as a power MOSFET. There is however a major difference in the substrate. The n +
layer substrate at the drain in a PMOSFET is now substituted in the IGBT by a p+ layer
substrate called collector C.
Fig.1.23 Basic structure of an insulated gate bipolar transistor (IGBT)
In IGBT, p+ substrate is called injection layer because it injects holes into n- layer.
The n- layer is called drift region. Thickness of n- layer determines the voltage blocking
capability of IGBT. The p layer is called body of IGBT. The n- layer in between p+ and p
regions serves to accommodate the depletion layer of pn- junction, ie. junction J2.
Equivalent Circuit:
An examination of figure 1.23, reveals that if we move vertically up from collector to
emitter, we come across p+,n-,p layers. Thus, IGBT can be thought of as the combination of
MOSFET and p+ n- p transistor Q1 as shown in figure 1.24(b). Here Rd is resistance offered by
n- drift region.
Fig 1.24 IGBT (a) basic structure showing parasitic transistors and thyristor
(b) approximate equivalent circuit (c) exact equivalent circuit and
(d) circuit symbol.
Figure 1.24(a) also shows the existence of another path from collector to emitter; this
path is collector, p+, n-, p (n channel), n+ and emitter. There is thus another inherent transistor
Q2 as n-pn+ in the structure of IGBT as in figure 1.24(a). The interconnection between two
transistors Q1 and Q2 is shown in figure(c).here Rby is the resistance offered by p region to the
flow of hole current Ih. The two transistor equivalent circuit shown in figure 1.24 (c)
illustrates that an IGBT structure has a parasitic thyristor in it. Parasitic thyristor is also
shown dotted in figure 1.24(a). Figure 1.24(d) gives the circuit symbol of an IGBT.
Principle of Operation
When collector is made positive with respect to emitter, IGBT gets forward biased .
with no voltage between gate and emitter, two junctions between n- region and p
region(junction J2) are reverse biased; so no current flows from collector to emitter.
When gate is made positive with respect to emitter by voltage V G, with gate emitter
voltage more than the threshold voltage VGET of IGBT, an n channel or inversion layer is
formed in the upper part of p region as in power MOSFET. This n channel short circuits the
n- region with n+ emitter regions. An electron movement in the n channel, in turn, causes
substantial hole injection from p+ substrate layer into the epitaxial n- layer. A forward current
IC is established as shown in figure.
Current IC or IE, consists of two current componenets: (i) hole current Ih due to
injected holes flowing from collector p+n-p transistor Q1, p-body region resistance Rby and
emitter and (ii) electronic current Ie due to injected electrons flowing from collector, injection
layer p+, drift region n-, n channel resistance Rch, n+ and emitter. i.e.IC = IE = Ih+Ie.
It is seen from figure (a) and (c) that IGBT structure has two inherent transistors Q 1
and Q2 which constitute a parasitic thyristor. When IGBT is on, the hole current flows
through transistor p+n-p and p-body resistance Rby. If load current IC is large, hole component
of current Ih would also be large. This large current would increase the voltage drop Ih.Rby.
which may forward bias the base p-emitter n+ junction of transistor Q2. As a consequences,
parasitic transistor p+n-p labelled Q1. The parasitic thyristor, consisting of Q1 and Q2,
eventually latches on through regenerative action, when sum of their current gains α1 + α2
reaches unity as in a conventional thyristor. With parasitic thyristor on, IGBT latches up and
after this, collector emitter current is no longer under the control of gate terminal. The only
way now to turn off the latched up IGBT is by forced communication of current as is done in
a conventional thyristor. If the latch up is not aborted quickly, excessive power dissipation
may destroy the IGBT. The device manufactures always specify the maximum permissible
value of load current ICE that IGBT can handle without latch up.
IGBT Static Characteristics
The circuit of figure 1.25 shows the various parameters pertaining to IGBT
characteristics.
Fig. 1.25 IGBT (a) circuit diagram (b) static i-v characteristics and (c) transfer
characteristics.
Static V-I characteristics of an IGBT (n channel type) shows the plot of collector
current IC versus collector- emitter voltage VCE for various values of gate – emitter voltages.
These characteristics are shown in figure 1.25 (b) . In the forward direction, the shape of the
output characteristics is similar to that of BJT. But here the controlling parameter is gate –
emitter voltage VCE because IGBT is a voltage –controlled device.
The transfer characteristics of an IGBT is a plot of collector current IC – VGE as shown
in figure 1.25(c). This characteristic is same as power MOSFET. When VGE ˂ VGET, IGBT is
in the off state. When the device is off, junction J2 blocks forward voltage and in case reverse
voltage appears across collector and emitter, junction J1 blocks it.
Switching Characteristics:
Switching characteristics of an IGBT during turn on and turn off are shown in figure
1.26. The turn on time is defined as the time between the instants of forward blocking to
forward on state. Turn on time is composed of delay time tdn and rise tr, i.e ton = tdn + tr.
Fig 1.26 IGBT turn on and turn off characteristics.
Delay time: The delay time tdn is defined as the time for the collector- emitter voltage to fall
from VCE to 0.9 VCE. Here VCE is the initial collector –emitter voltage. Time tdn may also be
defined as the time for the collector current to rise from its initial leakage current ICE to 0.1IC.
here IC is the final value of collector current. During this period gate emitter voltage increases
from zero to gate emitter threshold voltage (VGET).
Rise Time tr: The rise time tr is the time during which collector –emitter voltage falls from
0.9 VCE to 0.1VCE. it is also defined as the time for the collector current to rise from 0.1IC to
its final value IC. After time ton, the collector current is IC and the collector emitter voltage
falls to small value called conduction drop = VCES where S denotes saturated value.
Turn off Process: The turn off time consists of 3 intervals; (i) delay time tdf (ii) initial fall
time tf1 and (iii) final fall time tf2;(time taken for recombination of stored charge in base
region). toff = tdf + tf1 + tf2.
Delay time tdf: The delay time is the time during which gate voltage falls from VGE to
threshold voltage VGET. As VGE falls to VGET during tdf; the collector current falls from IC to
0.9 IC. At the end of tdf, collector –emitter voltage begins to rise.
First fall Time tf1: the first fall time tf1 is defined as the time during which collector current
falls from 90 to 20% of its initial value IC, or the time during which collector-emitter voltage
rises from VCES to 0.1 VCE.
Final Fall Time tf2: the final fall time tf2 is the time during which collector – emitter voltage
rises from 0.1VCE to final value VCE. during thi time IC decreases from 0.2 IC to 0.1 IC.
Gate Drive circuits:
The gate to collector capacitance for the IGBT tends to be significantly smaller in
comparison with the corresponding gate to drain capacitance of the power MOSFET. Since it
is this capacitance that gets magnified during switching due to the miller effect, this is an
advantage resulting in a reduction of the effective input capacitance seen by the gate drive
circuit. The gate drive circuits for IGBTs are similar to those for power MOSFETs. (See the
figure for gate drive circuits for power MOSFET).
Comaparison of IGBT with MOSFET
IGBT
MOSFET
1. In IGBT the 3 terminals are gate In PMOSFET the terminals are gate source
emitter and collector
and drain
2. High input impedance
High input impedance
3. Voltage controlled device
Voltage controlled device
4. With rise in voltage rating, the
increment in on state voltage drop is
more dominant in PMOSFET than it
is in IGBT. This means IGBTs can be
designed for higher voltage rating
than PMOSFET.
With rise in temperature, the increse in on
state resistance in PMOSFET is much
pronounced than in IGBT , so on state
voltage drop and losses rise rapidly in
PMOSFET than in IGBT
Applications of IGBTs
They are widely used in medium power applications sucha s dc motor and ac
motor drives, UPS, power supplies relays and contactors.
Silicon Controlled rectifier (SCR)
The thyristor, also known as the silicon controlled rectifier (SCR) was the first solid
state power semiconductor device to be developed to function as a controlled switch, with
large current and voltage capability.later on, many other devices having characteristics
similar to that of a thyristor were developed. These semi conductor devices, with their
characteristics identical with that of thyristor, are Triac, Diac, Silicon controlled switch,
Programmable unijunction transistor(PUT), GTO, RCT etc. This whole family of
semiconductor devices is given the name thyristor. This thyristor means family of
semiconductor devices used for power control in dc and ac systems. Among these, SCR is the
most widely used device.
A thyristor has characteristics similar to a trhyratron tube. But from the construction
point a thyristor (a pnpn device) belongs to transistor ( pnp or npn device) family. The name
thyristor is derived by a combination of the capital letters from THYRatron and transISTOR.
As per IEC (International Electrotechnical Commission),the definition of thyristor was
decided as under:
(i) It constitutes 3 or more p-n junctions.
(ii) It has 2 stable states, an ON state and an OFF state and can change its state from one
to another.
Terminal characteristics of thyristors:
Thyristor is a four layer, three junction, p-n-p-n semiconductor switching device. It
has three terminals; anode, cathode, and gate. Figure gives a constructional details of a
typical thyristor.
Fig 1.27 (a) constructional details (b) Schematic diagram and (c) circuit symbol of a thyristor
Basically a thyristor consists of four layers of alternate p-type and n-type silicon
semiconductors forming three junctions J1, J2, and J3 as in figure. The threaded portion is for
the purpose of tightening the thyristor to the frame or heat sink with the help of a nut. Gate
terminal is usually kept near the cathode terminal, fig.1.27(a). Schematic diagram and circuit
symbol for a thyristor are shown in figure 1.27(b) and (c). The terminal connected to outer p
region is called anode (A), the terminal connected to outer n region is called cathode(K)
and that connected to inner p region is called the gate (G). SCR rating has improved
considerably since its introduction in 1957. Now SCRs of voltage rating 10kV and an rms
current rating of 3000A with corresponding power handling capacity of 30MW are available.
Such a high power thyristor can be switched on by a low voltage supply of about 1A and
10W and this gives us an ides of the immense power amplification capability ( = 3x10 6) of
this device.
As SCRs are solid state devices, they are compact, possess high reliability and have
low loss. Because of these useful features, SCR is almost universally employed these days for
all high power controlled devices. An SCR is so called because silicon is used for its
construction and its operation as a rectifier can be controlled. Like the diode, an SCR is an
unidirectional device that blocks the current flow from cathode to anode. Unlike the diode, a
thyristor also blocks the current flow from anode to cathode until it is triggered into
conduction by a proper gate signal between gate and cathode terminals.
Static I-V Characteristics of a Thyristor
An elementary circuit diagram for obtaining static I-V characteristics of a thyristor is
shown in figure 1.28(a). The anode and cathode are connected to main source through the
load. The gate and cathode are fed from a source Es which provides positive gate current from
gate to cathode.
Fig 1.28 (a) Elementary circuit for obtaining thyristor I-V characteristics
(b) Static I-V characteristics of a thyristor
Reverse Blocking Mode:
When cathode is made positive w.r.t anode with switch S open, Figure 1.22(a) ,
thyristor is reverse biased as shown in figure given below. Junctions J1, J3 are seen to be
reverse biased whereas junction J2 is forward biased. The device behaves as if 2 diodes are
connected in series with reverse voltage applied across them.
Fig 1.29 (a) J2 forward biased and J1, J3 reverse biased (b) J2 reverse biased and
J1,J3 forward biased.
A small leakage current of the order of few mA flows. This is reverse blocking mode,
called the off-state, of the thyristor. In figure 1.28(b) reverse blocking mode is shown by OP.
if the reverse voltage is increased, then at a critical breakdown level, called reverse
breakdown voltage VBR, an avalanche occurs at J1 and J3 and the reverse current increses
rapidly. A large current associated with VBR gives rise to more losses in the SCR. This may
lead to thyristor damage as the junction temperature may exceed its permissible temperature
rise. So max. working reverse voltage across a thyristor doesnot exceed VBR.
In figure 1.28 (b) reverese avalanche region is shown by PQ. When reverse voltage
applied ˂ VBR, the device offers a high impedance in the reverse direction. The SCR in the
reverse blocking mode may therefore be treated as an open switch.
Note that I-V characteristics after avalanche breakdown during reverse blocking mode
is applicable only when load resistance is zero, fig 1.28(b). In case load resistance is present
a large anode current associated with avalanche breakdown at VBR would cause substantial
voltage drop across load and as a result, I-V characteristics in 3rd quadrant would bend to the
right of vertical line drawn at VBR.
Forward blocking mode:
When anode is positive with respect to the cathode, with gate circuit open, SCR is
said to be forward biased as shown in figure 1.29 ( b). it is seen from this figure that junctions
J1, J3 are forward biased but junction J2 is reverse biased. In this mode, a small current, called
forward leakage current, flows as shown in figure 1.28(b) and 1.29(b). in figure 1.28(b), OM
represents the forward blocking mode of SCR. As the forward leakage current is small, SCR
offers a high impedance. Therefore a thyristor can be treated as an open switch even in
the forward blocking mode.
Forward Conduction Mode:
When anode to cathode forward voltage is increased with gate circuit open, reverse
biased junction J2 will have an avalanche breakdown at a voltage called forward break over
voltage VBO. After this breakdown, thyristor gets turned on with point M at once shifting to N
and then to a point anywhere between N and K. here NK represents the forward conduction
mode. A thyristor can be brought from forward blocking mode to forward conduction mode
by turning it on by applying (i) a positive gate pulse between gate and cathode or (ii) a
forward breakover voltage across anode and cathode.
Forward conduction mode NK shows that voltage drop across thyristor is of the order
of 1 to 2V depending upon the rating of SCR. It may also be seen from NK that voltage drop
across SCR increases slightly with an increase in anode current. In conduction mode, anode
current is limited by load impedance alone as voltage drop across SCR is quite small. This
small voltage drop VT across the device is due to the ohmic drop in the four layers. In
forward conduction mode, thyristor is treated as a closed switch.
DYNAMIC CHARACTERISTICS
During turn ON and turn OFF process, a thyristor is subjected to different voltages
across it and different currents through it. The time variations of the voltage across a thyristor
and the current through it during turn on and turn off processes give the dynamic or switching
characteristics of a thyristor.
Switching Characteristics during turn –on
A forward biased thyristor is usually turned on by applying a positive gate voltage
between gate and cathode. There is however a transition time from forward- off state to
forward- on state. This transition time is defined as the time during which it changes from
forward blocking state to final on state. Total turn - on time can be divided into 3 intervals.
(i) Delay time (td)
(ii) Rise time (tr)
(iii)Spread time (tp)
Fig.1.30 Thyristor voltage and current waveforms during turn on and
turn off process
Delay time (td)
The delay time td is measured from the instant at which gate current reaches 0.9Ig to
the instant at which anode current reaches 0.1 Ia. Here Ig and Ia respectively the final values
of gate and anode currents. The delay time may also be defined as the time during which
anode voltage falls from Va to 0.9 Va where Va = initial value of anode voltage.
Another way of defining delay time is the time during which anode current rises from
forward leakage current to 0.1Ia where Ia = final value of anode current. With the thyristor
initially in the forward blocking state, the anode voltage is OA and anode current is small
leakage current. Initiation of turn-on process is indicated by a rise in anode current from
small forward leakage current and a fall in anode- cathode voltage from forward blocking
voltage OA.
The delay time can be decreased by applying high gate current and more forward
voltage between anode and cathode.
Rise Time (tr)
The rise time tr is the time taken by the anode current to rise from 0.1Ia to 0.9Ia. The
rise time tr is also defined as the time required for the forward blocking off state voltage to
fall from 0.9 to 0.1 of its initial value OA. During the rise time the voltage is decreasing and
current is increasing. The main factor determining tr is the nature of anode circuit. For eg.for
series RL circuit, the rate of rise of anode current is slow, therefore tr is more. For RC series
circuit, di/dt is high, tr is therefore less.
Spread time (tp)
The spread time is the time taken by the anode current to rise from 0.9Ia to Ia. It is
also defined as the time for the forward blocking voltage to fall from 0.1 of its value to the on
state voltage drop ( 1 to 1.5V). during this time, conduction spreads over the entire cross
section of the cathode of SCR. The spreading interval depends on the area of cathode and on
gate structure of the SCR. After the spread time, anode current attains steady state value and
the voltage drop across SCR is equal to the on-state voltage drop of the order of 1 to 1.5V.
The total turn-on time of an SCR is equal to the sum of delay time, rise time and
spread time.
Factors which decides the turn on time of SCR are
(i)
Magnitude of gate pulse
(ii)
Magnitude of anode to cathode voltage
(iii)
Circuit inductance
(iv)
Junction temperature
The turn –on time can be reduced by increasing (i) and (ii).
( usually we have to apply a gate current value equal to 3 to 5 times greater than the min.
value of Ig required to turn on the SCR ).
Switching characteristics during turn-off
Thyristor turn off means that it has changed from on to off state and is capable of
blocking the forward voltage. This dynamic process of the SCR from conduction state to
forward blocking state is called commutation process or turn off process.
Once the thyristor is on, gate loss control. The SCR can be turned off by reducing the
anode current below holding current. The conducting SCR can be turned off by applying a
reverse voltage for a short interval of time.
The turn off time tq of a thyristor is defined as the time taken for the SCR to regain
its forward blocking capability after the anode current is reduced to zero.
The turn off time is divided into two intervals
(i)
Reverse recovery time trr
(ii)
Gate recovery time tgr
i.e tq = trr + tgr
At the instant t1 anode current becomes zero. After t1 anode current builds up in
reverse direction with the same di/dt slope as before t1. The reason for the reversal of anode
current after t1 is due to the presence of carriers stored in the four layers. The reverse
recovery current removes excess carriers from the end junctions J 1 & J3 between the instants
t1 & t3. i.e the reverse recovery current flows due to the sweeping out of holes from top p-layer
and electrons from bottom n layer. At instant t2, about 60% of the stored charges are removed
from the outer two layers, carrier dendity across J1 and J3 begins to decrease and with this
reverse recovery current also starts decaying. The reverse current decay is fast in the
beginning but gradual therafter. The fast decay of recovery current causes a reverse voltage
across the device due to the circuit inductance. This reverse voltage surge appears across the
thyristor terminals and may therefore damage it. This is avoided by using protective RC
elements across SCR. At instant t3, when reverse recovery current has fallen to nearly zero
end junctions J1 & J3 recover and SCR is able to block the reverse voltage.
At the end of the reverse recovery period (t3 –t1), the middle junction J2 still has
trapped charges. Therefore the thyristor is not able to block the forward voltage at t3. The
trapped charges around J2 ie. in the inner two layers, cannot flow to the external circuit,
therefore these trapped charges must decay only by recombination. This recombination is
possible if a reverse voltage is maintained across SCR. The rate of recombination of charges
is independent of the external circuit parameters. The time for the recombination of charges
between t3 and t4 is called gate recovery time tgr. At instant t4, junction J2 recovers and the
forward voltage can be reapplied between anode and cathode. The thyristor turn of time t q is
in the range of 3 to 100µs.
The turn off time is influenced by
i.
The magnitude of forward current
ii.
di/dt at the time of commutation
iii.
junction temperature
iv.
An increase in magnitude of these factors, increases the thyristor turn off time.
If the value of forward current before commutation is high, trapped charges around
junction J2 are more. The time required for their recombination is more and therefore turn off
time is increased. Turn off time decreases with increase in the magnitude of reverse voltage.
The thyristor turn off time tq is applicable to an individual SCR. In actual practice
thyristor form a part of the part circuit. The turn off time provided to the thyristor by the
practical circuit is called circuit turn off time tc. it is defined as the time between the instant
anode current becomes zero and the instant reverse voltage due to practical circuit reaches
zero. Time tc must be greater than tq for reliable turn – off.
Thyristor with slow turn-off time (50-100µs) are called converter grade SCRs, and
those with fast turn off time (3-50 µs) are called inverter grade SCRs. Converter – grade
SCRs are cheaper and are used when slow turn off is possible as in phase controlled
rectifiers, ac voltage controllers, cyclo converters etc. inverter grade SCRs are costlier and are
used in inverters, choppers and forced commutated inverters.
TWO TRANSISTOR ANALOGY
The principle of thyristor operation can be explained with the use of its two- transistor
model (or two-transistor analogy). Figure 1.31 shows schematic diagram of a thyristor . from
this figure, two transistor model is obtained by bisecting the two middle layers, along the
dotted line, in two separate halves as shown in fig1.31 (b). in this figure, junctions J1- J2 and
J2 –J3 can be considered to constitute pnp and npn transistors separately. The circuit
representation of the two-transistor model of a thyristor is shown in fig 1.31(c).
In the off state of a transistor, collector current IC is related to emitter current IE as
IC = αIE +ICBO
Where α is the common base current gain and ICBO is the common base leakage current of
collector base junction of a transistor.
For transistor Q1 in figure ( c), emitter current IE = anode current Ia and IC = collector current
IC1. Therefore for Q1,
IC1 = α1Ia +ICBO1
Where
α1 = common base current gain of Q1
ICBO1 = common base leakage current of Q1
Fig.1.31 Thyristor (a) its schematic diagram (b) and (c) its two transistor model
Similarly for transistor Q2, the collector current IC2 is given by
IC2 = α2Ik +ICBO2
α2 = common base current gain of Q2
Where
ICBO2 = common base leakage current of Q2
Ik = emitter current of Q2
The sum of two collector currents given by IC1 and IC2 is equal to the external circuit
current Ia entering at anode terminal A
Ia = IC1 + IC2
Ia = α1Ia +ICBO1 + α2Ik +ICBO2
When gate current is applied, then Ik = Ia + Ig , substituting this value of Ik in the above
equation, we get
Ia = α1Ia +ICBO1 + α2 (Ia + Ig) +ICBO2
Ia 
α 2 I g  I CBO1  I CBO2
1  (α1  α 2 )
For a silicon transistor, the current gain α is very low at low emitter current. With
anincrease in emitter current, α builds up rapidly as shown in figure.
Typical variation of current gain with emitter current of a thyristor
With gate current Ig =0 and with thyristor forward biased (α1 + α2 ) is very low and
forward leakage current somewhat more than ICBO1 +ICBO2 flows.
If, by some means, the emitter current of two component transistors can be increased
so that (α1 + α2 ) approaches unity. Then as per the above equation, Ia would tend to become
infinity therby turning on the device. Actually external load limits the anode current to a safe
value after the thyristor begins conduction. The methods of turning on a thyristor, in fact are
the methods of making (α1 + α2 ) to approach unity.
RATINGS AND SPECIFICATIONS
Unlike the power diode, the thyristor has two categories of voltage ratings- the
forward blocking and the reverse blocking. These ratings are generally equal.
As in the case of all power semi conductor devices, current ratings are generally valid only if
cooling is provided by the use of suitable heat sinks, to keep the device temperature within
the specified limit. As in the case of power diodes average, r.m.s, repetitive peak as well as
surge current ratings are usually specified separately, especially for devices with large
ratings.
Power semi conductor category, fuses may be used with each individual thyristor in a
converter, to provide short circuit protection to it. The main parameter on the basis of which
the fuse is selected is the I2t rating. To afford protection, the I2t rating of the fuse must be less
than the I2t rating of the thyristor. The voltage rating of the selected fuse will be based on the
maximum circuit voltage that can occur across it, in the event of a fuse blow.
Other major specifications of the thyristor which are directly related to its safety, from
thr power circuit side, are the dv/dt and the di/dt ratings. These are expressed in terms of
V/µs, and A/ µs respectively. A dv/dt failure causes an erratic turn ON of the device, and
depending on the circuit conditions, this may result in short circuit in the system, with the
possibility of damage to the device and other components. Exceeding the di/dt limit can
directly damage the device because of excessive local current concentration in an area of the
thyristor pellet.
Thyristor rating indicate voltage , current, power and temperature limits within which a
thyristor can be used without damage or malfunction. rating & specifications serves as a
link b/w the designers and the user of SCR systems. If a thyristor handles voltage,Current
and power greater than its specified rating , the junction temperature may rise above the
safe limit and as a result thyristor may get damaged .Therefore , when SCR are selected
,some safety margin must be kept in the form of choosing device rating some what higher
than their normal working values.
A thyristor has several ratings such as voltage , current , power, dv/dt, di/dt, turn on time
etc. Some subscript are associated with voltage and current ratings for convenience in
identifying then first subscript letter indicates the dire or the state.
D → Forward blockng region with gate circuit open
T → on state
R → Reverse
F → Forward
Except for the gate G, second subscript letter denotes the operating values
W→ Working values
R →Repetitive
S →surge or non -repetitive value
T →trigger
The third subscipt M indicates the maximum or peak value.
(Gate ratings involve the subcripts G. Suscript A usually stands for anode and subscipt
AV for average.
Anode voltage ratings :A
thyristor is made up to four layers and 3 junctions. The middle junction J2
blocks the forward voltage Where as the two ends junctions J1,J3 blocke the reverse
voltage . The anode voltage ratings indicates the value of maxi voltages that a thyristor can
withstand without breakdown of the junction n area with gate circuit open .
For ac systems the supply voltages may not be a smooth sine wave, The voltage
transient may occur regularly on at random as shown in figure 1.32
Fig 1.32
Anode voltage ratings during the blocking state of a Thyristor.
i) VDWM – Peak Working Forward blocking Voltage
It specifies the max forward blocking voltage that a thyristor can with stand
during its working VDWM is equal to the max value of the sine voltage wave.
ii) VDRM - Peak repetitive forward – blocking voltage
If refers to the peak transient voltage that a thyristor can with stand repeatedly or
periodically in its forward blocking mode . The rating i specified at a max. allowable
junction tempreature with gate circuit open or with a specified biasing resistance b/w gate
and cathode .
iii ) VDSM ( peak surge (or non- repetataive ) forward blocking voltages
If refers to the peak value of the forward surge voltage that does not repeat . Its value is
about 130% of VDRM , but VDSM is less than forward break over voltage VBO.
iv) VRWM (peak working reverse voltage )
It is the max reverse voltage that a thyristor can withstand repeatedly it is equal to the
peak negative value of a sine voltage wave .
v) VRRM (Peak repetitive reverse voltage )
If specifies the peak reverse transient voltage that may occur repeatedly in the reverse
direction at the allowable maximum in temperature . The transient last for a fraction of the
time one angle.
vi) VRSM (Peak surge (or non – repetitive) reverse voltage
It represents the peak value of the reverse surge voltage that does not repeat. Its value
is about 130% of v But VRSM is less than reverse break over voltageVBR as shown in
fig.1.32 (b).
vii) VT -on state voltage drop : It is the voltage drop between anode 4 cathode with specified forward on state
current and in temperature . Its value of 1 to 1.5 V.
viii) Forward dv/dt rating : The dv/dt rating of a thyristor indicates the max rate of rise of anode voltage that will
not trigger the device without any gate signal. If dv/dt is more than the specified max value
, the thyristor may be switched on with forward voltage , junction J2 is reverse biased .
Changes accros J2 develop a capacitance C.
When forward voltage is suddenly applied to the device a charging current Cj dv/dt
begins to follow and it may act as a gate current to turn on the SCR corn without any positive
gate signal. In practice dv/dt triggering is never employed as it gives random turn- on of a
thyristor . This type of triggering also leads to destruction of the thysistor through high
junction temperature .
Current Ratings :A thysistor is made up of semiconductor material its thermal capacity is therefore
quite small . Even for short over currents , the jn. temperature may exceed the rated value and
the device may be damaged. As the jn. temperature is dependent on the current handled by a
thysistor a correct choice of current rating is essential for a long working life of the device.
Average on state current (ITAV)
The forward voltage drop across conducting SCR is low, therefore power loss in
thysistor depends primarily on forward average on state current ITAV.
Significance of average on state current
Consider a continuous dc current OA flowing thrugh the SCR. After the application of
current at t = 0, In temperature begins to rise until finally it reaches its rated value Tj=125°c .
As the SCR has low thermal time constant , final temperature of 125 °C is reached in
relatively short time. Suppose now that anode current is of rectangular wave shape with
conduction angle 180° which is equal to (T/2T) x 360° as shown in fig 1.33 (b).
Fig.1.33 Variation of junction temperature with constant anode current ia and with
rectangular wave of ia
If the rectangular wave has average value equal to the constant current OA, then current
amplitude of rectangular bar wave is OC = 2 times OA. As the SCR has short time constant ,
jn temperatue is likely to exceed the allowable temperature of 125°C
and this is not
desirable. In order to limit the temperature to 125°C for rectangular wave forms of anode
current, the pulse amplitude must be reduced form OC to some lower value OD . But a
rectangular wave would result in a lower value of average angle current. This means that for
the temperature rise to remain within limits , SCR must be rated at a lower value of average
forward current ITAV when it is conducting a pulsed anode current than when it is carrying a
constant dc . This shows that thysistor is derated when it handles rectangular or square wave
of anode current. The effect of conduction angle on anode current ITAV is shown in fig 1.34
for rectangular waves.
Fig. 1.34 Average on state power dissipation Pav as a function of ITAV for rectangular wave.
RMS on state Current (IRMS )
Heating of the resitive elements of a thyristor , such a s metallic joints leads and
interfaces depends on the forward rms current Irms. The rms current rating is used as an
upper limit I rating of an SCR for constant as well as pulse anode current ratings of the
thyristor . Its value is equal to Idc. The value of the rms forward current for an SCR remains
the same for different conduction angles.
The current ratings ITAV & Irms are of repetitive type. They are dependent on max jn
temperatue. If better cooling is provided to a thyristor body, these ratings can be upgraded.
Surge current Rating:When a thyristor is working under it repetitive voltage & current ratings its
permissible jn temperature is never exceeded. However the thyristor may be subjected to
abnormal operating conditions due to faults or short circuits. In order to accommodate these
unusual working conditions surge current rating of thyristors is also specified. A surge
current rating indicated the maximum possible non-repetitive or surge current which the
device can with stand. Higher current caused by non-repetitive faults or short circuits should
occur once in a while during the life span of a thyristor to prevent its degredation.
Surge current s are assumed to be sine waves with freq 50 or 60 Hz. Depending upon
the supply frequency . This rating is specified in terms of the number of surge cycles with
corresponding surge current peak. Surge current
rating is inversely proportional to the
duration of the surge. It is usual to measure the surge duration in terms of the number of
cycles of normal power frequency of 50 or 60 hz.
One cycle surge current rating is the peak value of allowable non-recurrent half sine
wave of 10 msec duration for 50Hz. For duration less than half cycle, a subcycle surge
current rating is also specified. This rating for 50 or 60 hz supply is the peak value for a part
of the half since wave. The subcycle surge current rating Isb can be determined by equating
the energies involved in once cycle surge & one sub-cycle surge as follows.
2
Isb
.t  I 2 .T
I sb  I
T
t
Where T = Time for one half cycle of supply frequency , sec.
I = one cycle surge current rating A
Isb = Subcycle surge current rating, A
T = duration of subcycle surge for 50 hz supply
T = 10 msc.
for 50Hz supply, I sb 
I 1
.
10 t
I2t rating
This rating is employed in the choice of a fuse or other protectiv eequipemnt for
thristor. It is the measure of heat energy that the device can absorb for a short time before the
fault is cleared . It is usually specified for fault current of width <= 10 msec. The I2t rating is
given by the relation
( rms value of one-cycle surge current )2 x time for one cycle.
di/dt rating
This rating of a thyristor indicated the max. rate of rise of current form anode to
cathode without any harm to the device. When a thyristor is turned on, conduction starts at a
place near the gate. This small area of conduction spreads to the whole are of junctionn. If the
rate of rise of anode current (di/dt) is large as compared to the spreading velocity of carriers
across the cathode jn, local hot spots will be formed near the gate connection on account of
high current density. This causes the jn temperature to rise above the safe limit and as a
consequence SCR may be damaged permanently.
Other ratings : In addition to voltage & current rating discussed above these are some other ratings
a) Latching & holding curents
b) Turn on and Turn off times
c) Gate ckt voltage, current & power rating
DEVICE PROTECTION
Unlike the power diode, the thyristor has two categories of voltage ratings- the forward
blocking and the reverse blocking. The current ratings are generally valid only if cooling is
provided by the use of suitable heat sinks, to keep the device temperature within specified
limit. Power semiconductor category fuses may be used with each individual thyristor in a
converter to provide short circuit protection to it. The main parameter on the basis of which
the fuse is selected is the I2t rating. To afford protection the I2t rating of the fuse must be less
than the I2t rating of the thyristor. The voltage rating of the fuse will be based on the
maximum circuit voltage that can occur across it, in the event of a fuse blow.
Other major specifications of the thyristor which are directly related to its safety, from
the power circuit side are the dv/dt and the di/dt ratings. A dv/dt failure causes an erratic turn
on of the device, and depending on the circuit conditions, this may result in a short circuit in
the system, with the possibility of damage to the device and other components. Exceeding the
di/dt limit can directly damage the device because of excessive local current concentration in
an area of the thyristor pellet.
A snubber circuit is in variably used to protect a thyristor from excessive stresses. Figure
1.32(a) shows the commonly used R-C snubber. This snubber circuit functions in a similar
way as for a power diode, by limiting the over voltage resulting from the reverse recovery
current transient. Besides, by suitable choice of values for R and C, it can also serve to
mitigate the dv/dt stress. But the snubber can be made more effective in limiting dv/dt by the
addition of a diode as shown in figure 1.32 (b)
Fig 1.32 Snubber circuits for Thyristor
To limit di/dt, when circuit conditions are such that there is a danger of exceeding the
specification, an inductance may be added as shown in fig 1.32 ( c). This is usually a coil of a
few turns capable of carrying the full thyristor current. In some designs, this coil is wound on
a small ferrite ring. This reduces the size of the coil for the same inductance value. Besides
the core gets saturated when the current exceeds its saturates level, and so the effective
inductance falls to a low value from then.
Gate circuit requirements,
In this, we discuss two aspects of gate control: (i) gate pulse level and (ii) Gate pulse
duration.
(i) Gate pulse level
The threshold gate current pulse amplitude needed to fire (i.e turn On ) a
thyristor is stated in the data sheet of the device. It depends on the thyristor
voltage and current ratings, and is typically in the range of about 50 to several 100
mA for medium and large size devices. since the gate cathode junction is being
forward biased by the gate pulse, the gate –to– cathode voltage level is small, well
below 5V, typically around 1.2V. In practice, the gate current pulse amplitude
actually used for firing is higher than the threshold value, and its rise time is as
short as possible, to ensure fast turn ON switching.
The reverse voltage capability of the gate cathode junction is very low. It is
therefore important to carefully examine the gate control circuit and ensure that
there is no possibility of a large reverse voltage occurring, even under any
abnormal circuit conditions.
(ii) Gate Pulse Duration:
Gate firing of a thyristor will be successful only if the gate pulse lasts at least
till the thyristor current rises to the latching level. i.e, a minimum time of about
10µs for a large power device. In practical convereters, there are external power
circuit conditions that will necessitate the use of much wider pulses. This could be
one or both of the following:
1. External circuit conditions can cause a delay in the current rise. i.e due
to the presence of inductance in the power circuit will delay the rise of
the current to the latching level, necessitating a wide gate pulse.
2. There can be a delay in the forward biasing of the thyristor.
A gate firing pulse can be effective only if the thyristor is forward biased. In some
converter circuit, the exact instant in the converter switching cycle when a thyritsor becomes
forward biased varies according to load conditions, and it becomes very difficult to design the
gate firing circuit to provide a wide pulse that commences at the earliest instant at which the
thyristor may turn ON. In this way, even if the thyristor is not forward biased when the gate
pulse commences, the gate pulse will still be present when it does become forward biased and
is ready to turn ON.
Timing control and firing of thyristors, amplification and isolation of SCR gate pulses,
The gate control circuit of a thyristor converter is designed to provide the gate firing
pulses to the thyristors at the appropriate instants of time. The switching control unit of a
power electronic converter generally has a timing circuit in it. This timing circuit generates
the timing pulses at the correct instants of time at which each power devices has to be
switched. The timing circuit for a switching element normally provides a pulse whose
duration is the ON time of the device. In general, such a pulse from the timing circuit is
unsuitable for being directly applied to the control terminal of the switching device for the
following reasons.
1. A latching device like a thyristor only needs a pulse of short duration, and
not for the entire duration of the ON time. Therefore unnecessary gate
power dissipation can be avoided by using a very short pulse that starts at
the rising edge of the timing pulse.
2. It may need further amplification to be able to provide the required current
and power to successfully turn ON the power switching device.
3. It is invariably necessary to provide electrical isolation between the
switching control circuit and the power circuit of the converter. The power
switching elements will generally be working at high and variable
potentials, from which the control circuits will have to be isolated.
In the case of a thyristor, the first of the above 3 requirements can be met by using a
monostable multi vibrator chip that is triggered by the rising edge of the timing pulse. To
raise the power capability of a voltage pulse, we can use a “driver” . Drivers are available as
integrated circuits. They reproduce the input pulse at the output terminals with greatly
increased current capability. Alternatively we can use discrete elements as shown in figure
for pulse amplification.
Fig 1.33 Gate firing circuits for a thyristor
A pulse transformer can be used to provide electrical isolation. But careful design of
the pulse transformer is usually needed to faithfully reproduce the input pulse at its output
terminals. Opto-isolates are also used for electrical isolation. An opto-isolator chip consists of
a light emitting diode (LED) that throws light on to a photodiode or photo transistor, causing
it to conduct. If an opto-isolator is used for electrical isolation, it is normally required to have
a floating (isolated) power source on the gate side, for pulse amplification, because it is
impossible to transmit any appreciable power through the opto-isolator.
A gate firing circuit for a thyristor using discrete transistors for pulse amplification
and a pulse transformer for isolation is shown in figure 1.33. This circuit assumes that the
input pulse available is of the required width. Therefore the monostable multivibrator chip is
not included.
In this arrangement, the turn ON pulse to be amplified is applied to the base of the
transistor Q2, causing it to turn ON. R1 and R3 are high resistance to improve performance by
providing ohmic paths between the respective base and emitter. When Q2 is turned ON it
provides an amplified base drive current for the pnp transistor Q1 is decided by the value
chosen for R2 and the power supply voltage labelled VCC in the figure, provided that the input
to Q2 is sufficient to turn it ON. When Q1 turns ON, it applies a pulse of amplitude approx.
equal to VCC to the primary of pulse transformer. This pulse has the same duration as the
input pulse. But it has large current capability, which is determined by the base current
provided to Q1. In this circuit, the transistors are functioning as switches.
The secondary coil of the pulse transformer feeds the pulse to the gate terminal of the
thyristor. The resistance R5 and R6 serve to limit the gate voltage and current. The diode D2
prevents any reverse voltage on the gate from the transformer. R6 also serves to provide an
ohmic path from the gate to the cathode of the thyristor. The diode D1 is for the purpose of
providing a freewheeling path through which the current in the primary of the transformer
will freewheel when Q1 turns OFF. This will avoid an excessive voltage occurring across this
transistor due to the transformer inductance.
FIRING CIRCUITS FOR THYRISTORS
An SCR can be switched from off-state to on-state in several ways; these are forward
voltage triggering, dv/dt triggering, temperature triggering, light triggering and gate
triggering. The instant of turning on the SCR cannot be controlled by the first three methods
listed above. Light triggering is used in some applications, particularly in a series-connected
string. Gate triggering is, however, the most common method of turning on the SCRs,
because this method provides itself accurately for turning on the SCR at the desired instant of
time. In addition, gate triggering is an efficient and reliable method.
Main Features of Firing Circuits
As stated above, the most common method for controlling the onset of conduction in an
SCR is by means of gate voltage control. The gate control circuit is also called firing, or
triggering, circuit. These gating circuits are usually low-power electronic circuits. A firing
circuit should fulfil the following two functions.
(i) If power circuit has more than one SCR, the firing circuit should produce gating
pulses for each SCR at the desired instant for proper operation of the power
circuit. These pulses must be periodic in nature and the sequence of firing must
correspond with the type of thyristorised power controller. For example, in a
single-phase semi-converter using two SCRs, the triggering circuit must produce
one firing pulse in each half cycle; in a 3-phase full converter using six SCRs,
gating circuit must produce one trigger pulse after every 600 interval.
(ii) The control signal generated by a firing circuit may not be able to turn-on an
SCR. It is therefore common to feed the voltage pulses to a driver circuit and then
to gate-cathode circuit. A driver circuit consists of a pulse amplifier and a pulse
transformer.
A firing circuit scheme, in general, consists of the components shown in Figure
given below. A regulated dc power supply is obtained from an alternating voltage source.
A general layout of the firing circuit scheme for SCRs.
Pulse generator, supplied from both ac and dc source, gives out voltage pulses which are then
fed to pulse amplifier for their amplification. Shielded cables transmit the amplified pulses to
pulse transformers. The function of pulse transformer is to isolate the low-voltage gatecathode circuit from the high-voltage anode-cathode circuit. Some firing circuit schemes are
described in this section.
Resistance and Resistance-Capacitance Firing Circuits
R and RC firing circuits are not in commercial use these days. These are presented
here for the sake of highlighting the basic principles of triggering the SCRs. They offer
simple and economical firing circuits.
(a) Resistance firing circuits. As stated above, resistance trigger circuits are the
simplest and most economical. They however, suffer from a limited range of firing angle
control (0oto 900), great dependence on temperature and difference in performance between
individual SCRs.
Figure shows the most basic resistance triggering circuit. R2 is the variable
resistance, R is the stabilizing resistance. In case R2 is zero, gate current may flow from
source, through load, R1 , D and gate to cathode. This current should not exceed maximum
permissible gate current Igm .
Resistance firing circuit
R1 can therefore, be found from the relation,
Vm
V
 I gm or R1  m
R1
I gm
where Vm = maximum value of source voltage.
It is thus seen that function of R1 is to limit the gate current to a safe value as R2 is varied.
Resistance R should have such a value that maximum voltage drop across it does not
exceed maximum possible gate voltage Vgm . This can happen only when R2 is zero. Under
this condition,
Vm
.R  Vgm
R1  R
R
Vgm. R1
Vm  Vgm
As resistance R1, R2 are large, gate trigger circuit draws a small current. Diode D
allows the flow of current during positive half cycle only, i.e.gate voltage vg is half-wave dc
pulse. The amplitude of this dc pulse can be controlled by varying R2 .
The potentiometer setting R2 determines the gate voltage amplitude. When R2 is
large, current i is small and the voltage across R, i.e. Vg = iR is also small as shown in Fig. (a).
As Vgp (peak of gate voltage vg) is less than Vgt (gate trigger voltage), SCR will not turn on.
Therefore, load voltage vo = 0, io = 0 and supply voltagevs appears as vt across SCR as
shown in Fig. (a). Note that trigger circuit consists of resistances only, vg is therefore in
phase with source voltage vs. In Fig. (b), R2 is adjusted such that Vgp = Vgt.
Resistance firing of an SCR in a half wave circuit with DC load
(a) No triggering of SCR (b) α = 90° (c) α ˂ 90°
This gives the value of firing angle as 90°. The various current and voltage waveforms are
shown in Fig.(b). In Fig. (c), Vgp > Vgt. As soon as vg becomes equal to Vgt for the first
time SCR is turned on. The resistance triggering cannot give firing angle beyond 90°.
Increasing vg above Vgt turns on the SCR at firing angles less than 90°. When vg reaches Vgt
for the first time, SCR fires, gate loses controll and vg is reduced to almost zero (about 1 V)
value as shown. It may also be seen that firing angle can never be equal to zero degree
however large Vgp may be; it can, of course, be brought nearer (2°-4°) to zero degree firing
angle. A relationship between peak gate voltage Vgp and gate trigger voltage Vgt may be
expressed as follows:
Vgp sin   Vgt or sin -1(Vgt / Vgp )
sin ce Vgp 
Vm R
R1  R2  R
Vgt R1  R2  R  

Vm R


  sin 1 
This shows that firing angle is proprtional to R2. As R2 is increased from small value
(i.e. Small α), firing angle increases. In any case, α can never be more than 90°.
As the firing angle control is from 0o (approximately) to 90o , the half-wave power
output can be controlled from 100% (for α = 0o) down to 50% (for α =90o)
(b)RC firing circuits: The limited range of firing angle control by resistance firing circuit
can be overcome by RC firing circuit. There are several variation of RC trigger circuits. Here
only two of them are presented.
(i)RC half-wave trigger circuit. Figure given below illustrates RC half-wave trigger
circuit. By varying the value of R, firing angle can be controlled from 0o to 180o. In the
negative half cycle, capacitor C charges through D2 with lower plate positive to the peak
supply voltage Vm at ωt= -90o. After ωt= -90o, source voltage vs decreases from -Vm at ωt= 90o to zero at ω =0o.
RC half wave trigger circuit
During this period, capacitor voltage vc may fall from -Vm at wt= -90o to some lower value oa
at ω t= 0o as shown in Figure below. Now , as the SCR anode voltage passes through zero
and becomes positive, C begins to charge through variable resistance R from the initial
voltage – oa. When capacitor charges to positive voltage equal to gate trigger voltage Vgt,
SCR is fired and after this, capacitor holds to a small positive voltage, in figure Diode D1 is
used to prevent the breakdown of cathode to gate junction through D2 during the negative
half cycle. An examination of figure reveals that firing angle can never be zero and 180o.
The SCR will trigger when vc =Vgt+vd, where vd is the voltage drop across diode D1.
At the instant of triggering, if vc is assumed constant, the current Igt must be supplied by
voltage source through R, D1 and gate to cathode circuit. Hence the maximum value of R is
given by
vs  RI gt  vc
or
vs  RI gt  v gt  vd
or
R
vs  Vgt  vd
I gt
where vs is the source voltage at which thyristor turns on.
When SCR triggers, voltage drop across it falls to 1 to 1.5V. This, in turn, lowers the
voltage across R and C to this low value of 1 to 1.5V. Low voltage across SCR during
conduction period keeps C discharged in positive half cycle until negative voltage cycle
across C appears. This charges C to maximum negative voltage- Vm as shown in Figure
above dotted line. In Fig. (a), R is more, the time taken for C to charge from -oa to (Vgt+vd)=
Vgt is more, firing angle is more and therefore average output voltage is low. In Fig. (b), R is
less, firing angle is low and therefore average output voltage is more.
(ii) RC full-wave trigger circuit. A simple RC trigger circuit giving full-wave output
voltage is shown in Figure below. Diodes D1-D4 form a full-wave diode bridge.
In this circuit, the initial voltage from which the capacitor C charges is almost
zero. The capacitor C is set to this low positive voltage (upper plate positive ) by
the clamping action of SCR gate. When capacitor charges to a voltage equal
to.Vgt, SCR triggers and rectified voltage vd appears across load as v0.
Waveforms for RC full wave trigger circuit of (a) high value of R (b) low value of
R
The value of R is given by
R 
vs  Vgt
I gt
Where ,vs, is the source voltage at which thyristor turns on. In figure below firing angle α is
more than 90° and in Fig (b), α < 90°.
Unijunction Transistor (UJT)
Resistance and RC triggering circuits described above give prolonged pulses. As a
results, power dissipation in the gate circuit is larger. At the same time ,R and RC
triggering circuits cannot be used for automatic or feedback control systems . These
difficulties can be overcome by the use of UJT triggering circuits.
Pulse triggering is preferred as it offers several merits over R and RC triggering .
The power level in pulse triggering is low as the gate drive is discontinuous , pulse
triggering is therefore more efficient .As pulses with higher gate current are permissible,
pulse firing is more reliable and faster. In this section , first UJT is described along with its
characteristics and then its use as a relaxation oscillator for triggering SCRs is presented.
An UJT is made up of an n-type silicon base to which p-type emitter is embedded,
see figure.The n-type base is lightly doped whereas p-type is heavily doped. The two
ohmic contacts provided at each end are called base- one B 1 and base – two B2. So ,an UJT
has three terminals, namely the emitter E,base-one B1 and base- two B2 . Between bases B1
and B2, the Uni-junction behaves like an ordinary resistance . RB1 and RB2 are the internal
resistances respectively from bases B1 and B2 to eta point A, Figure (a). Its symbolic
representation is given in Fig. (b) and its equivalent circuit in Fig.(c).
(a) Basic structure of UJT (b) symbolic representation (c) its equivalent circuit
When a voltage VBB is applied across the two base terminals B1 andB2, the potential of
point A with respect to B1 is given by
VAB1 
where  
VBB
RB1
.RB1 
.VBB  VBB
RB1  RB 2
RB1  RB 2
RB1
is called the intrinsic stand off ratio.
RB1  RB 2
Typical value of η are 0.51 to 0.82.Inter base resistance RBB = RB1+ RB2 is the order of 510kΩ.
This resistance RBB can easily be measured by a multimeter with emitter open. As
stated before, RBB is broken up into two resistance, RB1 between emitter and base B1 and RB2
in between emitter and base B2. Since emitter is nearer to B2, resistance RB2 is less than the
resistance RB1.
Let a voltage be applied between emitter E and base B1 so that E is positive w.r.to B1. Let
this voltage be increased from zero. As long as the emitter voltage Ve < ηVBB, the E-B1
unijunction (or p-n junction) is reverse biased and emitter current Ie is negative as shown by
the curve PS in figure below. When the emitter voltage Ve is equal to ηV BB +VD at point B,
i.e is +ve and E-B1 junction begins to conduct. Here VD is the forward voltage drop of E-B1
junction.
Typical static V-I characteristics
Point B is called the peak point and the corresponding emitter potential and current
are denoted by Vp (peak point voltage) and IP (peak –point current) respectively. At point B,
when
Ve = ηVBB +VD, the emitter starts to inject holes into the lower base region 1. Because of the
increased number of carriers in the base region, resistance RB1 of E-B1 junction decreases. As
a result, potential of eta point A to drop.
This drop in Va, in turn , causes Ve (=VA+VD) to fall. As VEE is constant, fall in Ve
gives rise to more emitter current Ie (=VEE-Ve)/RE). This increased Ie injects more holes into
region B1, thereby further reducing the resistance RB1 and so on. This regenerative or snow
balling effect continues till RB1 has dropped to a small value (from about 4KΩ to around 2 to
25 ). The emitter current ,limited by external resistance RE, is then given by
Ie 
VEE  VD
RB1  RE
When RB1 has dropped to a very small value, indicated by point C in figure, the UJT
has reached ‘on’ state. At point C, entire base region B1 is saturated and resistance RB1
cannot decrease any more. This point C is called the valley point; Vv and Iv are the
corresponding emitter potential and current After UJT is on, ort after valley point is reached,
an increase in Ve is accompanied by an increase in Ie; this is indicated by curve CQ. At point
Q, Ve is a little more than its valley point voltage Vv. Between point B and C, emitter voltage
Ve falls as Ie increases; UJT, therefore , exhibits negative resistance between these two
points. The negative resistance region between peak and valley points Figure above gives
UJT the switching characteristics for use in SCR triggering circuits.
At the valley point, the current is given by Vv /RB1. Valley point current, also called holding
current, keeps UJT on, When emitter current IE falls below Iv , UJT turns off.
UJT oscillator triggering:
The unijunction transistor is a highly efficient switch; its
switching time is in the range of nanoseconds. Since UJT exhibits negative resistance
characteristics, it can be used as relaxation oscillator.
Fig. 4.72(a) shows a circuit diagram comparison with the internal resistance RB1, RB2 of UJT
base. The charging resistance R should be such that its load line intersects the device
characteristics only in the negative resistance region. In Fig. (a) , when source voltage V BB is
applied , capacitor C begins to charge through R exponentially towards VBB. During this
charging, emitter circuit of UJT is an open circuit. The capacitor voltage Vc, equal to emitter
voltage vc, is given by
vc  VBB (1  et / RC )
The time constant of the charge circuit is τ1 = RC
UJT Oscillator (a) Connection diagram (b) Voltage wave form
When this emitter voltage ve(or vc) reaches the peak point voltage Vp (=ηVBB+VD),
the uni-junction between E-B1 breaks down. As a result, UJT turn on and capacitor C rapidly
discharges though low resistance R1 with a time constant τ2 =R1C. Here τ2 is much smaller
than τ1. When the emitter voltage decays to the valley point voltage Vv, emitter current
(Vv/(RB1+R1)falls beow Iv and UJT turns off. The time τ required for capacitor C to charge
from initial voltage Vv to peak point voltage Vp, through large resistance R, can be obtained
as under.
V p  VBB  VD  Vv  VBB (1  e T / RC )
Assuming
T
VD  Vv ,   (1  e T / RC )
 1 
1
 RC ln 

f
1 - 
In case T is take as the time period of output pulse duration (neglecting small discharge time),
then the value of firing angle α1 is given by
1  T  RC ln
1
1 -
Where ω is the angular frequency of UJT oscillator
The amplitude of pulse voltage is obtained by drawing a load line Bb for R1 as shown in UJT
V-I characteristics. The vertical projection of Bb, equal to xy , gives the voltage pulse
amplitude. With the discharge of capacitor, the operating points B and b move towards C. For
points p and q the pulse amplitude x1,y1. Eventually, point C is reached at which pulse
voltage is zero , then the operating point shifts to a , the potential of eta point A is η VBB,
but that of the emitter is Vv which is less than η VBB. As a result, E-B1 uni-junction is reverse
biased and ceases to conduct, the UJT turns off and goes into blocking mode. Capacitor C
now again charges form Ve=Vv to voltage
η VBB+VD, E-B1 uni-junction breaks down
and the above cycle repeats.
If the output voltage pulse are used for triggering an SCR, resistance R1 should be
sufficiently small so that normal leakage current drop across R1, when UJT is off, is not able
to trigger the SCR . In other words
VBB. R1
 SCR trigger v oltage Vgt
RBB  R1  R2
R BB  RB1  RB 2
where
The emitter -diode forward characteristics vary with temperature in such a manner that VD
decreases and RBB increases with temperature . In order to provide compensation against this
thermal effect, the value of R2 is use in above figure above should be calculated from the
relation.
R2 
10 4
VBB
The width of triggering pulse is some timed taken equal to R1C.
In case load line for R intersects the UJT characteristics in the region CQ, the intersecting
point will result in stable operating point and the circuit then cannot work as an oscillator.
This fact fixes the maximum and minimum values of charging resistor R and the oscillator
output frequency
The maximum value of R is determined by the peak-point values Vp and Ip. When voltage
across C reaches Vp, the voltage across R is VBB-Vp.
Rmax 
VBBV p
IP

VBB  (VBB  VD )
IP
The minimum value of R governed by valley point Vv and Iv is given by
Rmin 
VBBVv
Iv
(b) Ramp triggering). :
synchronized UJT trigger circuit using an UJT is shown in Fig. below. Diodes D1-D4
rectify ac to dc. Resistor R1 lowers Vdc to a suitable value for the zener diode and UJT. Zener
diode Z functions to clip the rectified voltage to a standard level Vz, which remains constant
except near the Vdc zero, Fig. 4.74. This voltage Vz is applied to the charging circuit RC.
Current i1 charges capacitor C at a rate determined by R. Voltage across capacitor is marked
by vc in Figure below. When voltage vc reaches the uni-junction threshold voltage ηVz, the
E-B1 junction of UJT breaks down and the capacitor C discharges through primary of pulse
transformer sending a current i2 as shown in figure.
As the current i2 is in the form of pulse, winding of the pulse transformer have pulse
voltages at their secondary terminals. Pulses at the two secondary windings feed the same inphase pulse to two SCRs of a full-wave circuit. SCR with positive anode voltage would turn
on. As soon as the capacitor discharges, it starts to recharge as shown. Rate of rise of
capacitor voltage can be controlled by varying R. The firing angle can be controlled up to
about 150o. This method of controlling the output power by varying charging resistor R is
called ramp controll, open-loop control or manual control.
Synchronized UJT trigger circuit
As the zener diode voltage Vz goes to zero at the end of each half cycle, the
synchronization of the trigger circuit with the supply voltage across SCRs is achieved. Thus
the time t, equal to α/ω, when the pulse is applied to SCR for the first time, will remain
constant for the same value of R. Small variations in the supply voltage and frequency are not
going to effect the circuit operation.
Generation otput pulses for the circuit of UJT trigger circuit. here t= α/ω
In case R is reduced so that vc reaches UJT threshold voltage twice in each half cycle as
shown in Figure(b), then there will be two pulses in each half cycle. As the first pulse will
be able to turn-on the SCR, second pulse in each cycle is redundant.
Diac based triggering circuit for TRIAC
A triggering circuit for a triac using a diac is discussed in this section
Figure shows a triac firing circuit employing Diac…….. in this circuit, resistor R is variable
and R1 has constant resistance. When R is zero, R1 protect the diac and triac gate from getting
exposed to almost full supply voltage. R2 limits the current in the diac and triac when diac
turns on. The value of R & C are so selected to give a firing angle range of nearly 0º and
180º. R controls the charging time of the capacitor C and therefore the firing angle of the
Triac. When R is small the charging time constant, equal to (R1+R)C is small .Therefore
source voltage charges capacitor C to diac trigger voltage earlier and firing angle for triac is
small. So when R is high, firing angle of triac is large.
When capacitor C (with upper plate positive) charges to breakdown voltage Vdt of diac, diac
turns on. Hence C discharges rapidly thereby applying capacitor voltage vc in the form of
pulse across the triac gate to turn it on. After triac turn on at firing angle α source voltage v s
appears across the load during positive half cycle for (Π-α) radians. When vs become zero at
ωt =Π, triac turns off. After ωt =Π, vs become –ve, capacitor C charges with lower plate +ve.
When vc reaches Vdt of diac, diac and triac turns on and vs appears across the load during the
negative half wave for (Π-α) radians. At ωt =2Π, triac turns off again and the above process
repeats.
Waveforms for triac firing circuit using a diac with
(a) R adjusted to minimum and (b) R adjusted to maximum.
The waveforms for vs, vc, vT and v0 are shown in figure for minimum Rand in figure
(b) for maximum R. Here vs is the source voltage, vc is the voltage across capacitor , vT is
the voltage across triac and v0 is the output or load voltage. After triac turn on , capacitor C
holds to a small +ve voltage.
Pulse transformer triggering
Pulse transformers are used quite often in firing circuits for SCRs and GTOs. This
transformer has usually two secondaries. The turn ratio from primary to two secondaries is 2
: 1 : 1 or 1: 1: 1. These transformers are designed to have low winding resistance, low leakage
reactance and low inter-winding capacitance. The advantage of using pulse transformers in
triggering semiconductor devices are :
(i) the isolation of low-voltage gate circuit from high-voltage anode circuit and
(ii) the triggering of two or more devices from the same trigger source.
A square pulse at the primary terminals of pulse transformer may be transmitted at its
secondary terminals faithfully as a square wave or it may be transmitted as a derivatives of
the input waveform. The conditions governing the operation of a pulse transformer in these
two functional modes are now examined.
A general layout of the trigger circuit using a pulse transformer is shown in Figure
below. Here the function of the diode is to allow the flow of current after the pulse period
(i.e. When the transistor is off) so that energy stored in the primary of pulse transformer is
dissipated.
(a) Pulse transformer trigger circuit (b) ,(c) & (d) its equivalent circuit.
In Fig.(a), the transistor is acting simply as a switch, turning on when the pulses applied
to its base is at its high level, thereby connecting the dc bias VB to the transformer primary.
The advantage of this arrangement are two fold :
(a) There need not be variable strength pulse generator since the pulses may be of the
same amplitude and the strength of the generated pulses may be increased simply by varying
the dc bias voltage.
(b) The operation of circuit becomes independent of the pulse characteristics since the
only role the pulse plays is to turn-on or turn-off the transistor. Therefore, there is no effect
of pulse distortion (e.g.pulse edges or any spike superimposed on the pulse) on the working
of this circuit.
In Fig. (a), RL limits the current in the primary circuit of pulse transformer. Its
equivalent circuit is drawn in Fig.(b), where L is the magnetizing inductance of the pulse
transformer and Rg is the resistance of gate-cathode circuit of an SCR. Fig.(c) shows the
transformer of Rg to pulse transformer primary as R1= (N1/N2)2 Rg.
The deciding factor in the wave shape of the out put pulses from a pulse transformer is its
inductance. If the pulse transformer has large inductance, the pulses are faithfully reproduced
and if the inductance is small, the pulses are exponentially decaying pulses.
In practice, exponentially decaying trigger pulses of Fig. 4.78 (b) are preferred due to
the following reasons :
(i) This pulse waveform is suitable for injucting a large charge in the gate
circuit for reliable turn on.
(ii) The duration of this pulse is small, therfore no significant heating of the
gate circuit is observed.
(iii) For the same gate-cathode power, it is permissible to raise VB to a suitable
high value so that a hard-drive of SCR is obtained. A device with a harddrive can withstand high di/dt at the anode circuit which is desirable.
(iv) The size of the pulse transformer is reduced. For an extended pulse, large
L (with iron-core) is required which increases size and cost of the pulse
transformer.
Gate Pulse Amplifiers
Pulse output from integrated circuits (ICs)may be directly fed to gate-cathode
circuit of a low-power thyristor to turn it on. But in high-power thyristors, trigger-current
requirement is high. Therefore, pulses derived from ICs must be amplified and then fed to
thyristor for its reliable turn on. In a thyristor, anode circuit is subjected to high voltage
whereas gate circuit works at a low voltage. Therefore, an isolation is essential between a
thyristor and the gate-pulse generator. As stated before, this isolation is provided by an
optocoupler or a pulse transformer.
A pulse-amplifier circuit for amplifying the input pulses is shownin Figure. It
consists of a MOSFET (or a transistor), a pulse transformer for isolation and diodes D1, D2 .
When a voltage of appropriate level is applied to the gate of MOSFET, it gets turned on. As a
result, most of the dc voltage Vcc appears across transformer primary and corresponding
pulse voltage is induced in the transformer secondary. This amplified pulse on the secondary
side is applied to gate and cathode of a thyristor to turn it on. When pulse signal applied to
the gate of MOSFET goes to zero, MOSFET turns off. The primary current due to Vcc tends
Pulse amplifier circuit using a MOSFET for a thyristor trigger circuit (a) short pulse output
(b) long pulse output
to fall and likewise flux in core also tends to decrease. Due to this tendency, a voltage of
opposite polarity is induced in both primary and secondary windings of pulse transformer.
Diode D1 on the secondary side of pulse transformer prevents the flow of negative gate
current due to the reverse secondary voltage when MOSFET is off. Reverse voltage in
primary, however, forward biases diode D2 when MOSFET is off. Current flow is thus
established in the circuit consisting of primary, R and D2. As a consequence , energy in the
transformer magnetic core gets dissipated in R and the core flux gets reset. In case pulse
width at the secondary terminals is to be increased, then a capacitor C is connected across R
as shown in Fig. (b)
Pulse Train Gating
Pulse gating is not suitable for inductive, i.e. RL loads, because initiation of
thyristor conduction is not well defined for these types of loads. This difficulty for such
situations can be overcome by triggering the thyristor continuously. Continuous gating,
however, suffers from some disadvantages like increased thyristor losses and distortion of
output pulse due to saturation of pulse transformer by continuous pulse. In order to overcome
these shortcomings of continuous gate signal, a train of firing pulses is used to turn on a
thyristor . A pulse train of gating signal is also called high-frequency carrier gating. A pulse
train can be generated by modulating the pulse width at a high frequency (10 to 30 kHz) as
shown in Figure below.
Pulse train gating (a) circuit (b) waveform
A circuit for generating a pulse train is shown in Figure (a). The circuit consists
of an AND-logic gate, 555timer, MOSFET, isolation pulse transformer and diodes D1, D2 .
The pulse signal vi, obtained from the thyristor trigger circuit and shown in the top of
Fig. (b), is fed to AND gate. The output vt of the timer 555 as shown is also fed to the AND
gate. The duty cycle of the timer should be less than 50% in order to allow the transformer
flux to reset. The pulse signal vi and timer output vt are processed in the AND gate to get the
waveform output vx as shown. The output from AND gate is then applied to pulse amplifier
circuit to augment the amplitude of vx to vgk. The amplified output waveform vgk is then
applied across gate-cathode terminals of a thyristor to turn it on.