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CIRCUIT FUNCTION AND BENEFITS CIRCUIT DESCRIPTION The circuit shown in Figure 1 provides a low cost, programmable, high voltage source with boosted output current using the AD5292 digital potentiometer in conjunction with the OP184 operational amplifier. The BSS138 PMOS transistor and Si2307CDS NMOS transistor provide current drive capability up to 2.5 A. This circuit employs the AD5292 digital potentiometer, in conjunction with the OP184, the BSS138 N-MOSFET from Diodes, Inc., and the Si2307CDS P-MOSFET from Vishay Siliconix, providing a low cost, 10-bit resolution, high voltage programmable source with boosted current output. The circuit guarantees monotonicity, ±1 LSB DNL, and integral nonlinearity of ±2 LSB typical. The ±1% resistor tolerance of the AD5292, in conjunction with an external resistor shown in Figure 2, increases the accuracy of the circuit by providing 10-bit resolution over a reduced output voltage range. This, in effect, creates a vernier DAC, which offers higher resolution over the reduced range. In addition, the AD5292 has an internal 20-times programmable memory that allows a customized VOUT at power-up. The circuit provides an accurate, low noise, low drift output voltage and high current capabilities—and is well suited for power applications. The OP184 is a single op amp that offers a high slew rate, low noise, and rail-to-rail input and output. In the circuit, it is configured in the follower mode. It guarantees that the output voltage, VOUT, is equal to the voltage set in the digital potentiometer by driving the BSS138 NMOS transistor. This MOSFET drives the Si2307CDS PMOS transistor that delivers the current, IOUT, to the load. Resistor R1 ensures that the PMOS transistor is always on, thereby eliminating latch-up or start-up problems. However, this resistance limits the maximum settling time in the circuit. The value chosen is a trade-off between the power dissipated in the resistor and the maximum VOUT settling time. PMOS PMOS VOUT VDD 30V AD5292 20kΩ 30V VDD 30V IOUT R1 10kΩ RBIAS SIGNAL SERIAL INTERFACE NMOS OP184 BSS138 LASER DIODE VSS Figure 1. Programmable Voltage Source with Boosted Current Output (Simplified Schematic: Decoupling and All Connections Not Shown) AD5292 20kΩ IOUT R1 10kΩ 30V RBIAS V’ 25V R2 100kΩ ± 1% SIGNAL NMOS OP184 BSS138 08454-001 VIN 30V SERIAL INTERFACE Si2307CDS Si2307CDS VOUT VIN 30V LASER DIODE VSS Figure 2. Programmable Voltage Source with Increased Accuracy Over Reduced Output Range (Simplified Schematic: Decoupling and All Connections Not Shown) www.BDTIC.com/ADI 08454-002 The circuit offers 1024 different voltage settings, controllable through an SPI-compatible digital interface. This circuit offers 10-bit resolution over an output voltage range of 0 V to 30 V and is capable of delivering up to 2.5 A output current. Equation 1 calculates the time constant of the network. τ = R1 × CIN end-to-end resistor tolerance. This affects the circuit accuracy due to the mismatch between the digital potentiometer and the external resistors. The ±1% resistor tolerance of the AD5292 helps to overcome the mismatch resistance error. (1) where CIN is the input capacitance in the PMOS gate (~380 pF for the Si2307CDS). The time constant of the network is 3.8 µs. The single-pole bandwidth of this network is approximately 42 kHz. Bandwidth can be increased by decreasing R1, but power dissipation will increase. Figure 6 shows the output voltage vs. digital code for the circuits of Figure 1 (normal mode, 1 LSB = 29 mV) and Figure 2 (reduced output mode, 1 LSB = 4.9 mV). The AD5292 has 20 times programmable memory, which enables the user to preset the output voltage to a specific value at power-up. Typical integral nonlinearity (INL) and differential nonlinearity (DNL) plots are shown in Figure 3 and Figure 4 using the configuration in Figure 1. In this configuration, the AD5292 is operating ratiometrically, which means that variation in the total resistor tolerance does not affect the performance. Excellent layout, grounding, and decoupling techniques must be utilized in order to achieve the desired performance from the circuits discussed in this note (see Tutorial MT-031 and Tutorial MT-101). As a minimum, a 4-layer PCB should be used with one ground plane layer, one power plane layer, and two signal layers. To improve the circuit accuracy, the voltage reference across the AD5292 can be reduced by using an external resistor as shown in Figure 5. This gives the full 10 bits of resolution over a limited voltage range. Most digital potentiometers have a ±20% COMMON VARIATIONS The AD5291 (8 bits with 20-times programmable power-up memory) and the AD5293 (10 bits, no power-up memory) are both ±1% tolerance digital potentiometers that are suitable for this application. 2 1 INL (LSB) VIN 30V AD5292 SERIAL INTERFACE 0 0 500 08454-005 V’ 25V R2 100kΩ ± 1% 08454-003 –1 1000 CODE (DEC) VOUT 20kΩ Figure 5. Increased Accuracy Over a Reduced Output Range (Simplified Schematic: Decoupling and All Connections Not Shown) Figure 3. INL vs. Decimal Code 0.5 30 VOUT RANGE = 25V TO 30V 1LSB = 4.9mV VOUT (V) 0.1 20 –0.1 10 VOUT RANGE = 0V TO 30V 1LSB = 29mV –0.5 0 1000 500 CODE (DEC) Figure 4. DNL vs. Decimal Code 0 SHUTDOWN 0 08454-006 –0.3 08454-004 DNL (LSB) 0.3 256 512 768 1023 CODE (DEC) Figure 6. Output Voltage vs. Decimal Code for Circuits of Figure 1 and Figure 2 www.BDTIC.com/ADI LEARN MORE Data Sheets MT-031 Tutorial, Grounding Data Converters and Solving the Mystery of "AGND" and "DGND", Analog Devices. AD5292 Data Sheet MT-032 Tutorial, Ideal Voltage Feedback (VFB) Op Amp, Analog Devices. AD5293 Data Sheet MT-061 Tutorial, Instrumentation Amplifier Basics, Analog Devices. MT-087 Tutorial, Voltage References, Analog Devices. AD5291 Data Sheet OP184 Data Sheet REVISION HISTORY MT-091 Tutorial, Digital Potentiometers, Analog Devices. 3/10—Rev. 0 to Rev. A Changes to Circuit Function and Benefits Section....................... 1 MT-095 Tutorial, EMI, RFI, and Shielding Concepts, Analog Devices. 9/09—Revision 0: Initial Version MT-101 Tutorial, Decoupling Techniques, Analog Devices. (Continued from first page) "Circuits from the Lab" are intended only for use with Analog Devices products and are the intellectual property of Analog Devices or its licensors. While you may use the "Circuits from the Lab" in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by application or use of the "Circuits from the Lab". Information furnished by Analog Devices is believed to be accurate and reliable. However, "Circuits from the Lab" are supplied "as is" and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfringement or fitness for a particular purpose and no responsibility is assumed by Analog Devices for their use, nor for any infringements of patents or other rights of third parties that may result from their use. Analog Devices reserves the right to change any "Circuits from the Lab" at any time without notice, but is under no obligation to do so. Trademarks and registered trademarks are the property of their respective owners. ©2009-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CN08454-0-3/10(A) www.BDTIC.com/ADI