Download Lecture 2 Multiplexer (MUX) 4-to-1 Multiplexer (MUX 4-1)

9/19/2011
Multiplexer (MUX)
Lecture 2
• A multiplexer is a data selector.
• A 2‐to‐1 multiplexer can select one of the 2 input signals and connect it to the output
signals and connect it to the output.
• Multiplexer and demultiplexer
• Decoder
• Comparator
• Boolean algebra
• Combinational circuits
• Karnaugh diagram
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4‐to‐1 Multiplexer (MUX 4‐1)
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Implement a MUX 4‐1 with 3 MUX 2‐1
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MUX (2‐1)x4
1‐to‐2 Demultiplexer (DMUX 1‐2)
• Multiplexer for two 4‐bit channels
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A demultiplexer is a data distributor.
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Decoder
DMUX 1‐4
• A 2‐to‐4 decoder (Notice that it is called Avkodare 1‐4 in the book Digitalakresar.)
• One‐hot code: Only 1 bit is 1 and the other bits are 0.
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A 3‐to‐8 decoder
A 2‐to‐4 decoder with an enable input
A 3‐to‐8 decoder is used to generate enable signals.
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An example A 3‐to‐8 decoder
Address
Output (one‐hot code)
1000 (8) 0001
1001 (9) 0010
1010 (10)
1010 (10) 0100
0100
1011 (11) 1000
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Boolean algebra
Comparator
a = b if and only if a1 = b1 and a0 = b0
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Laws of Boolean algebra for one variable
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Laws for several variables
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Absorption laws
Prove of L15
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An example
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De Morgan’s laws
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De Morgan’s law illustrated with gates
Consensus laws
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Exclusive OR (XOR)
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Express XOR in Boolean Algebra operations
• Laws for constants
• Laws for one variable
• Laws for several variables
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Definition and model of combinational circuits
• Formal definition
Boolean functions
• n‐variable function
• Total number of combinations for n variables:
• Total number of functions for n variables:
• Model
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Total number of Boolean functions for n variables
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Combinational circuits for SP‐form and PS‐form
SP‐form and PS‐form
• Minterm expression: Sum‐of‐product form (SP‐form)
• Maxterm expression: Product‐of‐sum form (PS‐form)
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Simplify Boolean functions
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Karnaugh diagram
• The numbers representing variable combinations are ordered in Gray code, so that only one variable changes between any pair of adjacent cells.
• The cells on the opposite borders are adjacent. (The diagram can be wrapped around.)
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Using Karnaugh diagram to simplify Boolean functions
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Rules for writing a logic expression
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Prime implicant
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Procedure for finding the minimal SP‐form
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Example
Notice that the decimal number at the upper‐right corner of y
each cell is the decimal value of the binary code for the cell. f = x4 x3 x2 + x4´x2´x1 x0´ + x4 x3´x1´x0´ + x3 x2´x1 + x3´x2x1´x0´
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NAND gate, NOR gate
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Karnaugh diagram with “don’t care” cells
Invert the logic expressions for the circuits with AND & OR gates twice to derive the logic expressions for the circuits with NAND or NOR gates by using De Morgan’s laws. TNGE11 Digitalteknik, Lecture 2
TNGE11 Digitalteknik, Lecture 2
The function does not specify the outputs of some input combinations since these combinations will never appear.
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