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Integrated Circuits
Integrated Circuit (IC)
• A silicon crystal (chip) containing electronic
components that create the logic gates we’ve
been looking at
–
–
–
–
SSI – Small Scale Integration
MSI – Medium Scale Integration
LSI – Large Scale Integration
VLSI – Very Large Scale Integration
• These refer to the number of logic gates
contained on the chip
Technologies
•
•
•
•
TTL – Transistor-Transistor Logic
ECL – Emitter-Coupled Logic
MOS – Metal-Oxide Semiconductor
CMOS – Complementary Metal-Oxide
Semiconductor
• These refer to the underlying
characteristics of the process for turning
silicon into gates
Digital Components
•
•
•
•
•
•
•
Decoder
Encoder
Multiplexer
Register
Shift Register
Counter
Memory
Decoder
• Convert n input bits to a single output bit
B0
B1
B2
Enable
Combinational Logic
– For example: converting binary to octal (3-to-8)
0
1
2
3
4
5
6
7
– What does the circuit look like?
• Start with a truth table
B0
B1
B2
Combinational Logic
0
1
2
3
4
5
6
7
B0
B1
B2
Combinational Logic
Decoder Chaining
0
1
2
3
4
5
6
7
Enable
Enable
• Decoders can be
chained
• Enable bit acts as the
4th input bit
• We now have a 4-to16 decoder
Encoder
0
1
2
3
4
5
6
7
Enable
Combinational Logic
• Inverse of a decoder
• Convert one input bit to multiple output
bits
B0
B1
B2
– For example: converting octal to binary (8to-3)
Multiplexer
0
Inputs
I1
I2
I3
Selectors S0
S1
Combinational Logic
• Routes one of 2n input data lines to a
single output line based on n selection
lines
I
Output
• How many inputs total?
– How big is the truth table?
Multiplexer
• 6 total inputs (4 data lines,
2 selector lines) leads to 26
= 64 rows of truth table!
• This is excessive and
tedious
• More conveniently shown
as thusly:
• Built from an n-to-2n
decoder with additional 2n
input data lines
Select
Output
S1
S0
Y
0
0
I0
0
1
I1
1
0
I2
1
1
I3
Multiplexer
I0
I1
I2
Output
I3
S0
S1
Not derived directly from
the abridged truth table but
from your knowledge of
decoders
Register
• A multi-bit storage element made up of
a group of flip-flops
– Recall flip-flops store 1 bit each
Register
• CLR is a “clear” input for
asynchronous initialization
• Data can be read out at
any time
• Data is input with the clock
signal, referred to as
loading
• Loading can be further
controlled through the use
of additional combinational
circuitry
I0
Clock
D
SET
CLR
I1
D
SET
CLR
I2
D
SET
CLR
I3
D
SET
CLR
Clear
Q
A0
Q
Q
A1
Q
Q
A2
Q
Q
Q
A3
Shift Register
• Like a “normal” register only bits can be
shifted from one flip-flop to the next
Serial
Input
D
SET
CLR
Clock
Q
Q
D
SET
CLR
Q
Q
D
SET
CLR
Q
Q
D
SET
CLR
Q
Q
Serial
Output
General Purpose Shift Register
•
•
•
•
•
Bidirectional shifting (left and right)
Serial input/output
Parallel load
Parallel output
A multiplexer is provided to select the
operation
General Purpose Shift Register
• Multiplexer
operation selection
Mode Control
S1
S0
Operation
0
0
No
Change
0
1
Shift
Right
1
0
Shift
Left
1
1
Parallel
Load
General Purpose Shift Register
• What are they good for?
– Integer multiplication by powers of 2
– Integer division by powers of 2
– Bit counting for parity
– etc.
Counter
• A register that cycles though
predetermined states based on an
external input
– We’ve seen these already
– You should already know how to design
one of these
– Parallel load/clear functionality is often
added via combinational circuitry
Memory
• A group of storage cells and associated
access circuits
• Bits are grouped into words
• Words are the smallest addressable
unit
– Typically made up of 1 or more bytes (8bits)
• Each word in memory is assigned a
unique address
Memory
Data In
Address
Read
2k word
Memory
n bytes/word
Write
Data Out
Memory
• How many
address lines?
• How many data
input lines?
• How many data
output lines?
Data In
16
Address
Read
10
1024 word
Memory
2 bytes/word
Write
16
Data Out
Memory
•
•
•
•
K = “Kilo-bytes” = 210 bytes
M = “Mega-bytes” = 220 bytes
G = “Giga-bytes” = 230 bytes
May be specified in either bytes or
words
• Micro-processors will often talk of “Kilobits” or “Mega-bits”
• Be careful
Memory Read/Write
• Read
– Apply binary address on the address lines
– Apply a signal to the read input
– Data is available on the data output lines
• Write
– Apply binary address on the address lines
– Apply binary data to the data input lines
– Apply a signal to the write input
Memory
• Two types
– RAM – Random Accessible Memory
• Operations we just looked at
– ROM – Read Only Memory
• Has no input data lines
• Has no write input
• Has no read input (doesn’t need it – just acts
when a valid address is supplied)
ROM
• Significantly cheaper than RAM since it lacks
versatility
• How does the data get in there?
– Mask programming – data is programmed in at the
time of silicon fabrication
– PROM – special programming devices allow the
user to write data one time
– EPROM – data is erased under ultra-violet light or
electronically, but must be entirely erased and
rewritten (can’t write single words)
To Do
• Read chapter 2, if you haven’t already
• Start reading chapter 4