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DESIGN OPTIMIZATION OF ZVS AND ZCS QUASI-RESONANT CONVERTERS FOR EM1 REDUCTION VIVEK AGARWAL MADHUWANTI JOSH1 Department of Electrical Engineering Indian Institure of Technology, P o w 4 Bombay 400 076, India - Buidts d i n g to the cost these drawbscks tend to undermine what could ba one of the be& features of resonant converters, that of low EMI. '1 he magnitude of peak current and voltage is dependn,t on the values o f resonating components. In case o f load resonant converters, the values of L and C are a function o f required voltage gain( h4 ), the corresponding normalized operating frequency. f. (ratio of switching fiequmcy to the resonant fraluency) and the namalized lo@ ( Q ). The relationship between these thrce quntities is manifested in the finm o f curves of Fig. 2 171, shown for a wries-parallel t y p of load resonant mverter. 1. INTRODUCTION One of the major drawbacks of hard switched. high fioquency power converters is excessive switching losses. Fig. I(a) shows one o f the m m o n power conversion schemes based on hard switching. The reason for excessive Iowa during hard switching is the presence of either a non-zero voltage or curate at the time of device switching. Fig. I((b) (d) ) shows another set o f power converters which utilire some sort o f resonance phenomenon across its devices to achieve fer0 current or voltage switching. These fall under the category o f resonant or quasi-resonant converters. These converters are more popular for high frequency applications because it is pwsible to shape the current and voltage waveforms across the device to achieve zero current or zero voltage switching, thereby reducing the switching losses to a great extent. It is a well known fact that whenever there is a r k a n c e . i t results in high peeks o f electrical quantities. Thus. the situation is no different in quasi-resonant converters. The gain versus nornializd operating frequency curves for ZCS type o f Q H co~ivertersare shown - An additional advantage that comes with the zero currenllvoltage switched resonnnt converters is a reduction in EM1 (Elecho Magnetic Interference). It i s evident that the hard switched tcrpologies will cause sudden snapping of currents through the dcvices causing large disturbances in the electromagnetic fields as.wiated with the circuits. Thew disturbances (or electromagnetic noise), in turn a l l i d the other unnponents/devices o f the same circuit as well as the neighboring circuits. A resonant converter is cxpcckd IOeliminate this drawback in a 'natural' way. (c) m - c u n e n t Switching BoonCmvnCec Fig. I Examples o f hard-switched ( (a) ) and son-switched c ~ n v ~ t(e(b) r ~ (d) ). - in Fig. 3 [I]. The corresponding curves fop ZVS mifiguration are shown in Fig. 4 121. As far as the basic deign mcthdolqty i s concerned, it remains the same fbr both the lwd resonant and OK converters. However, the full-wave Q K converters o f k a spccial advantage over the rest. that of load independence. T h i s property. as explained in tile next seclion. am be us& for design optimi7ation of these converters. Clearly. a resonant converter seems to be. a strong candidate Tor most high frequency applications, but for a major drawback. These cmiverters suffer from the disadvantage of high voltage and current pcaks in their resonant tanks. This, in effect causes the device ratings (0 be much higher than t L i r hard-switched counterparts. 81-900652-0-3/97 RS.40.00 01997 SEMCEI (4 Lcro-Volupc Switching Cant- 407 Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on November 5, 2008 at 00:07 from IEEE Xplore. Restrictions apply. INCEMIC-97 : 7A-2 Proceedings of the International Conference on Electromagnetic Interference and Compatibility '97 in this case. But another look at the curvcs (of Fig. 4) shows that i t does not matter, since the curves are indcpmdall of 0. i.e. all the curves overlap. Thus. the operatins poht does not shill and M = M'. The same thing holds for the set o f curves shown in Fig. 4, although nat so obvious at the first giance. 'Ihe present paper optimizes the design o f full-wave ZCS and ZVS type OK converters to get minimum peaks o f current and voltage and hence lower EMI. Section II describes the optimization procedure while section 111 gives the simuiation results. Results are discussed in seczion iV. The paper cuncludes in section V. over to Q- 11. OITIMIZAIION OF L,ANL) C, 7his sedion describes the design optimization process. The notaticms which are used to represent various quantities are as follows. Vi * Input voltage, V,, = Output voltage, f, = Switching frequency, f, = Resonating frequency, R( = Load resistance, L, = Resonant indudor C, = Resonant capacitor, Z = Characteristics inipcdanced(L,/C,), D = Duty cycle. Clearly, converters represented by curves of Fig. 2 or 3(a) can not hc optimi7,. Or at least there exists no simple method to do that without sacrificing output voltage regtilation. It can be shown that the same holds true for the half-wave mode QR converters also. On the other hand, full-wave ZVS and ZCS QK converters can be optimized taking advantage o f the feature mentioned in (11) above. . 1hc tlicory behind proposed optimization : To test the theory just developed. QR boost converters ciperating i t i full-wave mode have been optimally designed and simolated as reported in the subsequent sections o f the paper. I hc following ternidrelations will be used oRen in the remaining of this paper. Normalized load, v - o,l& Iksonant angular frequency, D l > 3 * . 1he aini of optimization i s as follows: i%)r a given (specified) gain M' and operating Requency (f,*), we want to optimize L, and C, in such a way that the currenVvoltage peaks are minimized. From the curvm, of M versus h,it is clear that fiir a chosen value o f c) (say c)'), M will correspond to fa' (f,'/fi). 'I'wo important conclusions follow from this: fir-+ 07 Cb> Fig. 4 The set o f curves (a) and (b) are the design curve3 M S b~r quasi-resonant zersvoltage-switched boost ccniverter. A careful look will reveal that just like Fig. 3 (b), these figure also represent a set o f overiapping M versus f. curves for various Q's. Note that h $ 0 implies half-wave mode while h 2 0 implies full-wave mode o f operation. (I)I n Fig. 2 or 3(a), if an attempt is made to vary L, and C, (keepin! f, crristnnt), 0 ' chanRes to Om, and the operating point (M ,f. ) sliifis to a corresponding point on the curve corresponding to Q,. '1 hus M f M' . I lence one can not vary (optimize) L, and C, without varying M, which o f course is not acceptable if a regulated output voltage is required. (11) In. Fig. 3(b). however, the situation is different. I t i s possible to vary L, and C,, keeping fi constant. I t is not that Q'does not change Design of test convcrters: A generalized procedure based on the curves shuwn in V i p . 3(h) and 4. for design of both the ccriverlers i s given bclow. As discussed earlier, the full wave operation fi* both ZCS and ZVS converters offers the advantage o f independence of gain ovcr load current. For the converter to remain in thc full-wave Opneiiun mode there i s a constraint given by: (81 408 Madhuwanti and Vivek : Design Optimization of ZVS .and ZCS Quasi-Resonant ... 0 , depends upon L e gain and fqucncy ratio. Ifwe operate the converter within the range defined by (2.3) and (2.4), we get sullicient variation in Q for a cunstant gain and resonant frequency. Keeping these two conditions in mind the convatas have to be designed. I.Delermine the desired gain, VJV, 2.Select a suitable switching frequency. 3.Clime M appropriate value for Q depending on (2.3) and (2.4). 4. For the values found in ( I ) and (3), determine the requirca hequmcy ratio f/r: using the curves o f Fig. 3(b) (ZCS)and Fig. 4 ~ 9 - ~ ' (0 p?ms 199*ns n-8 'b" E., I i-m. ......... (ZVS). 5. Once f/f, is known, f, can be determined since f, is known. 6. lJse (2.1) and (2.2) to ddermine oi'timized design valws. -Jm &.2.r, L, and C,. These are the un- i i-h\A 0- I - - A A 0- r .,*",, : nmw Following the above general procedure. the converters were designed for the following specifications: I Vi==12V,V,,-24V,f,lint IUOklll.,~=60htn,U=0.5.L= l m l l , C = (a) ZCS converter : 'I he desired gain 2. From Fig. 3(b), f/t; = 0.5. .'.$ Using the constraint (2.3), 1, < 9c,. 5A(i), un-optimized design. 2OOkhz. - Fig. 5 (Mi) Simulation resutts for ZCS ( (A) (0)) and ZVS ( (E) (tJ) ) cases. showing (i)device current and (ii) - voltage across the device obtained using optimized and unoptimized design values. 1\11 the waveforms show (a) 'lime dcwain waveform (b) Lower order frcquerlcy spectrum (c)l Iighcr order frequency spectrum. (2.5) h a a first step, L, was arbitrarily chosen = 0.397 pH and corresponding C, = 1.591 pF. It must, however, be pointed out that these nre only unoptimized values o f L, and C, and are optimized using repeat& simulations in the next sec2ion. (b) ZVS converter : ... 'l'he desired gain = 2. therefore from Fig. 4, the corresponding 0.5. Froni Fig. 4, Q,, * 2. Iroin equation (2.3). ZCS case: The optimization is done by varying the values o f 1, nnd C, using equation (2.5). Repeated simulations were pcrfnrtncd liw each get of values. The criteria for optimization i s peak current through the switch. As the characteristic impedance 2 increases. tlic current reduces. Ilowever. at a particular value of& voltage across the device starts developing spikes. 'I his puts a limitation on how much the characteristic impedance can be increased, a point rurtllcr discussed in the next section. - vf; I, >2.38 pi I . The switch current and voltage waveforms for vn-optintizd dcsigil are shown in Figs.JA and513 respeaively. while the correspondinn waveforms fw the optimized design nre shown in Figs.5Cand R A comparison FigsJAandSCreveals that current peaks are significantly reduced in the o p l i m i d case. The frequency spectrum shows that magnitudes o f both the lower and higher order hnrmonics nre reduced considcrab!y as compared to thosc is the un-optimi~edcase. Further, it i s clear from Figs. 5Randsf)Ihat thcre is no change i n switch voltage waveforms in optimizfd case. 'l'o begin with. I, was randomly chosen = I pH. The corresponding un-uptimizcd C, i s 0.057 pF. 111 SIMULATION OF THE CONVEI rEHS AND RESULTS OF OIYTIMIZATION 'IIIcconverters designed in the previous section were simulated using PSI'ICE. Initially converters are simulated using unoptimized vducs. Later. the values of Lr and Cr were systematically tuned to uptiinize the relevant design criteria. The w a v e f m s o f device current and voltage (across the device) along with their harmonic spectrum arc shown in Figs. 5(A) - (111, fw both ZCS and ZVS Cases. ZVS case: The criteria o f optimization in this case is the peak voltage across the device. Repeated simulations were performed to optimize the peak value o f device voltage. In contrast to the ZCS 409 Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on November 5, 2008 at 00:07 from IEEE Xplore. Restrictions apply. Proceedings of the International Conference on Electromagnetic Interference and Compatibility '97 case, here, one needs to minimize Z,because as 2 decreases, device voltaKe peak decreases. But, just as in the case o f ZCS, Z can not be decreased to any arbitrary value because after a certain limit, .the current through the device shows spikes. a potential source o f E M . 'Ihis point will be further elaborated upon in the next section. m I I\ I 'I'he peak voltage across the device and device current vs Z is plotted which is shown in Fig. 6. The point on the curve for which peak voitage across the device is minimum and current spikes are zero or very less gives the optimum value o f 2 The forbidden 7 ~ n eindicates the 2 values for which very high current spikes are present. . . . n 9201s The waveforms o f device current and voltage at un-optimum values of L, and C, are shown in Figs.58and SF respectively. while their counterparts for optimum L, and C, values are shown in Figs. 50 and s i t . The canparison o f voltage waveforms in Figs. SF and si1 shows that the voltage peaks are r e d u d substantially without making any difference in the current waveforms shown in Figs.5~andSO. The harmonic spectra o f switch voltage shows a significant magnitude reduction in Iowa as well as higher order harmonics. A major observation, then. is that ZCS and ZVS cases are duals of each other. \ *. 6.. , ! I IV. DISCUSSION O F RESULTS i . -- ah VlU . e... . i I I I i The ZCS case: In %CSconverter, there are two major c a m of EM: ( I ) The voltage BETOSS the switch being a square wave, it causes capacitive cwpling between the device and heat sink due to a large,, Fig. 5 (cont.) m, I ' i~ . .-... .... ; ! : ....... MI? I er fl A- . .._... OlMlfZ ' __ A. __ - i ,A-2- 1 O&oB 0- r w N I . j ' 8 I mnh I W Fig. 5 (cont.) ~~~,~~~~~~~~~~~~~~ 13" '- 1- Slyii), un-optimized design. 410 5C(i). optimized design. Cdvldt. (2) 1 he current through the devise is not perfectly sinusoidal. 'Ihere are higher order harmonics along with thc switching kquency which get conducted in the circuit. If the frequency o f qmation is too high, these higher harmonic components may even become a source of radiated EMI. The megnitde of the current harmonics depends u p the magnitude o f switch currmt. Since the current peaks are reduced with optimized values o f resonant elements. the magnitude o f current harmonics also reduces. Apart from reduction in magnitude o f current harmoniu. the reduction in peak reduces the required current rating and current stress on the device. The voltage waveform remains unchenyed. So there is no change in the corresponding harmonica level. It is clear that one would be tempted to reduce the current peaks to very low values. Ideally speaking, one should be able to do it uplo any arbitrary level. Unfortunately. this i s not possible because o f the limit imposed by undesirable voltage spikes across the device. As the value of inductance (and hence 2) i s increased voltage spikes appear across the device. These spikes develop because o f the fact that for a given pulse width, above a critical value of Z. m e non-zero current is present in the switch at the turn off time. These spikes can be avoided using proper closed loop amtrol o f pulse width. In fact one might feel tempted to enter L e forbidden zone in order to further optimize the design. But that will lead nowhere since the converter will enter half-wave mode. Ilaice,the desirable option is to avoid the forbidden m e canpletely. Madhuwanti and Vivek : Design Optimization of ZVS and ZCS Quasi-Resonant ... 'I he LVS case: ! I In ZVS converter, the E M arises mainly becauseof the following: (I). 'Ihe squarewave switch current will be rich in harmonics. If the switching frequency is relatively Iowa. they will be a source of coriducted EMI. If the convater operating bequency is very high, tlie impedance offered ty circuit's inductmm will be significantly high and h a m cooduced EM1 will k less. Hawever, circuit will becano a nourw of radiated EM. ' I * I I I! !/ , I ! 89ms W%S $9 qlm. 11.1 , r.ai (2). 'Ihe voltage waveform is nearly sinusoidal. Advantage ofZVS is that capacitive coupling due to device capacitance is minimum since dV/dt at the time of device switching is nearly zero. However, EM1 is prescnt due to quasi-sinusoidal voltage which contains multipla of operating frequency harmonics of voltage. The voltage hirmmics cause a current of the same beuuenw . - to flow in the circuit (conducted EMI). ,IL.--I I_ _ _...--A -_ aia voltage which the device needs to handle. Apart kom reducing the device voltage dress, latter is particularly advantageous for devices sucii as MOSFE'Is (suitable for high frequency applications), since 02" A _ _04Wb ._. . . .A- - - _,. 0w i z ; i .I" $9 wmn. 2w C..nu.*, j .JI.d I ohill. Fig. 5 (cont.) Fig. 5 (cont.) SU(ii), optimized design. 41 1 5Qii). un-optimized design. . I Proceedings of the lntemational Confeence on Eiectmrnagnetic .Interference and Compatibility '97 will be taken up in a future wurk. The EM1 pcrfcwmance Iias bcmi investigated for ZCS and ZVS converters by PSPICE simulation of the unoptimised and optimized designs and comparing their perfwmance. These resuk have been presented a i d expiaird. h i g n curves have been presented shuwitrg the pcrfwntancc of converter for various values of Z. b i , ' Another advantage of uptimimation i s reduction in device ratings and stresses on the power devices. .*,, i I i' Optimization can not be done to any arbitrary level. 'Iliere are limits (forbidden zones) which have been identified in this paper. It has been shown that if these limits are exceeded, tlie performance call deteriorate rather than improving. Closed loop control of the converter may stretch these limits slightly, but not too much as the : ; , _..--.A _.----. 02Mllr MI. * 04h0k * r. .I IV .,. _. OAW k 1. 8 I 1 I Ilh5Il, IIMlb Fig. 5 (cont.) 10Mllr) 2 5Mllt 5G(i), optimized design. 14111, converters enter half-wave mode ifoptimiped beyond a certain point. The optimization aiteria and procedure uced here seem9 to he suffrcient for most spplicatims. Hut s better option will be tu cwne up with some kind of mathematical formulae and standard de+ curves fw optimized performance. Only the most promirimit facttac (like the peak current and voltage) have heen awiciderd in thic work. Efforts are on to arrive at coirtpretteiisive ~1ptimi7ati011 fwmulae taking in to account other factrws. 1he snme will hc* reported in a future paper. 15Mlb IPOV 6Cb). Once again, it is recommended that the designer &e? enter the region marked "forbidden" to get the benefit o f reduced device voltage peaks as well as staying clear of undesired current spikes. It may be armed once more that if the system is owated in CM loop, the &sign can be furtkr optimized. But i t must be kept in mind that as we try to further optimize the converters (entering the forbiddm zone), the converter enters half-wave mode, which of -IDp", course i s not acccpcabie. *)%* I . 899hns WOWM 4W V. CONCLUSIONS It i s a common bclicf that resonant converters are farmaMe for good EM1 performance. Ilowever. this niny not be the cast?, if a proper sclcctittn of tlie resonant tank component values is not made. A ; variation in the values oft, and C, (keeping the resonant frequency, cowtatit) causcs large variations in fhe peaks of the current and voltages. Unfortunately, the optimii~itiono f L, and C, values is not easy in general in cases such as load resonant mvetters and QR ~ i z - - - . converters operated i n half-wave mode. I h e configurations. like the %<'S arid %VS Q K converters, are special cases when operated in full l c l * ' * wave mode. 'lhe optiiniiation i s easily possible in these case 1 bccause of their load insensitive feature. <)tie of the most favorable outcorries of using an optimized design i s tlic improvement in the EM1 performance of tlie converters. 'Ihis i s a r e d of reduction o f current and voltage peaks. Both lower and ' Iiiplier order Iiarmonics are reduced without making an adverse eliect on any otfier parameters of the circuit. If the operating frequency is low, the circuit i s prone to conducted noise, while it -;* becomes a w r c e of radiated noise, as the operating frequency is iitriectsed. I he latter can be explained usincq the antenna theory and \ I/ I ~ . .O l M. l b ~ -~. . . 1.. ' t I. e.?,. I I I I , I ! ' ~ ~ ~ k C , . L A , ; ~_-~ J. J. ~ A ..1" ~ ! , ~ ~ ~ z ISWIZ loh(f(r Fig. 5 (cot~t.) I wc 1DMil, Sti(ii). optiniiied desip. 412 Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on November 5, 2008 at 00:07 from IEEE Xplore. Restrictions apply. 1 IMII. Madhuwanti and Vivek : Design Optimization of ZVS and ZCS Quasi-Resunant ... P d 00- . C w r d md Vottage n ~h trim- - REFERENCES Liu. Ramesh (hugailti and Fred C‘. Y. 1.w. “()iiaci-Hrsoiirril Convnlers -Topologies and Charaderistics“. I I X I ~’Iroiwtclicw tni Power Electronics, Jan 14187. pp.62-71. [2]Marian Kazimierctuk, “Design-Orinitcd hnr1yr;is of I l r w ~ZeroVoltaw-Switching Resonant UC’/DC Converter“. 1EE.E ‘lransnctioo on Power Electronics, April 1988, pp.126-135. I T-r-- - 111 K - \\\ * VOLTAUE -, 05 , --- - Q 1. I _. , Kccurds. 1993. pp. 134- 140 151 J. Malidovi. J.Roudet and R. Scheicli “Common Modc Cui~ductalRI:l Emission of An A U K Converler With Sinusoidal Input Currcnt”, it% Proceedings of Power Eledrouics and Variable S@ I ~ ~ v c s .1994,pp. 632-637. t6j Y. P. 7,hartg. I,.Yang and C.C). Lee. “RMI Reduction Of Power houlies I W i a u.e t l c y- Modulatioii”, IEHE AI’EC Records. Vol. r. 4, 1994,pp. 601-607. [7] M. J. Schutten, K. L. Sleigerwald and Mustansir I!. Khaaluwala, “Characteristics o f Load Hesotrant Converters Operated in a High-Power Factor Mode”. 1992,pp.304-3 14. [8] Paul Tunenga, “SP1CB A Guide to Circuit Simutation and Analysis Using Pspice”, Prentice Hall of India, 1990. 1 t- I 15 ChruMetohc**udan* .- 131 I,. ltsiu ,“Characteriza&ionand Cumparim of Noise Generation tclt Quasi-Resunant and Pulw Width Moddated Converters”, IEEE PESC KwMda, I99I , pp. SO4 509. E41 1’. CalJcira R. Liu, D.Dalal and W.J. Ou. “Comparison or EM1 I’erlitnance of PWM and Resotiant Power Convert~rs”, IEEE PESC 10 2 2 (ohrs) 12 14 3 25 <a) 15 10 fig. G Peak device current and voitage (across the device) versus the characteristic impedance for (a) ZCS case and (b) ZVS case. The optimum value in both the ptots i s denoted by a ‘@‘ sign. Note that thc hcmndary of the forbidden m e is an approximate one and in Rcncral one has to lune i t stightly to avoid getting undesirable vdtage (as i n ZCS) and currcnt (as in ZVS) spikes. 413