Download Switching activity based estimation of IR-drop

Switching activity based estimation of IR-drop
Project INF
David Hardes, Pascal Hagemann, Moritz Knabben
{hardesdd,hagemapl,knabbemz}@studi.informatik.uni-stuttgart.de
December 18, 2015
Supervision: E. Schneider, M. Kochte, H.-J. Wunderlich, ITI.
Estimation of IR-drop
Motivation
IC development (Moore’s Law):
• Structure size decreasing
• Number of transistors increasing
• VDD decreasing
Consequence: IR-drop
Introduction
1
Power Grid Overview
VDD
VDD
1
&
VSS
• Cells are
powerlines
VSS
aligned
on
• Powerlines are connected to
a powerring
Introduction
2
Power Grid Overview
VDD
VDD
1
&
VSS
VSS
• Cells are aligned on powerlines
• Powerlines are connected to a powerring
Introduction
3
Causes of IR-drop
R1
VDD
R2
RN
I1
I2
IN
IN V1
IN V2
IN VN
VSS
VDD
VSS
• Inverter IN V1 switches → switching current I1
• Current I1 flows through resistor R1 → voltage drop (Vdrop,1 = R1 · I1)
• IC supply Voltage is VDD
• Supply Voltage for IN V2: VDD − Vdrop,1
Introduction
4
Causes of IR-drop
R1
VDD
R2
RN
I1
I2
IN
IN V1
IN V2
IN VN
VSS
VDD
VSS
• Set of inverters IN V = {IN V1, IN V2, ..., IN VN } switch
→ high switching current I
• Worst case: IN V are all supplied by the same powerline
• Leads to lower supply voltage
Introduction
5
Resulting Problems of IR-drop
Lower supply Voltage leads to:
• Slower switching of affected transistors
• Reliability issues
• E.g. timing of circuit can’t be guaranteed
• Therefore an accurate analysis required
Introduction
6
Overview of the proposed analysis framework
Logical circuit
Simulation & Synthesis Tool
SPICE
Signal switches & current
Extract positions
Data Structure
Validation
Current Estimation
IR-Drop
Introduction
7
Extracting cell positions from the layout
• Positions and size of cells and powerlines parsed
• Problem: Many information but only a few of them needed!
• ⇒ Memory-efficient parsing (e.g. ignore useless information)
• Parsing takes the majority of runtime
Implementation
8
Data Structures
ExtendedNode class
• Represents one standard cell (e.g. AND,NAND,...)
• Annotate area/position, signal switch current, type, name, output
waveforms and the IR-drop value
Powerline class
• Abstract electrical model: Chain of resistors with a cell connected between
each resistor
• Resistor values proportional to the distance between the cells
Implementation
9
Current Estimation Algorithm
I = IL+IR
LL
IL = L
·I
P
LR
IR = L
·I
P
• Independent estimation for each powerline
• Each cell generates a current based on its conductance
• Current is weight distributed from different poweline resistances
• Sum up the currents from each node on each node and on each end of
the powerline
Implementation
10
Validation
General principle:
(SPICE)
Compare results with simulations at electrical level
1. SPICE file containing logical circuit and powergrid
2. Run several simulations (i. e. random input patterns)
3. Estimate current according to the algorithm and SPICE
4. Average SPICE and simulation result
Validation
11
Results
Average simulation result for various benchmark circuits.
Circuit
b17
s38417
c7552
c880
c1355
c2670
Ratio
96.6%
63.0%
44.8%
23.9%
19.8%
19.4%
Simulation current in % of the SPICE result
Validation
12
How can these results be interpreted?
• Current is underestimated, for larger circuits the underestimation
decreases
• First idea: estimated current is overestimated due to cell toggles at the
same time
• In reality cells toggle at different points in time and need not increase
current
Validation
13
How can these results be interpreted?
• Current is underestimated, for larger circuits the underestimation
decreases
• First idea: estimated current is overestimated due to cell toggles at the
same time
• In reality cells toggle at different points in time and need not increase
current
Hence, a more accurate algorithm to calculate the powerline current is
needed.
Validation
14
Conclusion
• The framework yields a usable basis for further investigations.
• Switching activity on the chip can be visualized
• We proposed a wave-form based IR-drop estimation
• Analyzes IR-drop based on signal activity and layout
• Method to estimate IR-drop accurately needs further improvement
We thank for your attention during the presentation
Validation
15