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Transcript
EE Interview Process For an electronic design engineering position Schedule • Morning – EE Questions – General Design Process Questions – Lab Session – Software Questions • Afternoon – Behavioral EE Questions • Design an OPAMP with a gain of +10 • Draw a NPN transistor and label the nodes – Attach a 5V source to the Base and a 1kOhm resistor to the collector and emitter – Analyze this circuit • Replace NPN transistor with a N-Channel MOSFET – Describe different types of MOSFETS and different modes of operation – Analyze this circuit General Design Process • Have I designed and laid out a PCB before? – Programs used – Where their any layout restrictions to take into account – How did you build the PCB – Environmental check (Lead free?) Lab Session • Build an OPAMP with a gain of +10 • Build a switch for an LED using a MOSFET, 500 ohm resistor, 5 V source, button press and an LED • Build a circuit that will take a sinusoidal input and give a DC output = to the sinusoids amplitude • Analyzed a simple circuit they had built and point out the flaws (When the board was populated the manufacture put parts on backward and wrong value resistor) Software Questions • Embedded system level – Logical flow of program(i.e. If/Else) – Different variable and their function (i.e. Don’t use int when you need decimals, use float) – Not syntax oriented Comp. Arch specific (Dft. Interview) • What is a cache • Different setups for GPIO (High, Low, Tri-State etc…) • Determine bitrates from given information • What is a bootstrapping • List some different setups for MOSFETS and BJT (i.e. Open collector) Q&A