Download Signal Value Breadboard Description VDD 3.3V TOP “+”row Always

ENGG1203: Introduction to Electrical and Electronic Engineering
Second Semester, 2012–13
Lab 7
Objective:
• Learn to interface between analog and digital domains
• Connect light tracker for project.
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1 You already know your lab partner
You will be working with your project groupmate. To find your assigned lab partner and the
assigned table,
1. Log in to Moodle.
2. Select the assignment Lab 7 Partner
Please proceed to your assigned table.
Divide your project group into two subgroups, each with 2-3 persons depending on your
project group size.
• Subgroup A — Digital (FPGA) — proceed to Section 2
• Subgroup B — Analog (Circuit) — proceed to Section 5
The two subgroups will need to be combined towards the end, mixing digital and analog signals
on the breadboard. Therefore, ALWAYS keep the following conventions for this class:
Signal Value Breadboard
VDD
3.3V TOP “+” row
VCC
12V
GND
0V
Description
Always driven by
Basys2 board
BOTTOM “+” row
Always driven by
power supply
BOTH top and bottom Connect to BOTH
“–” row
Basys2 board and
power supply
the
the
the
the
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2 Getting the files
Download the files for this lab from
http://www.eee.hku.hk/~engg1203/sp13/labs/lab7.zip
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3 Digital-to-Analog Conversion
From the labs in the past few weeks, you have already experimented with the I/O capability of
the Basys2 FPGA board. In this lab, you will connect an additional digital-to-analog convertor
ENGG1203: Introduction to Electrical and Electronic Engineering
Lab 7
(DAC) to the FPGA board. With this extra module, you can produce analog voltages using
digital control.
Figure 1(a) shows the DAC module you will use for this lab. It has two connectors. The J1
connector on the DAC module should be inserted into JB I/O port of the Basys2 board. . The
J2 connector should be connected to the breadboard using an FPGA connector.
Note that the signal VCC is renamed as VDD in Figure 1(a). It is to differentiate it from the VCC
signal that is 12V. From now on, VDD is ALWAYS driven by the FPGA and is 3.3V.
Pin
6
5
4
3
2
1
(a) DAC Module
Name
A1
B1
A2
B2
GND
VDD
Description
Analog Output A1
Analog Output B1
Analog Output A2
Analog Output B2
Ground
3.3V
(b) Pinout for J2 on DAC module
Figure 1: DAC module used to convert digital signals from the FPGA to the analog circuits on
the breadboard
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
a
b
c
d
e
To DAC
f
Pin 1
g
h
i
j
k
l
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Figure 2: Connection of DAC module on the breadboard.
3.1 Test Breadboard Construct the circuit in Figure 2 on the SMALL breadboard to test the
action of the DAC. It helps to measure the output of the DAC. It also adheres to the ENGG1203
breadboard construction convention:
• VDD of the FPGA connector is connected to the “+” row on TOP of the breadboard
• GND of the FPGA connector is connected to the “–” row on TOP of the breadboard
• The “–” row at the top and bottom are connected together.
3.2 Check Yourself
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ENGG1203: Introduction to Electrical and Electronic Engineering
Lab 7
Do not power on the Basys2 board yet. Check you know the answers to the questions
below:
• The analog output of the DAC module is located at pin A1. Where is that
connected to on the breadboard?
• Where can you find a 3.3V signal on the breadboard?
• Why do we have to connect the GND signal between the power supply and the
Basys2 board?
3.3 Connect the DAC module to the JB I/O connector on the Basys2 board. The complete
connection is shown in Figure 3. Also, connect the DAC module to the breadboard using an
FPGA cable.
Figure 3: Connection of DAC module to the FPGA and to the breadboard.
3.4 DAC Control from FPGA Load the file dac.xise from the downloaded zip file.
The DAC module has to be driven by the FPGA through a complex state machine. This control
logic has been created for you as the dactls block in the schematic dac.sch.
The dactls module takes an 8-bit data and produces the necessary control to the DAC module
such that the correct analog voltage appears at pin A1. There are 256 different possible analog
values corresponding to the 28 = 256 possible digital input combinations. In particular, let n be
the value of the 8-bit digital input din, then the output voltage at A1 can ideally be expressed
as:
Vdd
VA1 = n ×
256
where Vdd is the power supply to the DAC. In your case, it is 3.3V.
In dac.sch, the input to dactls is tied to the 8 switches on the Basys2 board. As a result,
you can control the output at the DAC using the switches. Also, a special display module
(display3v3) has been created for you. It displays the ideal analog voltage that should be
output at the DAC module.
Now, using the Xilinx ISE tools, implement and download the design to the FPGA. Use a DMM
to measure the output voltage on the breadboard. Complete the following table:
din (dec)
din (bin)
VA1
0
0000 0000
20
0001 0100
128
1000 0000
3.5 Checkoff 1a
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200
1100 1000
255
1111 1111
ENGG1203: Introduction to Electrical and Electronic Engineering
Lab 7
Demonstrate the DAC circuit to your TA and answer the following questions:
• Are the voltage values you measured the same as the display? Why/Why not?
• What is the maximum voltage?
• What is the minimum voltage?
• Where is VDD, VCC and GND on your breadboard?
3.6 Disconnect the FPGA
• Disconnect the FPGA from the breadboard.
• Keep the remaining wires intact.
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4 Analog-to-Digital Conversion
In this part, you will connect an analog-to-digital converter (ADC) to the FPGA board. In
contrast to the digital-to-analog converter (DAC), an ADC converts the value of an input analog
signal to a digital representation for use in the system.
Figure 4(a) shows the ADC module you will use for this lab. It has two connectors. The J1
connector on the ADC module should be inserted into JC I/O port of the Basys2 board. The
J2 connector should be connected to the breadboard using an FPGA connector.
Pin
6
5
4
3
2
1
(a) ADC Module
Name
A0
GND
A1
GND
GND
VDD
Description
Analog Input A0
Ground
Analog Input A1
Ground
Ground
3.3V
(b) Pinout for J2 on the ADC module
Figure 4: ADC module used to convert analog signals into digital values in the FPGA
DO NOT connect to the FPGA yet.
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ENGG1203: Introduction to Electrical and Electronic Engineering
1
2
3
4
5
6
7
8
9
Lab 7
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
a
b
c
d
e
To DAC
f
To ADC
Pin 1
Pin 1
g
h
i
j
k
l
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Figure 5: Connection of the ADC module on the breadboard.
4.1 Test Breadboard Construct the circuit in Figure 5 on the breadboard. Note the following:
• VDD of the FPGA connector is connected to the “+” row on top of the breadboard;
• GND of the FPGA connector is connected to the “–” row on top of the breadboard;
• The “–” row at the top and bottom are connected together.
4.2 Check Yourself
Do not power on the Basys2 board yet. Check you know the answers to the questions
below:
• The analog input of the ADC module is located at pin A0. Where is that
connected to on the breadboard?
• What is the maximum value and minimum value of the analog input?
Minimum Voltage:
Maximum Voltage:
4.3 ADC Control from FPGA Open the file adc.xise in Xilinx ISE tools. It has the necessary
controller for the ADC module called adctls8.
The adctls8 controls the ADC module to read the analog voltage value at the input A0. The
voltage is represented digitally as an 8-bit data. The value of the 8-bit data n is computed such
that
Vdd
VA0 ≈ n ×
256
where Vdd is the power supply to the ADC. In your case, it is 3.3V.
In adc.sch, the output from adctls8 is connected to the special display module (displaydecm)
that shows the value n in one of the 2 ways. By default, it displays the value n as a number
between 0 and 255. When button 3 is pressed, it displays the voltage that should be present at
the input.
Now, using the Xilinx ISE tools, implement and download the design to the FPGA. Use a DMM
to measure the input voltage VA0 on the breadboard. Adjust the potentiometer and complete
the following table:
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ENGG1203: Introduction to Electrical and Electronic Engineering
VA0 (V)
0
0.5
1
1.5
2
Lab 7
2.5
3
dout (dec)
4.4 Checkoff 2a
Demonstrate the working ADC circuit to your TA and answer the following questions:
• Are the voltage values you measured the same as the display? Why/Why not?
• If the input voltage at VA0 is Vdd /2, what is the value of dout?
• If the value of dout is 2, what is the voltage in VA0 ?
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ENGG1203: Introduction to Electrical and Electronic Engineering
Lab 7
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5 Seeing the World
In this section, you will experiment with a special light tracker that you will use in the project.
A light tracker is shown in Figure 6.
Figure 6: Photo of a Light Tracker
There are two photoresistors located on the light tracker. These photoresistors are the same
as the one used in the ball counting tunnel from Lab 4. As a reminder, the resistance of a
photoresistor decreases when the light intensity shining on it increases. Also included in the
light tracker is a laser module. You do not need to use this laser connection for the project.
Figure 7 shows the schematic of the light tracker as well as the connector pin assignment.
Light Tracker Cable
Cable Connector
RR
Light Tracker Internal
RR
9 10
COM
RL
RL
100 Ω
L+
L-
1 2
Figure 7: Connector pin assignment of the light tracker
5.1 Left or Right? With the two photoresistors positioned at 90◦ to each other, it is possible
to determine the angle of a light source by noting the difference in resistance between the two.
The difference in resistance can be measured using a simple potential divider circuit as follows.
In the following diagram, label the connectsions with Vdd, GND, and Vs such that:
• When the light source is 0◦ in front of the light tracker, Vs should be Vdd /2;
• When the light source is 45◦ to the RIGHT of the head, Vs should be 0V;
• When the light source is 45◦ to the LEFT of the head, Vs should be Vdd .
Note that Vdd is the 3.3V power from the Basys2 board.
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ENGG1203: Introduction to Electrical and Electronic Engineering
Lab 7
RL
15
20
25
30
35
15
20
25
30
35
10
5
1
RR
f
g
h
i
j
To
Power Supply
CH2 (3.3V)
[Temporary Vdd]
10
5
1
a
b
c
d
e
Pin 1
Figure 8: Connection to test the function of the light tracker input. DISCONNECT the 3.3V
power supply after test.
5.2 Test Breadboard Based on your circuit above, connect the light tracker to the LONG
breadboard according to Figure 8. Note the following:
• In the final circuit, VDD from the Basys2 will be driving the “+” row on TOP of the
breadboard. However, we are faking this connection at this step by manually supplying
3.3V from the power supply. DISCONNECT the 3.3V supply after next step.
• GND of the power supply is connected to the “–” row at the BOTTOM of the breadboard
• The “–” row at the top and bottom are connected together.
5.3 Relating Angle to Voltage Complete the following table that relates the angle of the light
source and Vs . The polarity of the angle is defined in Figure 9.
Use the light torch as the light source. You should keep the light source at about 0.5m from the
light tracker.
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ENGG1203: Introduction to Electrical and Electronic Engineering
Lab 7
θ
45
45
Figure 9: Defining angle of light source relative to the light tracker
Angle θ (degree)
−45
−30
−20
−10
0
10
20
30
45
Vs (V)
Plot the results in the following graph:
5.4
DISCONNECT the 3.3V power supply from the breadboard
5.5 Assume Vs = ks × θ, approximate the value of ks by measuring the slope of the curve where
Vs is linearly proportional to θ.
ks =
5.6 Checkoff 1b
Show to your TA your complete circuit and the measurements above. Answer the
following questions:
• What is the value of ks ?
• In what range of θ is the voltage Vs linearly proportional to θ?
• If you move the light source away/closer to the light tracker, does it change the
value of ks ?
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ENGG1203: Introduction to Electrical and Electronic Engineering
Lab 7
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6 Motor Driver – Single Ended
In this section, you will construct part of the final bi-directional motor driving circuit for the light
tracker. You do so by extending the voltage follower circuit from last week into a non-inverting
amplifier using an op-amp. The schematics of a non-inverting amplifier is shown below:
Vcc
Vin
+
Vout
−
R2
R1
Figure 10: A non-inverting amplifier
In this circuit, the output voltage is related to the input voltage by the formula:
R2
Vout = 1 +
Vin
R1
6.1 Calculate the Gain For this circuit, use R2 = 6.2 kΩ, R1 = 2.2 kΩ.
Given these resistor values, what is the value of the gain of the circuit, kd , that relates Vout to
Vin ?
kd =
6.2 Construct the above non-inverting amplifier circuit on top of the circuit from previous steps.
Use the LONG breadboard. This is the circuit you will use in your project.
Reminder: DISCONNECT the FPGA and any power supply from the
breadboard before you proceed with the construction of the op-amp circuit.
Recall that the power of the op-amps are both supplied from Pin 2 and Pin 4 of the IC. Also,
recall the ENGG1203 convention: Connect VCC of the op-amp IC (pin 2) to the “+” rail at the
bottom. Connect GND pin of the package (pin 4) to ground.
Your final circuit should look like the connection in Figure 11. Note the special marking (a small
half circle) on the top of the op-amp package. The location of this marking helps you to orient
the IC and identify the pins.
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35
30
25
20
15
10
Lab 7
8
7
6
5
1
2
3
4
f
g
h
i
j
Note the 3.3V
supply has been
removed
5
1
ENGG1203: Introduction to Electrical and Electronic Engineering
e
Pin 1
c
d
To
Power Supply
CH1 (12V)
35
30
25
20
15
10
5
1
a
b
To
Power Supply
CH2 (0-5V)
[Temporary Vs]
Figure 11: Implementation of a single-ended motor driving using a non-inverting amplifier on
breadboard.
6.3 Test the non-inverting amplifier. On your power supply, turn VOLTAGE of CH1 in the
MIDDLE to 12V. This is the signal VCC.
You will use CH2 of the power supply to simulate the voltage output from the FPGA (being
constructed by the Analog Subgroup). Connect connect CH2 to the Vin of the Op-Amp as shown
in Figure 11
Now use a DMM to measure the voltage at the output and complete the following table:
Vin
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Vout
6.4 Checkoff 2b
Show to your TA the completed non-inverting amplifier circuit and answer the following questions:
• What is the maximum and minimum voltage at the output of the op-amp?
• How is this maximum and minimum voltage related to the VCC and VEE of the
Op-Amp?
• Where are R1 and R2 on the breadboard?
• What is the gain of the non-inverting amplifier?
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ENGG1203: Introduction to Electrical and Electronic Engineering
Lab 7
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7 Combined System
• Your entire project group should complete this part together.
• The 2 subparts can be done in parallel to save time.
It requires combining the circuits each subgroup has made in previous steps to form a
complete system.
The goal of this part is to form a complete system that can control the speed of a motor by the
angle of the light source relative to the light tracker.
7.1 Complete Breadboard Circuit (Hardware Team) You should use the LONG breadboard
from the Analog circuit subgroup before.
Extend the circuit from Section 6 such that it connects to the Basys2 board. Figure 12 shows a
block diagram of the final circuit.
θ
Vcc
Vin
45
45
ADC
FPGA
Vmp
DAC
R2
R1
Figure 12: Block diagram of target system: From light tracker head, to FPGA board, then back
to light tracker motor.
Your breadboard circuit should look similar to the one shown in Figure 13. Construct the circuit
as an extension to the ADC circuit already on the breadboard. Recall the ENGG1203 convention:
• Connect only VDD from FPGA to the top row marked “+”. It is 3.3V.
• Connect only VCC to the bottom row marked “+”. It is 12V. Only the op-amp requires
12V as power.
• Connect the “–” row from top and bottom. They represent GND.
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35
30
25
20
15
10
5
Lab 7
5
6
7
Pin 1
4
To DAC
3
Pin 1
1
e
To
Light Tracker
8
To ADC
Pin 1
2
f
g
h
i
j
1
ENGG1203: Introduction to Electrical and Electronic Engineering
35
30
25
20
15
10
5
1
a
b
c
d
To
Power Supply
CH1 (12V)
Figure 13: Full breadboard circuit with ADC, DAC, light tracker.
You will notice this circuit is a simple combination of that from both subgroups in previous
steps.
7.2 Simple Unity Control (FPGA Team) Open the project file adda.xise using Xilinx ISE
tools. In this project, open the schematic file adda.sch.
Make necessary connections in adda.sch such that:
• It passes the digital value dout directly as din to the DAC. Recall that you need to use
the block dactls to control the DAC module.
• Display the value dout to the display module displaydecm like before.
If your circuit works correctly, you should now have a circuit that output a signal from the
Op-Amp that is directly proportional to the angle of the light source relative to the light tracker.
7.3 Checkoff 3
Show to your TA the complete circuit with ADC and DAC working. Answer the
following questions:
• What is the minimum and maximum value of Vmp ?
• When the light source is on the LEFT side of the laser head, is Vmp close to its
minimum or maximum value?
• Suggest one way such that we can reverse this behavior?
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