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Course Introduction
Purpose
• This course discusses techniques for analyzing and eliminating
noise in microcontroller (MCU) and microprocessor (MPU) based
embedded systems.
Objectives
• Learn about how packaging affects efforts to reduce EMI.
• Understand the necessity for carefully designed decoupling
capacitors, such as three-pin teed-through types.
• Find out how to evaluate EMI countermeasures.
• Discover the best way to implement EMI reduction techniques.
Content
• 15 pages
Learning Time
30 minutes
Reducing EMI
EMI reduction is a goal shared by both
the semiconductor experts who design
MPUs and other LSI devices and by the
engineers who apply those chips in
embedded systems
Page 2
Delete the thin line
through the illustration
Explanation of Terms
Anechoic
chamber
A room designed to block radiation from the outside and to minimize reflections off the room’s walls, ceiling, and floor
Balun
A passive electronic device that converts between balanced and unbalanced electrical signals
CISPR 25
International Special Committee on Radio Interference (CISPR) publication 25: “Limits and methods of measuring
radio disturbance characteristics for the protection of receivers on board vehicles.” CISPR is a sub-committee of the
International Electrotechnical Commission (IEC).
Core
A microcontroller chip is composed of a core, I/O ports, and power supply circuitry. The core consists of the CPU,
ROM, RAM, and blocks implementing timers, communication, and analog functions.
ECU
Electronic Control Unit
EMI
Electromagnetic Interference
Harness
Cables (wires) connecting a board and power supply or connecting one unit in a system to another
LISN
Line Impedance Stabilization Network
Power
supply
Two power supplies are applied to the LSI: Vcc and Vss. The core power supply internal to the LSI is VCL
(internal step-down). The Vss-based power supply routed through the LSI is VSL.
TEM Cell
Transverse Electromagnetic Cell
WBFC
Workbench Faraday Cage
Supply Decoupling Basics
• Design goal for EMI reduction: Increase current supply from
decoupling capacitor (Cdc, loop B) and decrease current
from main power supply (loop A) as much as possible
Loop B
- Current ratio A/B is determined by the impedance ratio:
Loop A
• If possible, this ratio should be <1/100 (-40dB)
A
Ferrite
bead
(L1)
C
C=A+B
Package
Chip
B
Decoupling
capacitor
(Cdc)
CPG
Module
Two methods for reducing EMI:
• Increase loop-A impedance by
inserting ferrite bead in loop
• Decrease impedance of loop
by decreasing its inductance
- Make the loop area as small as
possible to minimize its inductance
- Use feed-through capacitors because
they have intrinsic impedances less
than 1/10th those of conventional
SMD ceramic capacitors
Measuring point
BGAs and CSPs Save Board Space
Smaller chip packages allow products to become more compact
and convenient, but complicate design efforts to place decoupling
capacitors where they will be most effective for reducing EMI
QFP
BGA
WLP
CSP
28 mm
FBGA
(Fine-pitch BGA)
Typical
Die size
2828: 208pins (256 pins/0.4 mm)
2727: 256 pins
1313: 240 pins
1111: 256 pins
Decoupling Capacitors for BGAs
Finding sufficient mounting space can be a problem!
27mm
BGA
Top of circuit board for mounting a BGA
Bottom side showing placement of bypass caps
Low-ESL Bypass Capacitors
Page 6
Problems
with Narration
Three-pin SMD feed-through capacitors provide very good
connections
- No extra paths, so 100% of supply current is fed through
3-pin feed-through capacitor*
Design alternative:
IDC-type
Multi-pin capacitor
IDC-type
achieves
low
capacitor
achieves
lowsupply
supplyimpedance
impedance
VCPU
*Source: Murata Manufacturing
Evaluation of Supply Decoupling
Area under device
showing pads for
decoupling capacitors
Current measurement points
(Vcc, PVcc, Vss)
Power
supply
connections
Top of evaluation board
Page 7
Slide Changed
(Text moved to left,
away from top photo.)
Typical
decoupling
capacitor
Pads for inductors
(ferrite beads)
Bottom of evaluation board
Evaluation Example
Near-field tests* using the
evaluation board allow
comparisons of levels
of RF current in the
power supply lines
No filter components
12 bypass capacitors added
* MPU: SH7055R
Frequency: 80MHz
Ferrite bead + 12 caps
Capacitor Tests with 256-pin QFP
Near-field Tests
Twelve 3-pin capacitors (0.1µF each)
256-pin QFP
VDE measurement
point
NFM21
Caps (for Vcc)
Caps (for PVcc, AVcc)
MPU: SH7055R
(40MHz)
Macro (sensitive)
probe @80MHz
-20dB
80
One 3-pin capacitor (NFM21: 1µF)
VDE Measurements
70
Noise (dBµV)
60
w/o DeCaps
12 DeCaps
NFM21
50
40
30
20
10
0
-10
0
100
200
300
400
500
600
700
800
Frequency (MHz)
900
1000
Capacitor Tests with 256-pin BGA
Near-field Tests
Eight 2-pin capacitors (0.1µF each)
256-pin BGA
All Decoupling caps :
on bottom side
NFM21
Caps (for Vcc)
Caps (for PVcc,
AVcc)
MPU: SH7055R
(40MHz)
Macro (sensitive)
probe @80MHz
-20dB
80
One 3-pin capacitor (NFM21: 1µF)
VDE Measurements
70
Noise (dBµV)
60
w/o DeCaps
8 DeCaps(T)
NFM21
50
40
30
20
10
0
-10
0
100
200
300
400
500
600
700
800
Frequency (MHz)
900
1000
Scan for EMI at All Locations
Page 11
Problem with slide — Dotted lines
in scans have been replaced with
solid lines and moved. Please corre
Near-field tests reveal
EMI problem distant
from MPU
- Magnitude of noise near
output connector of
ECU-B is 20dB higher
than that of ECU-A
ECU-A: Good EMI performance
ECU-B: Excess Leakage
MPU
MPU
ECU package
Data Shows Progress — and Problem
Noise Current (dBµV)
Noise Current (dBµV)
- Target level was exceeded by
ECU-B’s design
- Test data when decoupling
capacitors were used
60
Noise Current (dBµV)
Noise reduction efforts were
successful for both ECUs, yet
insufficient for ECU-B
40
x
Page 12
Problem with slide — Text in the
two data traces is missing, and
“Frequency (MHz) “ is obscured.
Without caps
ECU-B
With caps
Target Level
20
With caps+FB
ECU-A
0
- Test data when decoupling
capacitors and ferrite bead
were used
パスコン + インダクタ
Frequency (MHz)
Test data showing
decoupling effects
on basic boards
Test data showing
degradation on
ECU-B
Effects of Adding Components
Decoupling
capacitors
Page 13
Problem with slide —
Using a ferrite bead and
multiple
decoupling
Block diagram
(bottom right)
capacitors is an effective
way up
to reduce
EMIdown.
is broken
and moved
Slit
(moat)
Ferrite
bead
Ground plane
(no slit)
Vcc
Noise Current (dBµV)
70
Capacitors added
60
f = 80MHz
50
40
30
-20dB
Target level
20
Capacitors +
Ferrite bead
10
Capacitor
0
I/O
current
GND
Core current
0
2
4
6
8
10
12
14
16
18
Number of Decoupling Capacitors
20
Countermeasure Implementation
Page 14
It’s best to follow a step-by-step EMI reduction procedure:
Problem with slide —
Find the most important noise contributor and eliminate/reduce
Vertical arrows should
that problem; then repeat the process until designbegoal
is met
dotted,
not solid.
Reducing noise from unimportant
element has no effect
60
Effect:
0dB
50
40
Effect:
-3dB
EMI level (dB)
EMI level (dB)
60
Reducing noise from important
element drops overall level by 3dB
-10dB
50
-10dB
40
30
30
Before counter- After countermeasure
measure
Noise element 1
Noise element 2
Resulting
noise level
Before counter- After countermeasure
measure
Noise element A
Noise element B
Resulting
noise level
Course Summary
• How packaging affects EMI reduction
• Three-pin SMD feed-through capacitors
Page 15
Problem with slide — Text in the
yellow block should be contained
within the box, as shown here.
• Evaluating EMI countermeasures
• Iterative method for countermeasure implementation
For more information on specific devices and related
support products and material, please visit our Web site:
http://america.renesas.com