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BABAR et al.: IMPLEMENTING DIMENSIONAL VIEW OF 4X4 LOGIC GATE IMPLEMENTING DIMENSIONAL-VIEW OF 4X4 LOGIC GATE/CIRCUIT FOR QUANTUM COMPUTER HARDWARE USING XYLINX MOHAMMAD INAYATULLAH BABAR1, SHAKEEL AHMAD3, SHEERAZ AHMED2, IFTIKHAR AHMED KHAN1 AND BASHIR AHMAD3 1 NWFP University of Engineering & Technology, Peshawar, Pakistan City University of Science & Information Technology, Peshawar, Pakistan 3 ICIT, Gomal University, Pakistan 2 Abstract: Theoretical constructed quantum computer (Q.C) is considered to be an earliest and foremost computing device whose intention is to deploy formally analysed quantum information processing. To gain a computational advantage over traditional computers, Q.C made use of specific physical implementation. The standard set of universal reversible logic gates like CNOT, Toffoli, etc provide elementary basis for Quantum Computing. Reversible circuits are the gates having same no. of inputs/outputs known as its width with 1-to-1 vectors of inputs/outputs mapping. Hence vector input states can be reconstructed uniquely from output states of the vector. Control lines are used in reversible gates to feed its reversible circuits from work bits i.e. ancilla bits. In a combinational reversible circuit, all gates are reversible, and there is no fan-out or feedback. In this paper, we introduce implementation of 4x4 multipurpose logic circuit/gate which can perform multiple functions depending on the control inputs. The architecture we propose was compiled in Xylinx and hence the gating diagram and its truth table was developed. Keywords: Quantum Computer, Reversible Logic Gates, Truth Table computations have been performed during which operation based on quantum computations were executed on a small no. of qubits. It is assumed that the Q.C will be able to handle different problems with much faster speed as compared to the conventional computers, if they built on large scale [7]. The primary objects of Quantum Computing are vectors and matrices of a Hilbert space over the complex numbers. Vectors are written as bras such as <Φ| and kets such as |Ψ> . |Ψ> corresponds to a normal (vertical) vector whereas <Φ| corresponds to transposed (horizontal) and complex conjugated vectors. 1. QUANTUM COMPUTING Quantum computer is a computation device that incorporates quantum mechanical phenomena distinctively to perform operation on data in terms of superposition & entanglement. In contrast to traditional computer where data is represented by means of bits, Q.C makes use of qubits for data representation. Mathematical theory of computation mainly emphasizes on to model the computation abstraction from any particular computer implementation. With the development of technology, tremendous change has been observed in computer architectures. In addition computers with different machine architectures can be observed at any given time. To make them useful mathematicians have to conceptualize and abstract all these superficial architectural differences away and also to focus on the factors that really composes computation [3]. Still quantum computing known to be an emerging technology and different IJSSST Vol. 9 No. 5, December 2008 2. BITS vs. QUBITS Memory of conventional computer is made up of bits and is used to hold either binary digit 1 or 0. The machine manipulates those bits by means of transferring from logic gates to memory and vice versa where as in Q.C, 8 ISSN 1473-804x Online, 1473-8031 Print BABAR et al.: IMPLEMENTING DIMENSIONAL VIEW OF 4X4 LOGIC GATE memory makes use of holding data in terms of qubits .i.e. 1 or 0 or critically a superposition of these. Qubits implementation for Q.C is represented by particles having two spin states i.e. “up” written as | 0> and “down” written as |1 >:). They can also be entwined with other qubits which results the astonishing computational power of a quantum computer. Entanglement is an exclusive quantum observable fact. It is a property of a multi-qubit state space and can be thought of as a resource that the measurement on one qubit will directly affect the other [7]. The process of extracting information from a set of qubits is called measurement. Just as classical computation is based on the ability to store and manipulate information on collections of two-state “bits”, quantum computation relies on ensembles of two-state quantum systems called qubits. Unlike the classical bit, which occupies one of two mutually exclusive states, the qubit exists in a superposition of two states. For our purposes, the most general model of the qubit is: | ψ > = α | 0 > + β |1 > Where α and β are complex numbers such that | α |2 + | β |2 = 1 and | 0 > = [ 1,0 ]T , | 1 > = [ 1,0 ]T are orthonormal basis vectors in the 2-dimensional state space of the qubit. The physical meaning of α and β is that any given measurement of the qubit will show the system to be in state | 0 >: with probability |β|2 [7]. Another way to express an arbitrary single qubit is | ψ > = eiγ cos θ | 0 > + ei (γ +φ ) sin Figure 1: Qubit Representation Conventional bit 1 is represented by up arrow, bit 0 is represented by down arrow and arrow-in-between pertains to a superposition of 1 & 0. Moreover the arrow may be moving around the vertical axis that pertains to the qubit region [3]. Consider conventional computing device operated on three bits register in which bits in the register at any given time pertains to definite state like 1-0-1 but in Q.C, qubits may be in a state of all the allowed classical states. In general, the register is described by the following wave function: | ψ >= a|000> + b|001 >+ c|010 >+ d |100 >+ e |110 >+ f |011 >+ g |101 >+ h|111> Where a, b, c are coefficients for complex numbers having probabilities expressed in terms of amplitudes squares for measuring each state qubits [2]. To record the register state having n qubits quantum register (Q.R), it requires 2n complex numbers. For instance quantum register with 3 qubits requires 23=8 numbers. It is concluded that no. of encoded classical states in Q.R exponentially grows with corresponding numbers of qubits. θ 3. THE QUANTUM CIRCUIT MODEL |1 > [6] 2 2 Graphical representation of qubits can be shown by sphere with arrow in it, as in the figure below: IJSSST Vol. 9 No. 5, December 2008 Circuits consist of wires holding different values of bits for transferring to gates which are responsible to perform different primitive operations on these transferred bits. The circuit depth is known to be total number of time slices only in that case when the circuit can be visualized as being divided into a sequence of discrete time slices subject to the 9 ISSN 1473-804x Online, 1473-8031 Print BABAR et al.: IMPLEMENTING DIMENSIONAL VIEW OF 4X4 LOGIC GATE increase in physical entropy of process then it is termed as physically reversible process, in other words its known as isentropic. Moreover no one can fix the limit to the closeness through which one can approach perfect reversibility. According to Rolf Landauer’s Principal “for a computational process to be physically reversible, it must also be logically reversible”. Discrete/deterministic computational process is known as logically reversible if there is 1-to-1 mapping between old computational states to new one and transition function. Probably the main motivation to support reversible computing is to enhance the computer power consumption beyond the primary limit of Von Neumann Landauer i.e. kTln2 energy dissipated per irreversible bit operation, where T is environment temperature and the value of Bolt Mann’s constant k=1.38 × 10-23 J/K. application of single time slice required by a single gate. Quantum circuitry consists of sequence of quantum gates applied to Q.R. Quantum register having size n is made up with combination of uniquely addressable qubits having individual couplings. Each quantum gate carries reversible property which incorporates transformation by means of unitary operator between the inputs and outputs. Only in that case operator U will be known as unitary when U’U=1. Hence quantum circuit can be defined in terms of Q.R, to which a finite no. of quantum operations are applied [3]. 4. QUANTUM DECOHERENCE The main problem is to keep computer component in coherent state, because the little interference from the external world would effect the system to become decohere. This may cause the computational steps of the quantum computer to be violated. Candidate system decoherence or de-phasing time at low temperature usually range between seconds and nanoseconds. In addition error correction results in increased number of required qubits [7]. The implementation of reversible computing as stated in Wikipedia “Tends to typify and control the physical dynamics of mechanisms to carry out desired computational operations so precisely that we can accumulate insignificant total amount of uncertainty regarding the complete physical state of the mechanism per each logic operation that is performed. Alternatively, we need to track the state of the active energy that is involved in carrying out computational operations within the machine, and to design the machine in such a way that most of this energy is recovered in an organized form which can be reused for subsequent operations, rather than to dissipate into the form of heat”. 5. REVERSIBLE COMPUTATIONS AND UNCOMPUTATION It is currently believed that quantum computing is the most general physical model of computation, encompassing classical computation. However, this is apparently contradicted by the fact that all quantum computations are invertible / reversible, whereas many classical computations are irreversible. Any computational process which is time invertible can be known as reversible computing. It refers to a time-reversed version of the process that exists within the same general dynamical framework as the original process. Reversibility can be of two types i.e. physical and logical reversibility. If there is no IJSSST Vol. 9 No. 5, December 2008 6. REVERSIBLE LOGIC GATES Reversible logic gained much consideration in the field of optical computing, quantum computing and low power design. Furthermore amalgamation of reversible logic has become hot research area in the last decay. In disparity to combination with conventional 10 ISSN 1473-804x Online, 1473-8031 Print BABAR et al.: IMPLEMENTING DIMENSIONAL VIEW OF 4X4 LOGIC GATE irreversible gates, two important limitations for reversible gates are: a) feed back and b) fan out are not allowed. The output comes in terms of network consisting of cascaded reversible gates [1]. Generally, the logic gates other than the NOT gate in a classical computer are not reversible. Hence, it is not possible to recover the 2 input bits from the output bits in case of AND gate and it is exceptional case for both input bits to be of 1. However to describe quantum computing device as a first step it is enlightening to examine the theoretical possibility of the reversible gates, moreover it is a matter-of-fact that they are unable to increase entropy. Reversible gates perform reversible function on n bit data and return corresponding n bit data, where bits string x1, x2,…..,xn is a string having size n. Where space {0, 1}n is formed by n-bits data set. Younis & Knight in [4] demonstrated that “some reversible circuits can be made asymptotically energy-lossless if their delay is allowed to be arbitrarily large”. Presently because of irreversibility, loss in energy has been observed but this loss may be changed in case of improvement in power dissipation [5]. For considering quantum gates, first of all we need to specify the quantum replacement of an n-bit datum. The quantized version of classical n-bit space {0, 1}n is: HBQ(n)= l2({ 0,1}n) By classification complex valued function space on {0, 1}n is an inner product space and it can also be assumed as linear superposition of bit string of classical nature. By having notation of DirecKet, if x1 , x2 ,.........xn is classical bit string then | x1 , x2 ,.........xn > are known as special n qubits computational basis states. Generally in case of Q.C we usually take interest in reversible gates but here we shall concentrate in unitary mapping i.e. mainly used to preserve inner product on HQB(n). Actually quantum gates are offered rise by classical reversible n-bit logic gates in IJSSST Vol. 9 No. 5, December 2008 terms of: for every reversible n-bit logic gate “f” the corresponding quantum gate “Wf” may be described as Wf (| x1, x2,……..,xn >)=|f (x1, x2,……..,xn)>. 1 qubit gate represented by relative phase shift can be described by the unitary matrix: ⎛ etθ Uθ = ⎜ ⎝ 0 so 0⎞ ⎟ 1⎠ U θ |0>=et θ |0> U θ |1>=|1> 7. QUANTUM GATE NOR, AND, NAND and XOR are all irreversible logic gates; they all must generate heat. Amount of information on the right hand side of below given equation is less than the information on the left hand side [3]. (a,b)→- (a ^ b) Special gates have been conceived and fabricated which maintain all information that is passed to them, so that the computation can be run forward and backward. The computational results in a very large amount of junk, because every intermediate step is remembered, but heat generation is eliminated while the computation goes on. Quantum circuits can be described by quantum logic gates which may perform operation on small number of qubits. They can be compared with the conventional logic gates of digital computers. In contrast to conventional logic gates these are reversible. For example Toffoli, a universal logic gate can be directly mapped to quantum logic gates and it also provides reversibility. Quantum logic gates can also be represented by unitary matrices [7]. 8. LOGIC IMPLEMENTATION OF 4x4 PROPOSED CIRCUIT MODEL The logic diagram given below in figure 4 represents the 4x4 circuit model implemented 11 ISSN 1473-804x Online, 1473-8031 Print BABAR et al.: IMPLEMENTING DIMENSIONAL VIEW OF 4X4 LOGIC GATE in Xylinx which has a,b,c, and d acting as inputs and w,x,y and z are the outputs producing results on the basis of the input combinations and the pseudo-code for the implementation is given in the next section. Figure 4: 4x4 Multipurpose Reversible Logic Gate/Circuit output reg w,x,y,z; always@(*) begin if (c==0 && d==0) begin w=a&b; x=a|b; z=a&(~b); end if (c==0 && d==1) begin w=a|b; x=a^b; y=a&(~b); z=~a; end if (c==1 && d==0) begin w=a&b; x=a^b; y=~(a&b); end 9. PSEUDOCODE FOR THE PROPOSED LOGIC CIRCUIT As regards the logic circuit proposed, the inputs to the logic circuit are a,b,c,d whereas the outputs are w,x,y,z. a and b are acting as control inputs whereas c and d are acting as normal inputs. Depending on the different combinations of the control inputs and for different combination of the normal inputs, it performs different logical operations according to the following logical operations.[7] module quantum_gate(w,x,y,z,a,b,c,d); input a,b,c,d; IJSSST Vol. 9 No. 5, December 2008 12 ISSN 1473-804x Online, 1473-8031 Print BABAR et al.: IMPLEMENTING DIMENSIONAL VIEW OF 4X4 LOGIC GATE if (c==1 && d==1) begin w=a|b; x=a&b; y=a&(~b); end 1 11. The following table 1 gives the truth table for the model circuit where the inputs are designated as a,b,c,d and outputs are designated as w,x,y,z. a and b are acting as control inputs whereas c and d are acting as normal inputs. As there are 4 inputs so there can be a maximum of 16 combinations of 0s and 1s. Depending on the different combinations we have different outputs where 0s represent low-level states and 1s represent high-level states and Xs represent the don’t care conditions or the garbage outputs. These outputs have been formulated according to the Boolean logical expressions giving different input combinations [7]. B 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 a 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 w 0 0 0 1 0 0 0 1 0 1 1 1 0 1 1 X 0 1 1 1 0 1 1 0 0 1 1 0 0 0 0 IJSSST Vol. 9 No. 5, December 2008 y X X X X 1 1 1 0 0 1 0 0 0 1 0 1 1 1 0 X CONCLUSIONS WORK AND FUTURE Many applications in vast area of telecommunication systems, cryptography and computer graphics are related to reversible or information lossless circuits. Also they become increasingly important for the emerging field of Quantum Computing. The aim of this research project is focused on the improvement of hardware circuitry for Quantum Computing by designing a novel circuit which can be regarded as a reversible logic circuit. The circuit shall be designed as a model so that further improvements in this regard are possible in the future. The existing non-reversible logic gates dissipate a considerable amount of energy and their combinational circuits even more. The circuit model thus suggested can be utilized in energy and power efficient digital circuits as compared to the already existing power dissipation digital circuits. The current design does not develop XNOR and NOR functions but it can be extended and modified to perform these desired operations. The model thus proposed does not confirm to the characteristic of reversibility as per the requirement of quantum circuits or gates and in the future work we shall focus on its improvement to be functioning as reversible as well. 10. TRUTH TABLE FOR THE MODEL CIRCUIT c 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Table 1: Truth Table for Proposed Gate end endmodule D 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Z 0 1 0 0 X X X X 1 0 1 0 X X X REFERENCES 1. Daniel GroBe, Xiaobo Chen, Gerhard W. Dueck, Rolf Drechsler , Exact SAT-based Toffoli Network Synthesis , Department of Computer Science, , Stresa-Lago Maggiore, Italy GLSVLSI’07, March 11–13, 2007. 2. Zdzislaw Meglicki, “Introduction to Quantum Computing”, February 5, 13 ISSN 1473-804x Online, 1473-8031 Print BABAR et al.: IMPLEMENTING DIMENSIONAL VIEW OF 4X4 LOGIC GATE 3. 4. 5. 6. 7. 2002. Alexei Kitaev, William A.Webb, “Wavefunction Preparation using a Quantum Computer”, airXiv: IEEE Trans. on CAD, vol 22(6), June 2003, p. 714-726 (preliminary version in Proc. ICCAD 2002, pp.353-360). S.Younis , T.Knight, “Asymptotically Zero Energy Split-Level Charge Recovery Logic”, Workshop on Low Power Design, 1994. Vivek V. Shinde, Aditya K. Prasad, Igor L. Markov, John P. Hayes, “Reversible Logic Circuit Synthesis”, IEEE, 2002. Mark Oskin, “Quantum Computing-Lecture Notes”, Department of Computer Science and engineering, University of washington. Sheeraz Ahmed, Abdus Salaam, “4x4 Multipurpose Logic Gate/Circuit for Quantum Hardware, Realizing on the Same Outputs”, ICICT 2008, USTB, Pakistan. IJSSST Vol. 9 No. 5, December 2008 14 ISSN 1473-804x Online, 1473-8031 Print