Download DS9503 ESD Protection Diode with Resistors

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Transcript
DS9503
DS9503
ESD Protection Diode with Resistors
SPECIAL FEATURES
SYMBOL AND CONVENTIONS
• Zener characteristic with voltage snap–back to pro-
C
tect against ESD hits
IC
• High avalanche voltage, low leakage and low capacitance avoid signal attenuation
VCA
• Compatible to all 5V logic families
A
• Space saving, low inductance TSOC surface mount
package
• On–chip 5Ω resistors for isolation at both anode and
cathode terminals
• Industrial temperature range
PACKAGE OUTLINE
TSOC SURFACE MOUNT PACKAGE
3.7 X 4.0 X 1.5 mm
DESCRIPTION
This DS9503 is designed as an ESD protection device
for 1–Wire MicroLAN interfaces. In contrast to the
DS9502, the DS9503 includes two 5Ω isolation resistors on chip. Although 5Ω are negligible during communication, they represent a high impedance relative to the
conducting diode during an ESD event. Thus, the diode
absorbs the energy while the resistors further isolate
and protect the circuit at the other side of the package. If
used with circuits that already have a strong ESD–
protection at their I/O port, the ESD protection level is
raised to more that 27 kV (IEC 801–2 Reference model).
In case of abnormal ESD hits beyond its maximum ratings the DS9503 will eventually fail “short” thus preventing further damage.
During normal operation the DS9503 behaves like a
regular 7.5V Zener Diode. When the voltage exceeds
the trigger voltage, the I/V characteristic of the device
will “snapback” allowing the same or higher amount of
current to flow, but at a significantly lower voltage. As
long as a minimum current or voltage is maintained, the
device will stay in the “snapback mode”. If the voltage or
the current falls below the holding voltage or holding
current, the device will abruptly change to its normal
mode and conduct only a small leakage current.
1
6
2
5
3
4
TOP VIEW
SIDE VIEW
ORDERING INFORMATION
DS9503P
6–lead TSOC package
TYPICAL APPLICATION
VCC
iButton
PROBE
I/O
1
6
µP
DS9503
2
5
020998 1/3
DS9503
DC CHARACTERISTICS Figure 1
IC/A
0.5
I–TRIGGER
0.4
0.3
0.2
SEE DETAILED DRAWING
0.1
–1
1
2
3
4
5
6
7
8
VAV
9
10
VCA/V
V–TRIGGER
DC CHARACTERISTICS DETAIL DRAWING Figure 2
IC/A
I–HOLD
VCA/V
V–HOLD
TEST PULSE WAVEFORM Figure 3
IPP
IPP = 2.0 A
tr, tf = 0.1 µs
td = 1 µs
tr
020998 2/3
td
tf
DS9503
PHYSICAL SPECIFICATIONS
Size
Weight
See mechanical drawing
0.5 grams
ABSOLUTE MAXIMUM RATINGS*
Operating Temperature
Storage Temperature
Soldering Temperature
Continuous DC Current Through Package
–40°C to +85°C
–55°C to +125°C
260°C for 10 seconds
80 mA
* This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods of time may affect reliability.
ELECTRICAL CHARACTERISTICS
PARAMETER
Leakage Current
Avalanche Voltage
(–40°C to +85°C)
SYMBOL
MIN
IL
VAV
TYP
MAX
UNITS
NOTES
30
100
nA
2
7.8
V
1, 3
1
7.4
Trigger Voltage
VTRIGGER
9.0
9.5
V
Trigger Current
ITRIGGER
600
1000
mA
Holding Voltage
VHOLD
5.5
V
Holding Current
IHOLD
30
mA
1
Forward Voltage (–10 mA)
VF
–0.7
–0.8
V
4
Forward Current (–0.7V)
IF
–10
–100
mA
4
Maximum Peak Current
IPP
2.0
A
5
Maximum Continuous Current
Through Diode
ICC
Isolation Resistance
RI
+80
mA
Ω
5
CAPACITANCE
PARAMETER
(tA = 25°C)
UNITS
NOTES
Junction Capacitance (5V)
SYMBOL
CJ5
MIN
TYP
40
MAX
pF
1
Junction Capacitance (0V)
CJ0
70
pF
1
MAX
UNITS
NOTES
THERMAL RESISTANCE
PARAMETER
SYMBOL
MIN
TYP
Junction To Package
RΘJC
75
K/W
Junction To Ambient
RΘJA
200
K/W
NOTES:
1.
2.
3.
4.
5.
All voltages are referenced from Cathode to Anode.
At 7.0V.
At 0.3 µA.
Typical values at room temperature.
See pulse specification.
020998 3/3