Download Homework 4 Solutions Problem 1 1) Circuit schematic is shown as

Homework 4 Solutions
Problem 1
1) Circuit schematic is shown as the problem.
W/L = 20um/0.35um, n = 4
Size W/L to set the overdrive voltage of M1-M4 and M6 to roughly
100mV. Set n as 3, since the threshold voltage is 490mV, the Vgs of
M1-M4 and M6 should be around 590mV. DC simulation result is
shown below.
In order to make sure that transistor M1-M4 and M6 have the
overdrive voltage of approximately 0.1V, the width of transistor has
been selected as 20um.
2) Sweep n and determine what (integer) value of n works best.
The plot of X, Y, Z is shown below.
The plot of M1 overdrive voltage is shown below.
n = 4 is a good choice for the circuit. Firstly, increasing n, the voltage
of node X, Y and Z will increase, making the transistors more
saturated. Then, n = 4 makes the overdrive voltage of M1 closer to
0.1V. If n is larger than 4, the voltage of node X will be high, reducing
the output voltage headroom. (Note that, it is also reasonable to
choose n = 3.)
3) Perform .op analysis, the small-signal parameters of M1 and M2
are shown below.
Small-signal parameters of M1
gds = 83.02u
gm = 1.168m
region = 2
vds = 200m
vgs = 593.6m
vth = 490.3m
Small-signal parameters of M2
gds = 21.93u
gm = 1.255m
region = 2
vds = 800m
vgs = 578.2m
vth = 490.1m
Small-signal parameters of M3
gds = 90.42u
gm = 1.157m
region = 2
vds = 192.6m
vgs = 593.6m
vth = 490.3m
Small-signal parameters of M4
gds = 30.18u
gm = 1.225m
region = 2
vds = 401m
vgs = 585.6m
vth = 490.2m
Small-signal parameters of M5
gds = 238.7u
gm = 458.9u
region = 1
vds = 196.5m
vgs = 778.2m
vth = 490m
Small-signal parameters of M6
gds = 24.45u
gm = 1.24m
region = 2
vds = 581.7m
vgs = 581.7m
vth = 490.2m
4) Calculate the Ro of M1 and M2 branch
Ro  ro1  ro 2  gm 2 ro1ro 2
where gds1 = 83.02u, gds2 = 90.42u, gm2 = 1.157m.
Therefore, Ro = 746.3kΩ.
5) To test the output resistance Ro, the AC input signal with 1V
magnitude is injected into the output of current mirror, and the current
flowing out of the AC voltage source is shown below.
So, the output impedance is, Ro = 1/1.339u = 746.3kΩ, which is the
same as the hand calculation, and both of them are close to gmro2.
6) Plot of Io vs. Vo
Plot of Ro vs. Vo
For region 1, the output voltage is between 0 and Vov, M1 and M2
both work at the linear region, the output impedance is very low, and
the output current is small. Here, the upper voltage limit for region 1 is
approximately 0.18V.
For region 2, the output voltage is between Vov to 2Vov, M1 goes into
the saturation region, and M2 still works in the linear region. The
voltage range for region 2 is from 0.18V to 0.36V.
For region 3, the output voltage is larger than 2Vov, M1 and M2 both
are in the saturation region, the output current and output resistance
increase quickly. Here, the lower voltage limit for region 3 is 0.36V.
Note that, Vov could change with varying the output voltage Vo.
7) Sweep the value of IB from 50uA to 200uA in 10uA step increment.
Plot of the voltage of nodes X, Y and Z and the overdrive voltage of
M1 is shown below.
Based on the simulation results, the biasing condition of high-swing
cascode structure could almost linearly track the master current
variation.
8) Connect the bulk of transistors M2, M4 and M6 to ground, the plot
of the voltage of node X, Y, Z is shown below.
Compared with the simulation results in 7), it could be found that the
body effect does not have the effects of the high-swing cascode
current mirror.
Problem 2
1. “Fractional” band-gap reference (BGR) circuit is shown below.
1) Derive a closed-form expression for the BGR output, VOUT. The
voltage across R1 is,
VR1  VBE1  VBE 2  VT ln n
Where n = 8. So, the current flowing through R1 is,
I1  I 2  I R1 
VR1 VT ln n

R1
R1
The current flowing through R2 is,
IR2 
VBE1
R2
Since M1, M2 and M3 have the same aspect ratio, the current flowing
through M3 should be,
I out  I R1  I R 2 
Then, output voltage is,
VT ln n VT ln n

R1
R2
 V ln n VBE1 
Vout  I out R3  R3  T


R
R2 
1

2) Determine the ratios of R3/R1 and R2/R1 to produce a 0.5V
temperature independent VOUT.
Output voltage is,
Vout 

R3  R2
V
ln
n

V

T
BE1 
R2  R1

Where n = 8, VBE1 = 0.7V, VT = 25mV.
The factor M is,
M
R2
ln n  23.5
R1
So,
R2
 11.30
R1
Besides,
Vout 

R3  R2
 VT ln n  VBE1   0.5
R2  R1

R3
 0.388
R2
So,
R3 R3 R2
 
 4.38
R1 R2 R1
3) Consider the finite r0 effect of M1, M2 and M3. Suppose the R1 =
1kΩ and ro = 0.1MΩ, determine the numerical value of VOUT.
The current flowing through M1, M2 and M3 is,
I D1  I D 2  I D3  I R1  I R 2 
VT ln n VBE1

R1
R2
Where R1 = 1kΩ, R2 = 11.3 kΩ, n = 8.
So,
I D1  I D 2  I D3 
VT ln n VBE1

 0.114mA
R1
R2
Considering the channel-length modulation, for a single MOS
transistor,
ro 

1
ID
1
 0.088
ro I D
For M1, M2 and M3, the current determined by VGS should be the
same. Assume that,
I D ,VGS 
1
 p cox  VGS  VTH
2

2
Therefore, for M1,
I D1  I D,VGS 1   VDS   0.114mA
Where |VDS|=1.8V.
Then,
I D,VGS  0.098mA
For M3,
I D ,VGS [1   (VDD  VOUT )] 
VOUT
R3
Where R3 = 4.38kΩ.
Therefore, considering the finite ro effect, output voltage is,
VOUT  0.505V
4) Explain intuitively how the two feedback loops formed by the opamp and the left and right arms of the VT-reference circuit can be
stable.
Based on the schematic show above, the loop from node X to node Y
is the positive feedback for the op-amp, and the loop from node X to
node Z is the negative feedback for the op-amp.
For the positive feedback, the magnitude of gain is,
| AV , pos | g m,M 1 (R 2 ||
1
g m,Q1
)
Where, gm,M1 is the transconductance of M1, gm,Q1 is the
transconductance of Q1.
For the negative feedback, the magnitude of gain is,
| AV ,neg | g m,M 2 (R 2 || (
1
g m,Q1
 R1 ))
Where gm,M1=gm,M2, gm,Q1=gm,Q2.
Therefore, the negative feedback gain is larger than the positive
feedback, which could make sure that the system could be stable. In
this analysis, R1 is critical.
2. Brokaw band-gap reference circuit is shown below.
1) Derive a closed-form expression for the BGR output, VOUT.
The voltage across R1 is,
VR1  VBE1  VBE 2  VT ln N
Where N = 16.
So, the current flowing through R1 is,
I1  I 2  I R1 
VR1 VT ln N

R1
R1
The current flowing through R2 is,
I R 2  2 I R1 
2VT lnN
R1
Then, output voltage is,
Vout  I R 2 R2  VBE1  VBE1 
2 R2 ln N
VT
R1
If M = 23.5, then,
M
2 R2 ln N
 23.5
R1
Therefore,
R2
 4.24
R1
2) Still ignore ∆R but include VOS, re-derive the expression for Vout.
Considering the input offset voltage VOS of op-amp, the current
flowing through Q2 is,
I1 
VDD  VX VR1

R
R1
And the current flowing through Q1 is,
I2 
VDD  VX  VOS
V
 I1  OS
R
R
Then, the voltage across R1 is,
VR1  VBE1  VBE 2  VT ln( N
V  VX  VOS
I2
)  VT ln( N DD
)
I1
VDD  VX
Therefore, the output voltage is,
Vout  VBE1  R2  I1  I 2   VBE1 
V  VX  VOS
2 R2
R
VT ln( N DD
)  2 VOS
R1
VDD  VX
R
 V  VX  VOS 
VBE1  VT ln  DD

RI S 2


Where, IS2 is the saturation current for bipolar transistor Q1.
Then,
 1  2 R2 / R1
Vout
 VT 
VOS
 VDD  VX  VOS
 R2

 R
In order to minimize the dependence of VOUT on VOS, the ratio of R2/R
should be minimized, and the ratio of R2/R1 is determined by the M
factor to achieve the temperature-independent output voltage.
Besides, the voltage VX should be reduced.
3) Include both ∆R and VOS, re-derive the expression for VOUT.
Considering the input offset voltage VOS of op-amp and ∆R, the
current flowing through Q2 is,
I1 
VDD  VX VR1

R
R1
And the current flowing through Q1 is, (assume that ∆R/R<<1)
I2 
VDD  VX  VOS I1R  VOS
V

 I1  OS
R  R
R  R
R  R
Then, the voltage across R1 is,
 I 
 V  VX  VOS
R 
VR1  VBE1  VBE 2  VT ln  N 2   VT ln  N DD

VDD  VX
R  R 
 I1 

Therefore, the output voltage is, (assume that ∆R/R<<1)
Vout  VBE1  R2 ( I1  I 2 )
 VBE1 
V  VX  VOS
2 R2
R2
R
VT ln( N DD
)
VOS
R1
VDD  VX
R  R R  R
 VBE1 
V  VX  VOS
2 R2
R2
VT ln( N DD
)
VOS
R1
VDD  VX
R  R
VBE1  VT ln(
VDD  VX  VOS 1
)
R  R
IS 2
Where, Is2 is the saturation current for bipolar transistor Q1.
4) Explain intuitively how the two feedback loops formed by the opamp and the left and right arms of the VT-reference circuit can be
stable.
The loop form node X to node Y is the positive feedback for the opamp, and the loop from node X to node Z is the negative feedback.
Ignore the early effect, and assume that β>>1, for the positive
feedback, the magnitude of the gain is,
| AV , pos |
g m,Q 2 R
1  g m,Q 2 (R1  R2 )
For the negative feedback, the magnitude of the gain is,
| AV ,neg |
g m,Q1 R
1  g m,Q1 R2
Assume that, the current flowing through Q1 and Q2 is the same,
then gm,Q1 = gm,Q2, therefore, the magnitude of negative feedback gain
is larger than that of positive feedback gain, and the system is stable.
R1 is critical to make sure that the system is stable, since it could
reduce the positive feedback gain with emitter degeneration.