Download 1. (10%) A PMOS transistor has Vs = 1.5 V , Vd = .9 V. Vg = .2 V

Solution: Homwework Assignment 3
EE477 Spring 2013
Prof. Parker
1. (10%) A PMOS transistor has Vs = 1.5 V , Vd = .9 V. Vg = .2 V. What region of operation
is it in?
Solution:
Since the source is at a lower potential than Vdd, there is body effect.
First, we verify if the PMOS transistor is ON using the following condition:
≤ = .2 − 1.5 = −1.3
= −.9
−1.3 ≤ −.9 True
The above condition is true, so the transistor is ON.
Let’s assume the transistor is in linear region,
> − = .9 − 1.5 = −.6
−.6 > −1.3 − (−.9)
−.6 > −.4 False
The original assumption is not true, thus the transistor is in saturation region.
2. (10 %) An NMOS transistor has Vgd = .9 V. Vs = .3 V. Is the transistor in the linear region
of operation when Vg =1.2 V?
Solution:
= 1.2 − .3 = .9
= − = − .3
= ( − .9) − .3 = (1.2 − .9) − .3 = 0
Since the source is at a higher potential than 0 V, there is body effect.
First, we verify if the transistor is ON using the following condition:
≥ . 9 ≥ .9 True
The above condition is true, so the NMOS transistor is ON.
Let’s assume the NMOS transistor is in linear region,
< − 0 < .9 − .9
0V<0V
The NMOS transistor is in the border between saturation and linear region. However, the current
that flows through the transistor is a subthreshold current since = .9.
3. a) (5 %) A PMOS transistor is used as a pass transistor. The input voltage is Vin = .8 V. The
gate voltage Vg=.3 V. The voltage Vout = 1.8 V at time t = 0. What is the final output voltage at
t = infinity?
Solution:
First we need to identify the “source” and “drain” terminals. Since initially the highest potential
is Vout, the “source” is at the output terminal.
To determine the minimum possible voltage at the output in steady state (t=infinity) we use the
following condition:
≤ = −.9
Note: We need to consider body effect because the analysis is done at t=infinity where the source
terminal is no more equal to Vdd.
= − − ≤ ≥ + |
|
So, the minimum voltage at the source terminal is + |
| = .3 + .9
" = = 1.2
In other words, the transistor initially at t=0 has a voltage at the source terminal of 1.8 V, the
voltage at the source terminal is discharging until it reaches 1.2 V, that is when the transistor
enters into “cut off” condition.
b) (3%) Does the PMOS transistor have body effect when t approaches infinity?
Solution:
Yes, it has body effect because the source terminal is 1.2 V which is lower than the substrate
voltage of Vdd. So, there is a body source voltage difference.
4. a) (7 %) Identify the sources and drains in a transmission gate at t=0+ when Vin = 1.3 V
and Vout = .2 V. Vgn = 1.2 V, and Vgp = .4 V.
Solution:
Vgp=.4 V
t=0+ Vin=1.3 V
s
d
d
s
t=0+ Vout=.2 V
Vgn=1.2 V
b) (10 %) What regions are the two transistors in when t approaches infinity? Be sure to justify
your answers.
Solution:
PMOS transistor analysis: First, we verify if the PMOS transistor is ON using the following
condition:
≤ = .4 − 1.3 = −.9
= −.9
−.9 ≤ −.9 True
The above condition is true, so the transistor is ON.
Let’s assume the transistor is in linear region,
> − At t=infinity the output of the transmission gate is 1.3V. So, = 0
0 > −.9 − (−.9)
0 > 0
The PMOS transistor is in the border between saturation and linear region.
The NMOS transistor at t=infinity is in “Cut-Off” region, since
< 5. (10%) Compute the drain current flow IDS in a PMOS transistor when Vd = .9 V, Vs = 2 V,
and Vg = .5 V. Assume the transistor width is 16 lambda and the length is 2 lambda.
Solution:
First, we verify if the PMOS transistor is ON using the following condition:
≤ = .5 − 2 = −1.5
= −.7
−1.5 ≤ −.7 True
The above condition is true, so the transistor is ON.
Let’s assume the transistor is in linear region,
(. 9 − 2) > (. 5 − 2) − (−.7)
−1.1 V> −1.5 + .7
−1.1 > −.8 False
The above condition is false, so our assumption is wrong which implies that the transistor is in
saturation region.
% = − 1&2 ' ( − )
% = − 1&2 (51) +
*
16
*
, (−1.5 − (−.7)) -.
2
16
% = − 1&2 (51) + , (−1.5 + .7)* -.
2
% = −130.56-.
6. (5%) What is the effective channel resistance of a unit size NMOS transistor?
Solution:
/=
2
219.4 ∗ 4( − ) × 1023
7. (10%) What happens to threshold voltage if transistor source and body are not at the same
voltage?
Solution:
In an NMOS transistor if the source terminal is at a higher potential compared with the body, the
transistor has body-effect and the threshold increases. If the source terminal is at a lower
potential compared with the body, then the transistor does not have body effect and the threshold
does not change.
In a PMOS transistor if the source terminal is at a lower potential compared with the body, the
transistor has body-effect and the threshold increases. If the source terminal is at a higher
potential compared with the body, the transistor does not have body effect and the threshold does
not change.
8. (5%) Indicate one advantage and one disadvantage of using polysilicon for the gate of
transistors.
Solution:
Advantage: It is tolerant to high temperatures (900-1000 °C).
Disadvantage: The conductivity is low, so it is not ideal for charging and discharging the gate
capacitance.
9. (5%) How can we prevent latchup to occur?
Solution:
a) build a guard ring around the transistors
nmos transistor build a p+ ring and tie it to gnd
pmos transistor build an n+ ring and tie it to vdd
b) dig trench into substrate fill with SiO2
c) detect current surge and powers down
d) change technology Si on Insulator (SOS), finfet
10. (10%) Why do we use thin oxide under the gate region, while outside the active area thick
oxide is used?
Solution:
We use thin oxide under the gate region because it increases the channel conductivity, so it makes less
difficult to turn on the transistor. It also helps to decrease subthreshold leakage.
We use thick oxide outside of the active area to prevent the formation of parasitic MOS transistors.
11. (10%) What can we do to avoid mask misalignment problems?
Solution:
To avoid mask misalignment problems we have design rules which provide minimum spacing
requirements and minimum width requirements