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Kevin Brennan EE 310 Section 6 Formal Lab 3&4 Designing a Power Supply Lab Introduction: In the power supply we will have 120 Vrms with a margin of 5% as our input with a frequency of 60 Hz and we will have to design a power supply with a DC output voltage VO =VL of -15 + 0.5 V and -15 – 0.5 V. The Regulator should have an input of VC = -24 V. The Ripple voltage Vr is going to be at max = 15% of VC and the load Resistor RL should dissipate 1 W of power. The design I have to do in this lab is “D” Requirement Design A Design B Design C Design D DC output voltage, VO = VL Nominal DC voltage at regulator input, VC +5 ± 0.5 V -5 ± 0.5 V +15 ± 0.5 V -15 ± 0.5 V +12 V -12 V +24 V -24 V Ripple voltage at regulator input, Vr Maximum 15% of VC with rated load resistance attached Rated load resistance, RL Choose RL to dissipate approximately 1 watt AC Input Voltage, Frequency 120 V RMS ± 5%, 60 Hz Circuit Design and Reasoning: i. Schematics of the unregulated power supply:- Figure1. Power transformers simple diagram Kevin Brennan EE 310 Section 6 Formal Lab 3&4 Measured Voltages across nodes: V(AB) = 10 V V(BC) = 10 V V(AC) = 20.5 V We used the DMM to calculate the node voltages. Reasoning for that type of rectifier: This is circuit design D was assigned to our group. We used a full bridge rectifier because we need a -24 V as output where a center tapped can’t get above 10 V. This is the reason for the full 2 diodes to get the desired voltage. In addition, we found the measurement to be Vs = 20.5 V. We were supposed to get negative voltage so we flipped the diodes to get the desired voltage and the capacitor was ceramic without polarity. We used IN4004 Diodes in our circuit. From the data we gathered it’s more preferable to use an IC chip Regulator because it gave us a lower ripple voltage than the zener diode the output was almost constant. i. Schematics of the voltage regulator:- Kevin Brennan EE 310 Section 6 Formal Lab 3&4 Figure2. Zener Diode Shunt Regulator We used the Zener Diode in this circuit to get the desired voltage to be almost constant while operating in the breakdown voltage. We used one 8.2 V and one 6.8 V to get the desired voltage of 15 V as our output. Figure4. 3 pin IC regulator In this figure 4, the IC regulator chip is used to design the voltage regulator by using 3 pin MC7915 chip and two filtering capacitors. Supporting Analysis: Kevin Brennan EE 310 Section 6 Formal Lab 3&4 i. Model Transformer Figure that is shown in the previous page is exactly same as figure 1. Measured Voltages across nodes: V(AB) = 10 V V(BC) = 10 V V(AC) = 20.5 V PIV for rectifier & choose diode:- PIV = 2(Vs) – Vd = 2(20.5) – 1 = 40 V Resistor and filter capacitor:Resistor Because of limited resources in the lab and stock room, we were told to use a 620ohm, 5-Watt resistor Capacitor Vm= -27.6 V Vr= (15% of Vc) Vr = 0.15 * -24 = -3.6V Kevin Brennan EE 310 Section 6 Formal Lab 3&4 𝐶= ii. 𝑉𝑚 2𝑓𝑉𝑟 𝑅𝐿 C = 103 µF Maximum diode current:- 𝑖𝐷𝑚𝑎𝑥 = 𝑉𝑚 𝑅𝐿 𝑉 (1 + 2𝜋√2𝑉𝑚 ) 𝑖𝐷𝑚𝑎𝑥 = 𝑟 −27.6 620 (1 + 2𝜋√ −27.6 2(−3.6) ) 𝑖𝐷𝑚𝑎𝑥 = −0.592 A = -592 mA iii. Multisim Simulation of diode current:- iv. Regulators parameters: IZmin, IZmax, Ri, RL:We can find IZmax when there is no load resistance connected to the circuit. In addition, we can find IZmin which 30% of IZmax and can be found when load resistance is connected. 𝑖𝑍𝑚𝑎𝑥 = 𝑃𝑍 𝑉𝑍 𝑖𝑍𝑚𝑎𝑥 = 0.5𝑊 8.2𝑉 𝑖𝑍𝑚𝑎𝑥 = 60.9 𝑚𝐴 𝑖𝑍𝑚𝑖𝑛 = 30% ∗ 𝑖𝑍𝑚𝑎𝑥 𝑖𝑍𝑚𝑖𝑛 = 18.27𝑚𝐴 𝑅𝑖 = | 𝑅𝐿 = 𝑉𝐶 − 𝑉𝑍 𝑖𝑍𝑚𝑎𝑥 | 𝑅𝑖 = | 𝑉𝑍 𝑖𝑍𝑚𝑎𝑥 − 𝑖𝑍𝑚𝑖𝑛 −25.9𝑉 −(−8.2)𝑉 −60.9𝑚𝐴 𝑅𝐿 = −8.2 𝑉 −42.63𝑚𝐴 | 𝑅𝑖 = 290.6 Ω 𝑅𝐿 = 192 Ω Kevin Brennan EE 310 Section 6 Formal Lab 3&4 I. Data:- i. Transformer open circuit voltages and Rw:- 4.601 Ω Measured Voltages across nodes: V(AB) = 10 V V(BC) = 10 V V(AC) = 20.5 V Winding resistance 𝑉𝑜 = 𝑉𝐼 ∗ ii. 𝑅𝑡𝑒𝑠𝑡 𝑅𝑡𝑒𝑠𝑡 +2𝑅𝑤 2𝑅𝑤 = 𝑉𝐼𝑅𝑡𝑒𝑠𝑡 𝑉𝑜 − 𝑅𝑡𝑒𝑠𝑡 𝑅𝑤 = 4.601Ω Plot Rectifier input & output:*All the plots are attached at the end of this report. iii. Calculate & compare regulations with IC voltage reg: Zener Diode Shunt Regulator VL(w/o load) = 15.1V VL(w/ load) = 10.85V % Regulation = 𝑉𝐿 (𝑁𝑜 𝑙𝑜𝑎𝑑)−𝑉𝐿 (𝐹𝑢𝑙𝑙 𝑙𝑜𝑎𝑑) 𝑉𝐿 IC Voltage Regulator VL(w/o load) = -15V VL(w/ load) = -15V ∗ 100% % Regulation =28% Kevin Brennan EE 310 Section 6 Formal Lab 3&4 % Regulation = 𝑉𝐿 (𝑁𝑜 𝑙𝑜𝑎𝑑)−𝑉𝐿 (𝐹𝑢𝑙𝑙 𝑙𝑜𝑎𝑑) 𝑉𝐿 ∗ 100% % Regulation = 0 % We concluded that IC regulator gave us perfect regulation without ripple. I would use the IC chip Regulator instead of the Zener because the ripples can’t be seen also the % Regulation is 0 which is even better than the Zener to regulate the Voltage. iv. Power dissipations & margins:For the diode * Vγ = 0.7 V *𝑖𝐷𝑚𝑎𝑥 (𝐴𝑐𝑡𝑢𝑎𝑙) = 750𝑚𝐴 For each diode P = IV = (0.7V)(750mA) = 0.525 W For the Winding resistance PRW = I2Rw PRW = ( 20.5 2 ) (4.6Ω) =5.03mW 620 For the resistance test PR\test = V2 / Rtest PR\test = (20.5)2 620 = 1.09 W For zener regulator 𝑃𝑅𝑖 = 𝑃𝑅𝐿 = (𝑉𝐶 − 𝑉𝑍 )2 𝑅𝑖 (𝑉𝑧 )2 𝐼𝐿 𝑃𝑅𝑖 = 𝑃𝑅𝐿 = (−25.9−(−8.2))2 290.6 Ω (14.7)2 𝑉 620Ω 𝑃𝑅𝑖 = 1.08𝑊 𝑃𝑅𝐿 = 0.349𝑊 𝑃𝑧,𝑛𝑜 𝑙𝑜𝑎𝑑 = 𝑖𝑧𝑚𝑎𝑥 ∗ 𝑉𝑍 𝑃𝑧,𝑛𝑜 𝑙𝑜𝑎𝑑 = (0.03𝐴)2 (8.2V) = 7.38mW 𝑃𝑧,𝑤𝑖𝑡ℎ 𝑙𝑜𝑎𝑑 = 𝑖𝑧𝑚𝑖𝑛 ∗ 𝑉𝑍 𝑃𝑧,𝑤𝑖𝑡ℎ 𝑙𝑜𝑎𝑑 = (0.01𝐴)2 (8.2V) = .82mW Kevin Brennan EE 310 Section 6 Formal Lab 3&4 For IC regulator We used capacitor in the the circuit to shift the phase and to attain the noise. 𝑃𝑅𝐿 = II. (𝑉𝐿 )2 𝑃𝑅𝐿 = 𝑅𝐿 152 𝑉 620Ω 𝑃𝑅𝐿 = 0.363𝑊 i. Discussion:Power Considerations:In the designing process we did our calculation for 1 watt power dissipation but in actual we used a 5 watt power dissipation values for safety reasons. Due to rounding and using different values than the nominal values we got almost the desired power. ii. Error Calculations and reasons:The calculation errors are due to rounding and using different values from the nominal values. Also we used resistor values for what we had in the stock room. We did have some trouble with a few of our values, but this could be due to a number of things. These could include human error, incorrect resistor values, or a number of alternative deficiencies. %Error = | 𝐶𝑎𝑙𝑐𝑢𝑙𝑎𝑡𝑒𝑑 𝑣𝑎𝑙𝑢𝑒− 𝑁𝑜𝑚𝑖𝑛𝑎𝑙 𝑣𝑎𝑙𝑢𝑒 𝑁𝑜𝑚𝑖𝑛𝑎𝑙 𝑉𝑎𝑙𝑢𝑒 |*100% Kevin Brennan EE 310 Section 6 Formal Lab 3&4 iii. Comparison of outputs:- With Load Requirement Without Load Design D Zener IC Zener IC DC output voltage, VO = VL -15 ± 0.5 V -15.1V -15V -10.85V -15V Nominal DC voltage at regulator input, VC -24 V -25.9V -25.9V -25.9V -25.9V III. Summary and Conclusion:- Our design was calling for a -24 V of output while keeping the output constant regardless of sudden changes. We used a transformer to supply the power and then used the rectifier to filter out the desired range of output whether positive or negative. Our design needed the full bridge rectifier in order to attain the -24 V. Following we needed the voltage to be steady so we used a capacitor filter to get the voltage to charge when there is voltage as input and discharge when the voltage input cut’s out. Also we needed a voltage regulator and the best regulator was the IC chip which has the same output regardless of R(load). In conclusion, we need all these elements in order to get a power supply with almost constant output of DC voltage. Kevin Brennan EE 310 Section 6 Formal Lab 3&4 Kevin Brennan EE 310 Section 6 Formal Lab 3&4 Kevin Brennan EE 310 Section 6 Formal Lab 3&4 Kevin Brennan EE 310 Section 6 Formal Lab 3&4 Kevin Brennan EE 310 Section 6 Formal Lab 3&4 Kevin Brennan EE 310 Section 6 Formal Lab 3&4