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ES 330 Electronics II Homework # 2
(Fall 2016 – Due Wednesday, September 7, 2016)
Problem 1 (15 points)
You are given an NMOS amplifier with drain load resistor RD = 20 k. The DC voltage
(VRD) appearing across resistor RD = 1.5 volts with an applied gate-to-source voltage
(VGS) of 0.7 volt. Small-signal AC measurements ) give a voltage gain Av = -10 V/V.
(a) Find the threshold voltage Vt of the N-channel MOSFET.
(b) The process transconductance parameter k’n = 200 A/ V2; what is the MOSFET’s
gate width-to-length ratio (in symbols, W/L)?
Problem 2 (20 points)
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Suppose you are given the common-emitter bipolar amplifier as shown schematically
below. (Note: This is Figure 7.6 (on page 377) of Sedra and Smith, 7th edition)
The power supply voltage VCC = +5 volts and the load resistor RC = 1 k. For the range
of collector bias currents, IC = 0.5 mA, 1 mA, 2.5 mA, 4 mA and 4.5 mA, determine the
corresponding collector-to-emitter voltages VCE and voltage gains Av for each of the
collector currents. Place answers in the table below.
IC (mA)
0.5 mA
1 mA
2.5 mA
4 mA
4.5 mA
VCE (volts)
Av (V/V)
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The “essence of transistor operation” is that for change in vbe, represent it by vbe,
results in a change in collector current ic, represented by ic . The “small-signal
approximation” means keeping vbe small enough to allow ic to be linearly related to
vbe by the relationship, ic = gmvbe . The parameter gm is the transconductance of
the transistor. When passing ic through resistor RC, a chanage in output voltage vo
is generated.
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Problem 3 Bipolar Transistor Operation (10 points)
(a) Using the expression,
Av = - [IC/VT]RC ,
where VT is the thermal voltage kT/q = 0.026 volt (not MOSFET threshold voltage),
derive a simple expression for transconductance gm.
(b) Calculate the value of gm when IC = 0.5 mA.
Problem 4 Using Grahical Analysis (20 points)
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In this problem you are to construct a graphical drawing of the iC – vCE characteristic of
the BJT, with base current values of iB = 10 A, 20 A, 30 A, 40 A and 50 A, to
estimate amplifier parameters . To simplify the problem we ignore the Early effect ;
meaning the output resistance is infinite (i.e., horizontal lines on the iC – vCE
characteristic) and take the BJT’s current gain  = 100 at all current levels. Given: VCC
= +5 volts and RC = 1 k; these two parameters allow you to construct and draw the
load line upon the BJT’s iC – vCE characteristic curve.
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You are presented with the NPN bipolar transistor circuit shown below:
(a) Draw the collector current lines on the graph and then draw the load line
established by the collector load resistor RC.
(b) Estimate the peak-to-peak collector voltage swing resulting from driving the base
current iB over the range of 10 A (minimum) to 40 A (maximum). Use the drawing
above to estimate this peak-to-peak voltage swing.
(c) Assuming the BJT biased at VCE = ½VCC, find the values of IC and IB at this Q-point
(i.e., Q is the quiesent point).
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(d) Assuming the currrent value at bias point Q from part (c), given that VBE = 0.700 volt
and RB = 100 k, find the required value of power supply VBB.
Problem 5 Transconductance of NMOS Transistor (15 points)
We have an NMOS transistor with kn = 10 mA/V2. The overvoltage VOV parameter is
set at VOV = 0.2 volt so that the transistor is in its saturated mode of operation.
(a) What is the DC bias drain current ID?
(b) Next, we superimpose a small voltage upon the DC bias gate voltage, VGS, with
amplitude vgs = + 0.02 volt. Find the corresponding incremental collector current iD by
evaluating the total collector current iD and then subtracting the DC bias current ID.
(c) Repeat the calculation from part (b) but now with vgs = - 0.02 volt.
(d) Use the results from parts (b) and (c) to estimate the value of the transconductance
gm of the transistor.
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(e) Calculate the transconductance using Equation (7.33) in Sedra and Smith (from
page 384). [Note: Equation (7.33) reads gm = kn VOV .] Compare this result with what
you obtained in part (d) above. [In other words, how well do they agree?]
Problem 6 Using the T-equivalent Model (20 points)
For the NMOS transitor embedded within the schematic circuit, you are to use the Tequivalent model (but assume that  = 0 which means that the output resistance is
infinite and can be ignored) to derive equations for its small-signal voltage gain
behavior.
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(a) Draw the circuit with the T-equivalent model substituted for the MOSFET symbol
and in the format to be used for performing a small-signal analysis. Label all elements.
Problem 6 continued. . . .
(b) Derive a voltage gain expression for vs /vi .
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(c) Derive a voltage gain expression for vd /vi .