Agilent 81200 Measuring Jitter with the Agilent E4874A
... Prerequisites and limitations The usual measurement setup assumes that the 81200 will stimulate the DUT, from which the output jitter is determined. ...
... Prerequisites and limitations The usual measurement setup assumes that the 81200 will stimulate the DUT, from which the output jitter is determined. ...
TLV1549 数据资料 dataSheet 下载
... Figure 1. Simplified Model of the Successive-Approximation System chip-select operation The trailing edge of CS starts all modes of operation, and CS can abort a conversion sequence in any mode. A high-to-low transition on CS within the specified time during an ongoing cycle aborts the cycle, and th ...
... Figure 1. Simplified Model of the Successive-Approximation System chip-select operation The trailing edge of CS starts all modes of operation, and CS can abort a conversion sequence in any mode. A high-to-low transition on CS within the specified time during an ongoing cycle aborts the cycle, and th ...
A 93% efficiency reconfigurable switched-capacitor DC-
... High density deep trench capacitors with low bottom plate parasitic capacitance have been utilized in [5] achieving a peak efficiency of 90%. In this work, we exploit on-chip ferroelectric capacitors (Fe-Caps) for charge transfer owing to their high density and extremely low bottom plate parasitic c ...
... High density deep trench capacitors with low bottom plate parasitic capacitance have been utilized in [5] achieving a peak efficiency of 90%. In this work, we exploit on-chip ferroelectric capacitors (Fe-Caps) for charge transfer owing to their high density and extremely low bottom plate parasitic c ...
IOSR Journal of VLSI and Signal Processing (IOSR-JVSP)
... Typical Digital controlled oscillator with enable input is shown in fig 5. The enable circuit provides a way to control the operation of the ring oscillator. When the user provides logic one on the enable pin, the ring oscillator operates and generates sustained oscillations. When the enable circuit ...
... Typical Digital controlled oscillator with enable input is shown in fig 5. The enable circuit provides a way to control the operation of the ring oscillator. When the user provides logic one on the enable pin, the ring oscillator operates and generates sustained oscillations. When the enable circuit ...
Electrical parameters of microcontrollers 8051 family
... clock generator – Very wide frequency range available (even above 100MHz) – No possiblity of frequency regulation – High to Ultra high stability (0.000001 - 10 ppm)!!! ...
... clock generator – Very wide frequency range available (even above 100MHz) – No possiblity of frequency regulation – High to Ultra high stability (0.000001 - 10 ppm)!!! ...
he low-frequency oscilloscope goes plug in ignal generation and
... gated, triggered, and gated trigger, plus manually gated or triggered operation is readily accomplished from the front panel. In addition, the 26G1 can be internally triggered by the rate generator which is an integral part of the unit . The trigger and gate levels, both input and output, are compat ...
... gated, triggered, and gated trigger, plus manually gated or triggered operation is readily accomplished from the front panel. In addition, the 26G1 can be internally triggered by the rate generator which is an integral part of the unit . The trigger and gate levels, both input and output, are compat ...
00924853 - Department of Electronics
... For an -stage ring oscillator in a stable oscillation mode, there exists a fixed phase relation between stages. Each stage for a total , where contributes a phase delay of is an odd integer with value smaller than . It represents a possible mode of oscillation. Another phase inversion required aroun ...
... For an -stage ring oscillator in a stable oscillation mode, there exists a fixed phase relation between stages. Each stage for a total , where contributes a phase delay of is an odd integer with value smaller than . It represents a possible mode of oscillation. Another phase inversion required aroun ...
Sampling Theory and Analog-to-Digital Conversion Basic
... • Sampling at the Nyquist frequency ensures that frequency content of signal is preserved • In practice, sampling at 4-5 times the highest frequency present in the signal ensures that signal amplitude characteristics are preserved as well • When possible, an “anti-aliasing” filter should be used to ...
... • Sampling at the Nyquist frequency ensures that frequency content of signal is preserved • In practice, sampling at 4-5 times the highest frequency present in the signal ensures that signal amplitude characteristics are preserved as well • When possible, an “anti-aliasing” filter should be used to ...
23.1 0.45-V Input On-Chip Gate Boosted (OGB) Buck Converter in
... A 0.45-V input, 0.4-V output on-chip gate boosted (OGB) buck converter with clock gated digital PWM controller in 40-nm CMOS achieved the highest efficiency to date with the output power less than 40μW. A linear delay trimming by a logarithmic stress voltage (LSV) scheme to compensate for the die-to ...
... A 0.45-V input, 0.4-V output on-chip gate boosted (OGB) buck converter with clock gated digital PWM controller in 40-nm CMOS achieved the highest efficiency to date with the output power less than 40μW. A linear delay trimming by a logarithmic stress voltage (LSV) scheme to compensate for the die-to ...
DS1110L 3V 10-Tap Silicon Delay Line General Description Features
... Initial tolerances are ± with respect to the nominal value at +25°C and VCC = 3.3V for both leading and trailing edges. Temperature and voltage tolerances are with respect to the nominal delay value over stated temperature range and a 2.7V to 3.6V range. Intermediate delay values are available on a ...
... Initial tolerances are ± with respect to the nominal value at +25°C and VCC = 3.3V for both leading and trailing edges. Temperature and voltage tolerances are with respect to the nominal delay value over stated temperature range and a 2.7V to 3.6V range. Intermediate delay values are available on a ...
NCN5192NGEVB NCN5192NG Evaluation Board User's Manual •
... This reference is used by receiver or demodulator (RX) comparator, carrier detect (CD), and voltage supervisor. The AREF reference voltage sets the trip point of the demodulation operational amplifier of the NCP5192. The AREF reference voltage is also used in setting the DC operating point of the re ...
... This reference is used by receiver or demodulator (RX) comparator, carrier detect (CD), and voltage supervisor. The AREF reference voltage sets the trip point of the demodulation operational amplifier of the NCP5192. The AREF reference voltage is also used in setting the DC operating point of the re ...
Paper Title (use style: paper title)
... three states is widely used because of its wide linear range and ability to capture phase and frequency [1]. The reference signal and the feedback signal are given to the two input clock of the D flip-flop. The UP signal is created if the reference signal is faster than the feedback signal and DOWN ...
... three states is widely used because of its wide linear range and ability to capture phase and frequency [1]. The reference signal and the feedback signal are given to the two input clock of the D flip-flop. The UP signal is created if the reference signal is faster than the feedback signal and DOWN ...
Time-to-digital converter
In electronic instrumentation and signal processing, a time to digital converter (abbreviated TDC) is a device for recognizing events and providing a digital representation of the time they occurred. For example, a TDC might output the time of arrival for each incoming pulse. Some applications wish to measure the time interval between two events rather than some notion of an absolute time.In electronics time-to-digital converters (TDCs) or time digitizers are devices commonly used to measure a time interval and convert it into digital (binary) output. In some cases interpolating TDCs are also called time counters (TCs).TDCs are used in many different applications, where the time interval between two signal pulses (start and stop pulse) should be determined. Measurement is started and stopped, when either the rising or the falling edge of a signal pulse crosses a set threshold. These requirements are fulfilled in many physical experiments, like time-of-flight and lifetime measurements in atomic and high energy physics, experiments that involve laser ranging and electronic research involving the testing of integrated circuits and high-speed data transfer.