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Application Note 52 January 1993 Linear Technology Magazine Circuit Collection, Volume 1 Richard Markell, Editor INTRODUCTION Over the past several years Linear Technology, the magazine, has come of age. From nothing, the publication has come into its own, as has its subscriber list. Many innovative circuits have seen the light of day in the pages of our now hallowed publication. This Application Note is meant to consolidate the circuits from the first few years of the magazine in one place. Circuits herein range from laser diode driver circuits to data acquisition systems to a 50W high efficiency switcher circuit. Enough said. I’ll stand aside and let the authors explain their circuits. CIRCUIT INDEX A to D Converters .......................................................................................................... 2 LTC1292: 12-BIT DATA ACQUISITION CIRCUITS ..................................................................................... 2 Temperature-Measurement System.................................................................................................. 2 Floating, 12-Bit Data Acquisition System .......................................................................................... 2 Differential Temperature Measurement System ................................................................................ 2 MICROPOWER SO8 PACKAGED ADC CIRCUITS ...................................................................................... 4 Floating 8-Bit Data Acquisition System ............................................................................................. 4 0°C – 70°C Thermometer ................................................................................................................. 5 Interface .................................................................................................................... 6 LOW DROPOUT REGULATOR SIMPLIFIES ACTIVE SCSI TERMINATORS ................................................ 6 Power ........................................................................................................................ 7 LT1110 SUPPLIES 6 VOLTS AT 550mA FROM 2 AA NiCAD CELLS ......................................................... 7 50 WATT HIGH EFFICIENCY SWITCHER................................................................................................... 9 Filters ...................................................................................................................... 10 CASCADED 8TH-ORDER BUTTERWORTH FILTERS PROVIDE STEEP ROLL-OFF LOWPASS FILTER ..... 10 DC-ACCURATE, PROGRAMMABLE-CUTOFF, FIFTH-ORDER BUTTERWORTH LOWPASS FILTER REQUIRES NO ON-BOARD CLOCK ................................................................................................. 11 Miscellaneous Circuits .................................................................................................. 12 A SINGLE CELL LASER DIODE DRIVER USING THE LT1110 ................................................................. 12 LT1109 GENERATES VPP FOR FLASH MEMORY ................................................................................... 13 RF LEVELING LOOP ................................................................................................................................ 13 HIGH ACCURACY INSTRUMENTATION AMPLIFIER ............................................................................... 14 A FAST, LINEAR, HIGH CURRENT LINE DRIVER .................................................................................... 15 www.BDTIC.com/Linear AN52-1 Application Note 52 A to D Converters LTC1292: 12-BIT DATA ACQUISITION CIRCUITS by Sammy Lum Temperature-Measurement System The circuit in Figure 1 shows how a transducer output, such as a platinum RTD bridge, can be digitized with one op amp. This circuit is a modification of that found in Application Note 43.1 The differential input of the LTC1292 removes the common mode voltage. The LT1006 is used for amplification. The resistor tied between the + input of the LT1006 and the +IN input of the LTC1292 is to compensate for the loading of the bridge by resistor RS. Full scale can be adjusted by the 500kΩ trim pot and offset can be adjusted by the 100Ω trim pot in series with RS. A lower RPLAT value than that in AN43 is used here to improve dynamic range. The signal voltage on the +IN pin must not exceed VREF. The differential voltage range is VREF minus approximately 100mV. This is enough range to measure 0°C to 400°C with 0.1°C resolution. Floating, 12-Bit Data Acquisition System The circuit in Figure 2 demonstrates how to float the LTC1292 to make a differential measurement. This circuit will digitize a 5V range from 10V to 15V with 12 bits of 1 Williams, Jim, “Bridge Circuits, Marrying Gain and Balance,” Application Note 43, Linear Technology Corp. resolution. The digital I/O has been level translated. The LT1019-5 is used in shunt mode to create the floating analog ground for the LTC1292. The digital I/O lines make use of 4.3V Zeners to clamp the single-transistor inverters. Opto-isolators can also be used. The floating analog ground should be laid out as a ground plane for the LTC1292. The 47µF bypass capacitor should be tied from the VCC pin to the floating ground plane with minimum lead length and placed as close to the device as possible. Likewise, keep the lead length from the GND pin to the floating ground plane at a minimum (a low-profile socket is acceptable). Differential Temperature Measurement System The circuit in Figure 3 digitizes the difference in temperature between two locations. The two LM134s are used as temperature sensors. These are ideally suited for remote applications because they are current output devices. This allows long wires to run from the sensor back to the LTC1292 without any degradation to the signal from the sensor. Resistor RSET sets the current to 1µA/°K. The current is converted to a voltage by the resistor R1 connected from V – to ground. The reference voltage and resistor were selected to give a change of 0.05°C/LSB. The resolution is given by °C/LSB = VREF / ((4096) (1mA) (R1)). The maximum temperature at each input is 125°C. Note +5V +15V LT1027 100pF 4.7µF TANTALUM 1µF 1MΩ** D0 12kΩ* 12.5kΩ* 100Ω 0°C TRIM 1N4148 500kΩ 400°C TRIM MPU (e.g., 68HC11) 0.1µF – RS 13kΩ** LT1006 100Ω* VCC CLK SCK –IN DOUT MISO GND VREF +IN LTC1292 + RPLAT 100Ω RTD AT 0°C CS 1MΩ** 22µF TANTALUM * TRW-IRC MAR -6 RESISTOR -0.1% ** 1% METLA FILM RESISTOR RPLAT = ROSEMOUNT 118MFRTD AN52 • TA01 Figure 1. 0° to 400°C Temperature-Measurement System AN52-2 www.BDTIC.com/Linear Application Note 52 that if the temperature on the +IN pin is less than the temperature on the –IN pin, the output will be zero. Because the LTC1292 is being driven from a high source impedance, you should limit the CLK frequency to 100kHz or less. The software code for interfacing the LTC1292 to the Motorola MC68HC11 or the Intel 8051 is found in the LTC1292 data sheet. The code needs to be modified for the circuit in Figure 2 to account for the inversion introduced by the digital level translators. +15V OUT 1N5229 1kΩ + 1kΩ 1N5229 LT1019-5 CS VCC +INPUT +IN –INPUT –IN DOUT GND VREF GND CLK LTC1292 10V TO 15V 1N4148 DIODES 1µF TANTALUM + 47µF TANTALUM +5V 1.5kΩ 1kΩ 1.5kΩ 1kΩ 1kΩ 2N2222 P1.4 2N3906 MPU (e.g., 8051) 1kΩ 2N2222 P1.3 1N4148 1.5kΩ P1.1 1kΩ AN52 • TA02 Figure 2. Floating, 12-Bit Data Acquisition System +5V +15V LT1027 1µF 4.7µF TANTALUM LM134 V+ P1.4 V– 228Ω* R1 10kΩ* MPU (e.g., 8051) CS VCC P1.3 CLK +IN LM134 LTC1292 V+ –IN P1.1 DOUT 14.7kΩ* GND V– VREF 22µF TANTALUM 10.2kΩ* 22µF TANTALUM 228Ω* R1 10kΩ* *1% METAL FILM RESISTOR AN52 • TA03 Figure 3. Differential Temperature-Measurement System www.BDTIC.com/Linear AN52-3 Application Note 52 MICROPOWER SO8 PACKAGED ADC CIRCUITS by William Rempfer Floating 8-Bit Data Acquisition System Figure 4 shows a floating system that sends data to a grounded host system. The floating circuitry is isolated by two opto-isolators and powered by a simple capacitordiode charge pump. The system has very low power requirements because the LTC1096 shuts down between conversions and the opto-isolators draw power only when data is being transferred. The system consumes only 50µA at a sample rate of 10Hz (1ms on-time and 99ms offtime). This is easily within the current supplied by the charge pump running at 5MHz. If a truly isolated system is required, the system’s low power simplifies generating an isolated supply or powering the system from a battery. FLOATING SYSTEM 1N5817 47µF 0.001µF 2kV 0.1µF 1N5817 75k 2N3904 VCC 0.022 100k 20k CS LT1004-2.5 LTC1096 5MHz 300Ω VREF +IN 1N5817 4N28 100k –IN CLK GND ANALOG INPUT DOUT CLK 1k 10k DATA 500k AN52 • TA04 Figure 4. Power for this Floating ADC System is Provided by a Simple Capacitor-Diode Charge Pump. The Two Opto-Isolators Draw No Current Between Samples, Turning on Only to Send the Clock and Receive Data AN52-4 www.BDTIC.com/Linear Application Note 52 0°C – 70°C Thermometer Figure 5 shows a temperature-measurement system. The LTC1096 is connected directly to the low cost silicon temperature sensor. The voltage applied to the VREF pin adjusts the full scale of the ADC to the output range of the sensor. The zero point of the converter is matched to the zero output voltage of the sensor by the voltage on the LTC1096’s negative input. Figure 6 shows the operating sequence of the LTC1096. The converter draws power when the CS pin is low and shuts itself down when that pin is high. In systems that convert continuously, the LTC1096/LTC1098 will draw its normal operating power continuously. A 10µs wake up time must be provided to the LTC1096 after each falling CS. Operating the ADC directly off batteries can eliminate the space taken by a voltage regulator. Connecting the ADC directly to sensors can eliminate op amps and gain stages. The LTC1096/LTC1098 can operate with small, 0.1µF or 0.01µF chip bypass capacitors. In systems that have significant time between conversions, lowest power drain will occur with the minimum CS low time. Bringing CS low, waiting 10µs for the wake up time, transferring data as quickly as possible, and then bringing it back high will result in the lowest current drain. +3V 0.1µF LM134 75k VCC 678Ω +IN 13.5kΩ CS LTC1096 –IN TO µP CLK 182k VREF 0.01µF 0.01µF DOUT GND LT1004-1.2 63.4k AN52 • TA05 Figure 5. The LTC1096’s High-Impedance Input Connects Directly to this Temperature Sensor, Eliminating Signal Conditioning Circuitry in this 0°C–70°C Thermometer LTC1096 POWER DOWN AND WAKE UP CS POWER DOWN tWAKE UP (10µSEC MIN) tCONVERSION CLK DOUT B7 B6 B5 B4 B3 B2 B1 B0 AN52 • TA06 Figure 6. The ADC’s Power Consumption Drops to Zero When CS Goes High. 10µs After CS Goes Low, the ADC is Ready to Convert. For Minimum Power Consumption Keep CS High for as Much Time as Possible Between Conversions www.BDTIC.com/Linear AN52-5 Application Note 52 Interface LOW DROPOUT REGULATOR SIMPLIFIES ACTIVE SCSI TERMINATORS by Sean Gold The circuit shown in Figure 7 uses an LT1117 low dropout three terminal regulator to control the terminator’s local logic supply. The LT1117’s line regulation makes the output immune to variations in TERMPWR. After accounting for resistor tolerances and variations in the LT1117’s reference voltage, the absolute variation in the 2.85V output is only 4% over temperature. When the regulator drops out at TERMPWR-2.85, or 1.25V, the output linearly tracks the input with a 1V/V slope. The regulator provides effective signal termination because the 110Ω series resistor closely matches the transmission line’s charac- teristic impedance, and the regulator provides a good AC ground. In contrast to a passive terminator, two LT1117s require half as many termination resistors, and operate at 1/15 the quiescent current or 20mA. At these power levels, PC traces provide adequate heat sinking for the LT1117’s SOT-223 package. Beyond solving basic signal conditioning problems, this LT1117 terminator handles fault conditions with short circuit current limiting, thermal shutdown, and on-chip ESD protection. CONNECTOR TERMPWR 5V LOGIC SUPPLY 1N5817 LT1117 2.85V SOT-223 10 µ F TANTALUM 110Ω 2% 110Ω 0.1 µ F CERAMIC 22µF TANTALUM SCSI BUS 18 - 27 LINES 110Ω 2% 110Ω AN52 • TA07 Figure 7. SCSI Active Termination AN52-6 www.BDTIC.com/Linear Application Note 52 Power LT1110 SUPPLIES 6 VOLTS AT 550mA FROM 2 AA NiCAD CELLS by Steve Pietkiewicz The LT1110 micropower DC-DC converter can provide 5V at 150mA when operating from two AA alkaline cells. The internal switch VCE(SAT) sets this power limit. Even with an external low drop switch, more power is not realistically possible. The internal impedance (typically 200mΩ fresh and 500mΩ at end-of-life) of alkaline AA cells limits peak obtainable battery power. Conversely, nickel-cadmium cells have a constant internal impedance (35mΩ–50mΩ) for AA size) that increases only when the cell is completely discharged. This allows power to be drawn from the cell at a far greater rate. The circuit in Figure 8 uses two AA NiCad cells to supply 6 volts at 550mA. The circuit, developed for pagers with transmit capability, runs at full output current for 15 minutes with two Gates Millennium AA NiCad cells. With a 250mA load, the circuit runs for 36 minutes (see Figure 9). Less heat is generated with a reduced load, resulting in the watt-hour difference observable above. L1 5µH 10T # 18GA MAGNETICS INC. 55-041-A2 CORE R5 1k 6 ILIM AO Q1 2N4403 2 7 100µF 10V SANYO OS-CON + C1 1µF Q4 2N3904 SET GND 5 R2 1k 220 VIN 3 SW1 LT1110 2 x AA NiCAD 6VOUT 550mA 220 1 Q3 2N3906 D1 1N5820 FB SW2 4 8 10Ω 10k 16Ω Q5 2N3904 R3 15k 1% Q2 ZETEX ZTX-849 300pF R4 394k 1% + C2 220µF 10V SANYO 0S-CON R1 50mΩ ZETEX (516) 543-7100 SANYO (619) 661-6322 MAGNETICS INC. (412) 282-8282 AN52 • TA08 Figure 8. Schematic Diagram, 2 AA NiCad to +6 Volt Converter www.BDTIC.com/Linear AN52-7 BATTERY/OUTPUT VOLTAGE (V) Application Note 52 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 ILOAD = 550mA ILOAD = 250mA ILOAD = 250mA ILOAD = 550mA OUTPUT BATTERY 0 5 10 15 20 25 30 35 40 TIME (MINUTES) AN52 • TA09 Figure 9. Operating Time at ILOAD = 550mA and 250mA The circuit uses a micropower LT1110 switchingregulator IC as a controller. The internal switch of the LT1110 furnishes base drive to Q1 through the 220Ω resistors. Q1, in turn, supplies base drive to the power switch Q2. The Zetex ZTX849 NPN device is rated at 5A current and comes in a TO-92 package. For surface-mount fans, the FZT-849, also from Zetex, provides the same performance in an SOT-223 package. The 16Ω resistor provides a turn off path for Q2’s stored charge. When Q2 is on, current builds in L1. As Q2 turns off, its collector flies positive until D1 turns on. L1’s built-up current discharges through D1 into C2 and the load. The voltage at VOUT is divided by R4 and R3 and fed back into the FB pin of the LT1110, which controls Q2’s cycling action. Switch current limit, which is necessary to ensure saturation over supply variations, is implemented by Q3–Q5. Q3, C1, R2, and the auxiliary gain block inside the LT1110, form a 220mV reference point at the LT1110’s SET pin. Transistors Q4 and Q5 form a common-base differential amplifier. AN52-8 Q5’s emitter monitors the voltage across 50mΩ resistor R1. When the voltage across R1 exceeds 220mV, Q4 turns on hard, pulling current through R5. When the voltage at the ILIM pin of the LT1110 reaches a diode drop below the VIN pin, the internal switch turns off. Thus, maximum switch current is maintained at 220mV/50mΩ, or 4.4A, over input variations and manufacturing spread in the LT1110’s on time and frequency. The circuit’s output ripple measures 200mVP-P, and efficiency is 78% at full load with a 2.4V input. Output power can be scaled down for less demanding requirements. To reduce peak current, increase the value of R1. A 100mΩ resistor will limit current to 2.2A. L1 should be increased in value linearly as current is reduced. For a current limit of 2.2A, L1 should be 10µH. Base drive for Q2 can also be reduced by increasing the value of the 10Ω resistor. These lower peak currents are much easier on alkaline cells and will dramatically increase alkaline battery life. www.BDTIC.com/Linear Application Note 52 50 WATT HIGH EFFICIENCY SWITCHER by Milton Wilcox The high efficiency 10A step-down (buck) switching regulator shown in Figure 10 illustrates how different sized MOSFETs can be driven by the LT1158 without having to worry about shoot-through currents. Since 24V is being dropped down to 5V, the duty cycle for the switch (top MOSFET) is only 5/24 or 21%. This means that the bottom MOSFET will dominate the RDS(ON) efficiency losses, because it is turned on nearly four times as long as the top. Therefore a smaller MOSFET is used on the top, and the bottom MOSFET is doubled up, all without having to worry about dead time. Switching regulator applications can take advantage of an important protection feature of the LT1158: remote fault sensing. By sensing the current on the output side of the inductor and returning the LT1158 fault pin to the PWM soft-start pin, a true current-mode loop is formed. The Figure 10 circuit regulates maximum current in the inductor to 15A with no output voltage overshoot upon recovery from a short circuit. 95 The LT1158 uses an adaptive system that maintains dead time independent of the type, the size, and even the number of MOSFETs being driven. It does this by monitoring the gate turn-off to see that it has fully discharged before allowing the opposite MOSFET to turn on. During turn-on, the hold-off capability of the opposing driver is boosted to prevent transient shoot-through. In this way, cross-conduction is completely eliminated as a design constraint. EFFICIENCY (%) 90 85 80 75 2 0 4 8 6 10 OUTPUT CURRENT (A) AN52 • TA11 The non-critical Schottky diode across the bottom MOSFETs reduces reverse-recovery losses. Figure 11 shows the operating efficiency for the Figure 10 circuit. Figure 11. Operating Efficiency for Figure 10 Circuit. Current Limit is Set at 15A 24V IN 0.1µF 0.1µF 1N4148 + 4.7kΩ 10µF 4.7kΩ VIN NI INV VREF + BST DR V+ 1N4148 A BST + T FB B LT3525 1µF LT1158 10kΩ (2) 500µF LOW ESR T DR 1N4148 VC IRFZ34 L1* 70µH 7mΩ SEN+ + SEN– – BIAS COMP + GND 0.01µF 0.01µF 100Ω 5V/10A OUT SRC + (2) 1000µF LOW ESR (2) IRFZ44 DISCHG CT SOFT-ST RT FAULT + B DR 5µF MBR340 B FB GND 30kΩ 30kΩ 2.2nF 2.4kΩ *1 1/4" MP CORE 14GA WIRE AN52 • TA10 fOSC = 25kHz Figure 10. 50W High Efficiency Switching Regulator Illustrates the Design Ease Afforded by Adaptive Dead Time Generation www.BDTIC.com/Linear AN52-9 Application Note 52 Filters CASCADED 8TH-ORDER BUTTERWORTH FILTERS PROVIDE STEEP ROLL-OFF LOWPASS FILTER by Philip Karantzalis and Richard Markell Sometimes a design requires a filter that exceeds the specifications of the standard “dash-number” filter. In this case, the requirement was a low-distortion (–70dB) filter with roll-off faster than that of an 8th-order Butterworth. An elliptic filter was ruled out because its distortion specifications are too high. Two low power LTC1164-5s were wired in cascade to investigate the specifications that could be achieved with this architecture. The LTC1164-5 is a low power (4 milliamperes with ±5 volt supplies), clock-tunable, 8th-order filter, which can be configured for a Butterworth or Bessel response by strapping a pin. Figure 12 shows the schematic diagram of the two-filter system. The frequency response is shown in Figure 13, where it can be seen that the filter’s attenuation is 80dB at 2.3 times the cutoff frequency. The distortion, as shown in Figure 14, is nothing less than spectacular. From 100Hz to 1kHz, the two filters have less than –74dB distortion specifications. At the standard measurement frequency of 1kHz, the specification is –78dB. 1kΩ 1 2 3 4 +7.5V 5 0.1µF 6 7 INV (C) OUT (C) R3 SHUNT VIN V– GND LTC1164-5 V+ fCLK GND LP (A) 50/100 VOUT RIN (A) NC 1 14 2 13 0.1µF 12 3 –7.5V 11 10 4 +7.5V 5 0.1µF V+ 9 6 8 7 INV (C) VIN OUT (C) R3 SHUNT V– GND LTC1164-5 V+ fCLK GND 50/100 LP (A) VOUT RIN (A) NC 14 13 0.1µF 12 –7.5V 11 10 V+ 9 8 16.2k 16.2k V– V– AN52 • TA12 Figure 12. Schematic Diagram: Low Power, 16th-Order Lowpass Filter (Two 8th-Order Butterworths Cascaded) 10 –40 0 –45 –50 –20 –55 –60 –30 –65 THD (%) GAIN (dB) –10 –40 –50 –70 1.4VRMS IN –75 –80 –60 –85 –70 –90 –80 –90 100 ±5V SUPPLY 1k 5k FREQUENCY (Hz) –95 –100 100 1k FREQUENCY (Hz) AN52 • TA13 Figure 13. Frequency Response for fCLK = 20kHz AN52-10 AN52 • TA14 Figure 14. Distortion Performance: Two LTC1164-5s, fCLK = 60kHz (57:1) Pin 10 Connected to V+ www.BDTIC.com/Linear fCLK Application Note 52 DC-ACCURATE, PROGRAMMABLE-CUTOFF, FIFTH-ORDER BUTTERWORTH LOWPASS FILTER REQUIRES NO ON-BOARD CLOCK by Richard Markell Most users choose to tune the filter with an on-board microprocessor and/or timer. This is quite convenient if these components are available. If a clock is not available, the LTC1063 can be tuned with an external resistor and capacitor. The scheme shown here allows the filter’s cutoff frequency to be programmed using an external microprocessor or the parallel port of a personal computer. This allows the cutoff frequency of the filter to be set before the product is shipped. The new LTC1063 is a clock-tunable, monolithic filter with low-DC output offset (1mV typical with ±5V supplies). The frequency response of the filter closely approximates a fifth-order Butterworth polynomial. 20k +7.5V 1 INPUT VIN VOS ADJ 8 20k 2 7 GND VOUT LTC1063 3 – 6 V+ V 7.5V .1µF – 7 6 LT1007 +7.5V CLK 5 IN 4 CLK OUT 2 3 + VOUT 4 0.1µF –7.5V HUGHES HC2021 6 10 15k 1% C1 SER CLK C2 SER IN SER OUT 8 SD IN PROG READ VDD PROG 25 PIN PARALLEL PORT CONNECTOR FOR IBM PCs AND COMPATIBLES SCLK GND READ 1 2 3 16 +7.5 15 14 7.5 7.5 74LS05 74LS14 1k 2 11 10 3 4 5 13 12 1 2 3 5 6 9 8 4 1 2 11 18 1k +5V 74LS14 SD OUT GND 51Ω 11 8 74LS05 1k 9 6 5 270Ω 25 0.01µF +5V GND VDD GND 0.1µF GND 0.1µF GND PROGRAMMER FOR NON-VOLATILE CAPACITOR, HC2021 NOTES: 1. THE HC2021 SHOULD BE LOCATED CLOSE TO THE LTC1063 FOR BEST RESULTS. 2. +3.5 ≤ VDD ≤ +18.8. 3. POSITIVE POWER SUPPLY FOR DEVICES 74LS05 AND 74LS14 IS +5V. 4. HUGHES TELEPHONE NUMBER (714) 759-2665. AN52 • TA15 Figure 15. Schematic Diagram of LTC1063 with Programmable Cutoff Frequency www.BDTIC.com/Linear AN52-11 Application Note 52 10.000 The tuning scheme makes use of non-volatile, tunable capacitors available from Hughes Semiconductor. These capacitors allow approximately a decade of tuning range. More range could be obtained by using dual devices. Figure 15 shows the schematic diagram of the application. Be sure to place the variable capacitor as close as possible to the LTC1063 to minimize parasitic elements. Figure 16 shows the frequency response of the filter when the capacitor is varied from minimum to half-value, and then to maximum capacitance. The programming part of the circuit may be disconnected once the variable capacitor is set. The capacitor will remember its value until it is reprogrammed. 0.0 –10.00 AMPLITUDE –20.00 –30.00 –40.00 –50.00 –60.00 –70.00 –80.00 –90.00 1k CAPACITOR AT MAX VALUE 10k 100K 200K CAPACITOR AT CAPACITOR AT 1/2 MAX VALUE MIN VALUE FREQUENCY AN52 • TA16 Figure 16. LTC1063 Frequency Response Miscellaneous Circuits A SINGLE CELL LASER DIODE DRIVER USING THE LT1110 by Steve Pietkiewicz Recently available visible lasers can be operated from 1.5V supplies, given appropriate drive circuits. Because these lasers are exceptionally sensitive to overdrive, power to the laser must be carefully controlled lest it be damaged. Over-currents as brief as 2 microseconds can cause damage. In the circuit of Figure 17, an LT1110 switching regulator serves as the controller within the single cell powered laser diode driver. The LT1110 regulator is a high speed LT1073. The LT1110 is used here as an FM controller, driving a PNP power switch Q2, with a typical “ON” time of 1.5 microseconds. Current in L1 reaches a peak value of about 1.0A. The output capacitor C2 has been specified for low ESR, and should not be substituted (damage to the laser diode may result). The Gain Block output of the LT1110 functions with Q1 as an error amplifier. The differential inputs compare the photodiode current developed as a voltage across R2 to the 212mV reference. The amplifier drives Q1, which modulates current into the ILIM pin. This varies oscillator frequency to control average current. Overall frequency compensation is provided by R1 and C1, values carefully chosen to eliminate power-up overshoot. The value of current sense resistor R2 determines the laser diode power, as shown the 1000 ohms results in about a 0.8 milliwatt output. LZ1 R1 4.7k D1 1N4148 1.5V C1 22nF R3 220Ω Q1 2N3906 I LIM AO Q2 MJE210 V IN SW1 R4 10Ω D2 1N5818 + 0.1µF C2 100µF R5 2Ω LT1110 FB GND SET SW2 L1 = TOKO 262LYF - 0076K C2 = SANYO OS-CON LZ1 = TOSHIBA TOLD9211 R1 1k L1 2.2 µ H AN52 • TA17 Figure 17. LT1110 Laser Diode Driver Operating from a Single Cell AN52-12 www.BDTIC.com/Linear Application Note 52 LT1109 GENERATES VPP FOR FLASH MEMORY by Steve Pietkiewicz Flash memory chips such as the Intel 28F020 2Megabit device require a VPP program supply of 12 volts at 30mA. A DC-DC converter may be used to generate 12 volts from the 5 volt logic supply. The converter must be physically small, available in surface-mount packaging, and have logic-controlled shutdown. Additionally, the converter must have carefully controlled rise time and zero overshoot. VPP excursions beyond 14 volts for 20ns or longer will destroy the ETOX2-process based device. L1✝ 33µH MBRS120T3 VIN 22µF SENSE LT1109CS8-12 + 22 µ F SHUTDOWN* GND SHUTDOWN PROGRAM * 8-PIN PACKAGE ONLY ✝ L1 = COILTRONICS CTX 33-1 OR SUMIDA CD54-330 COILTRONICS (305) 781-8900 SUMIDA (708) 956-0666 RF LEVELING LOOP by Jim Williams Leveling loops are often a requirement for RF transmission systems. More often than not, low cost is more important than absolute accuracy. Figure 19 shows such a circuit. VOUT 12V 80mA SW +VIN 5V devices. The SHUTDOWN input turns off the converter, reducing quiescent current to 300µA when pulled to a logic 0. VPP rises in a controlled fashion, reaching 12 volts ±5% in under 4ms. Output voltage goes to VCC minus a diode drop when the converter is in shutdown mode. This is an acceptable condition for Intel flash memories and does not harm the memory. AN52 • TA18 Figure 18. All Surface Mount Flash Memory VPP Generator Figure 18’s circuit is well suited for providing VPP power for single or multiple flash memory chips. All associated components, including the inductor, are surface mount 2ETOX is a trademark of Intel Corporation. The RF input is applied to A1, an LT1228 operational transconductance amplifier. A1’s output feeds A2, the LT1228’s current feedback amplifier. A2’s output, the output of the circuit, is sampled by the A3-based gain control configuration. This arrangement closes a gain control loop back at A1. The 4pF capacitor compensates rectifier diode capacitance, enhancing output flatness vs frequency. A1’s ISET input current controls its gain, allowing overall output level control. This approach to RF leveling is simple and inexpensive, and provides low output drift and distortion. +15V RF INPUT 0.6VRMS-1.3VRMS 25MHz 10k + 100Ω A1 OTA 1/2 LT1228 + – 300Ω ISET A2 CFA 1/2 LT1228 – OUTPUT 2Vp-p 470Ω 0.01 10k –15V 10k 4pF 10Ω 0.01 10k +15V – A3 LT1006 + 10k 100k 4.7k –15V AMPLITUDE ADJUST 1N4148’s COUPLE THERMALLY –15V LT1004 1.2V AN52 • TA19 Figure 19. Simple RF Leveling Loop www.BDTIC.com/Linear AN52-13 Application Note 52 HIGH ACCURACY INSTRUMENTATION AMPLIFIER by Dave Dwelley The LTC1043 and the LTC1047 combine to make a high performance low frequency instumentation amplifier as shown in Figure 20. The LTC1043 switched capacitor block is configured as a sampling front end, providing exceptional CMRR and rail-to-rail input operation. It works by attaching a 1µF capacitor across the two inputs, letting it charge to the input voltage. Once charged, the capacitor is disconnected from the input terminals and reconnected to the output terminals, where it transfers its charge to the 1µF capacitor at the LTC1047’s input. Any common mode voltage present at the inputs is subjected to a capacitive divider between the 1µF flying cap and the IC’s parasitic capacitance. With the LTC1043’s parasitics typically below 1pF, this gives AC CMRR above 120dB. The analog switches in the LTC1043 are purely resistive, so they add no DC offset to the signal. The output signal (with the common mode stripped off) is then amplified by the LTC1047, a precision, micropower zero-drift op amp. The LTC1047 amplifies the signal by the desired amount, adding less than 10µV offset and 0.05µV/ °C drift. The sampling frequency of the LTC1043 with single 5V supply is about 400Hz, allowing differential signals below 200Hz to be amplified with no aliasing. Note that common mode signals are not sampled; thus they will not alias regardless of frequency until the common mode/ differential mode signal ratio approaches 120dB! The entire system draws 60µA with a single 5V supply and provides two independent channels. +5V 4 +5V 1/2 LTC1043 +IN 7 + 8 1/2 LTC1047 11 CH 1µF CS = 1µF VOUT – 12 –IN 14 13 16 1µF 17 0.01µF R1 R2 GAIN = 1 + R2 R1 VOS = 10µV ∆VOS = 50nV/°C IS = 30µA/SIDE CMRR > 120dB AT 60Hz SINGLE 5V SUPPLY INPUT RANGE INCLUDES BOTH SUPPLIES AN52 • TA20 Figure 20. High Accuracy Instrumentation Amplifier AN52-14 www.BDTIC.com/Linear Application Note 52 A FAST, LINEAR, HIGH CURRENT LINE DRIVER by Walt Jung and Rich Markell Among linear applications not usually seen are those which require high speed combined with either very low DC error, or high load current. Such applications can be solved by combining the best attributes of two ICs, either one of which may not be capable by itself of the entire requirement. A case in point is the line driver of Figure 21, which uses an LT1122 JFET input op amp as the gain element combined with an LT1010 buffer. This provides the output current of the LT1010 (typically 150mA) but with the basic DC and low level AC characteristics of the LT1122. The circuit is capable of driving loads as low as 100Ω with very low distortion. The input referred DC error is the low DC offset of the LT1122, typically 0.5mV or less. Large signal characteristics are also very good, due to the 80V/µs symmetrical SR of the LT1122. The circuit as shown is configured as a precise gain of 5 non-inverting amplifier by gain set resistors R2 and R1, with the LT1010 unity gain voltage follower inside the overall feedback loop. This provides current buffering to the op amp, allowing it to operate most linearly. Small signal bandwidth is set by the time constant of R2 and C1, and is 1MHz as shown, with a corresponding risetime of about 400ns. Performance with ±18V supplies is shown in Figures 22a and 22b, with output generally 5VRMS or equivalent, driving 100Ω directly. THD is shown in Figure 22a, with input level swept up to output clipping level, at a fixed 10kHz frequency. The distortion is generally well below 0.01%, and improves substantially for lower frequencies. V+ 1µ F R3 100 Ω 1% + INPUT U1 LT1122 R IN 10k 1µ F R BOOST 30 1% R4 49.9 Ω 1% (OPTIONAL) U2 LT1010 VOUT – 1µ F 1µ F C1 39pF V– R2 4k 1% R1 1k AN52 • TA21 Figure 21. Line Driver www.BDTIC.com/Linear Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. AN52-15 Application Note 52 CCIF IM distortion performance of the circuit for similar loading is shown in Figure 22b, driving a load of 100Ω at a swept level, again up to output clipping. The LT1122 amplifier is represented by the lower of the two curves, with distortion around the 0.0001% level. Also shown for comparison in this plot is the distortion of a type 156 JFET op amp (also driving the LT1010 buffer with other conditions the same). The 156 op amp uses a design topology with an intrinsically asymmetric SR. This manifests itself as rising even order distortion for methods such as this CCIF test. For this example, the distortion is more than an order of magnitude higher than that of the faster, symmetric slewing LT1122 for the same conditions. Applications of this circuit include low offset linear buffers such as for A/D inputs, line drivers for instrumentation use, and audio frequency range buffers such as very high quality headphone use. 1 CCIF 1M DISTORTION (%) TOTAL HARMONIC DISTORTION (%) 1 0.1 0.010 0.001 0.1 1 10 0.1 0.010 0.001 0.0001 0.1 INPUT LEVEL (V) 5 INPUT LEVEL (V) AN52 • TA22 Figure 22a. THD vs Input Level 1 AN52 • TA23 Figure 22b. CCIF IM Distortion vs Input Level Linear Technology, the magazine, is published 3 times a year. The magazine features articles, circuits and new product information from the designers at LTC. To subscribe please call 800-637-5545. www.BDTIC.com/Linear Linear Technology Corporation McCarthy Blvd., Milpitas, CA 95035-7487 AN52-16 1630 (408) 432-1900 : (408) 434-0507 : 499-3977 ● FAX ● TELEX BA/GP 0193 10K REV 0 LINEAR TECHNOLOGY CORPORATION 1993