Download LTC5541 - 1.3GHz to 2.3GHz High Dynamic Range Downconverting Mixer.

LTC5541
1.3GHz to 2.3GHz
High Dynamic Range
Downconverting Mixer
DESCRIPTION
FEATURES
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Conversion Gain: 7.8dB at 1950MHz
IIP3: 26.4dBm at 1950MHz
Noise Figure: 9.6dB at 1950MHz
16dB NF Under +5dBm Blocking
High Input P1dB
3.3V Supply, 630mW Power Consumption
Shutdown Pin
50Ω Single-Ended RF and LO Inputs
LO Inputs 50Ω Matched when Shutdown
High Isolation LO Switch
0dBm LO Drive Level
High LO-RF and LO-IF Isolation
Small Solution Size
20-Lead (5mm × 5mm) QFN package
The LTC®5541 is part of a family of high dynamic range passive,
high gain downconverting mixers covering the 600MHz to
4GHz frequency range. The LTC5541 is optimized for 1.3GHz
to 2.3GHz RF applications. The LO frequency must fall within
the 1.4GHz to 2.0GHz range for optimum performance. A
typical application is a LTE or W-CDMA receiver with a 1.7GHz
to 2.2GHz RF input and low-side LO.
The LTC5541 is designed for 3.3V operation, however; the
IF amplifier can be powered by 5V for the highest P1dB.
An integrated SPDT LO switch with fast switching accepts
two active LO signals, while providing high isolation.
APPLICATIONS
The LTC5541’s high conversion gain and high dynamic
range enable the use of lossy IF filters in high-selectivity
receiver designs, while minimizing the total solution cost,
board space and system-level variation.
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High Dynamic Range Downconverting Mixer Family
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Wireless Infrastructure Receivers
(LTE, W-CDMA. TD-SCDMA, UMTS, GSM1800)
Point-To-Point Microwave Links
High Dynamic Range Downmixer Applications
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
PART#
RF RANGE
LO RANGE
LTC5540
600MHz –1.3GHz
700MHz – 1.2GHz
LTC5541
1.3GHz – 2.3GHz
1.4GHz – 2.0GHz
LTC5542
1.6GHz – 2.7GHz
1.7GHz – 2.5GHz
LTC5543
2.3GHz – 4GHz
2.4GHz – 3.6GHz
TYPICAL APPLICATION
Wideband Receiver
190MHz
SAW
1nF
VCCIF
3.3V or 5V
1μF
22pF
IF
AMP
1nF
150nH
150nH
8.8
ADC
IF –
RF
1920MHz
TO
1980MHz
LTC5541
IF
LO2
RF
LNA
SYNTH 2
ALTERNATE LO FOR
FREQUENCY-HOPPING
LO
22pF
SHDN
(0V/3.3V)
BIAS
SHDN
VCC2
VCC 3.3V
1μF
VCC1
22pF
VCC3
LO1
LOSEL
LO SELECT
(0V/3.3V)
SYNTH 1
LO
1760MHz
5541 TA01
GC (dB)
22pF
IMAGE
BPF 2.2pF
28
8.6
IIP3
RF = 1950 ±30MHz
8.4 LO = 1760MHz
P = 0dBm
8.2 LO
TEST CIRCUIT IN FIGURE 1
8.0
7.8
26
24
22
20
18
GC
7.6
16
7.4
14
7.2
12
7.0
6.8
160
IIP3 (dBm), SSB NF (dB)
IF+
Wideband Conversion Gain, IIP3
and NF vs IF Output Frequency
190MHz
BPF
10
NF
190
200
170
180
210
IF OUTPUT FREQUENCY (MHz)
8
220
5541 TA02
5541f
1
LTC5541
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
IFGND
GND
IF–
IFBIAS
IF+
TOP VIEW
Mixer Supply Voltage (VCC1, VCC2)...........................3.8V
LO Switch Supply Voltage (VCC3).............................3.8V
IF Supply Voltage (IF+, IF –) ......................................5.5V
Shutdown Voltage (SHDN) ................–0.3V to VCC +0.3V
LO Select Voltage (LOSEL)................–0.3V to VCC +0.3V
LO1, LO2 Input Power (1GHz to 3GHz) ...................9dBm
LO1, LO2 Input DC Voltage ....................................±0.5V
RF Input Power (1GHz to 3GHz) ...........................15dBm
RF Input DC Voltage ............................................... ±0.1V
Operating Temperature Range .................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Junction Temperature (TJ) .................................... 150°C
20 19 18 17 16
15 LO2
NC 1
14 VCC3
RF 2
21
GND
CT 3
13 GND
7
8
9 10
LOSEL
GND
6
VCC1
11 LO1
VCC2
12 GND
SHDN 5
LOBIAS
GND 4
UH PACKAGE
20-LEAD (5mm s 5mm) PLASTIC QFN
TJMAX = 150°C, θJA = 34°C/W, θJC = 3°C/W
EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC5541IUH#PBF
LTC5541IUH#TRPBF
5541
20-Lead (5mm x 5mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
AC ELECTRICAL CHARACTERISTICS
VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25°C, PLO = 0dBm,
unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4)
PARAMETER
CONDITIONS
MIN
LO Input Frequency Range
RF Input Frequency Range
Low-Side LO
High-Side LO
TYP
MAX
UNITS
1400 to 2000
MHz
1600 to 2300
1300 to 1800
MHz
MHz
5 to 500
MHz
IF Output Frequency Range
Requires External Matching
RF Input Return Loss
ZO = 50Ω, 1300MHz to 2300MHz
>12
dB
LO Input Return Loss
ZO = 50Ω, 1400MHz to 2000MHz
>12
dB
IF Output Return Loss
Requires External Matching
>12
dB
LO Input Power
fLO = 1400MHz to 2000MHz
–4
0
6
dBm
LO to RF Leakage
fLO = 1400MHz to 2000MHz
<–32
dBm
LO to IF Leakage
fLO = 1400MHz to 2000MHz
<–31
dBm
LO Switch Isolation
LO1 Selected, 1400MHz < fLO < 2000MHz
LO2 Selected, 1400MHz < fLO < 2000MHz
52
50
dB
dB
RF to LO Isolation
fRF = 1300MHz to 2300MHz
>52
dB
RF to IF Isolation
fRF = 1300MHz to 2300MHz
>33
dB
5541f
2
LTC5541
AC ELECTRICAL CHARACTERISTICS
VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25°C, PLO = 0dBm,
PRF = –3dBm (Δf = 2MHz for two-tone IIP3 tests),unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4)
Low-Side LO Downmixer Application: RF = 1700 to 2200MHz, IF = 190MHz, fLO = fRF –fIF
PARAMETER
CONDITIONS
Conversion Gain
RF = 1750MHz
RF = 1950MHz
RF = 2150MHz
Conversion Gain Flatness
RF = 1950 ±30MHz, LO = 1760MHz, IF=190 ±30MHz
Conversion Gain vs Temperature
TA = –40ºC to +85ºC, RF = 1950MHz
Input 3rd Order Intercept
RF = 1750MHz
RF = 1950MHz
RF = 2150MHz
SSB Noise Figure
MIN
TYP
6.5
8.6
7.8
7.6
MAX
dB
±0.1
24.0
RF = 1750MHz
RF = 1950MHz
RF = 2150MHz
UNITS
dB
–0.006
dB/°C
25.5
26.4
25.5
dBm
9.2
9.6
10.6
11.7
dB
SSB Noise Figure Under Blocking
fRF = 1950MHz, fLO = 1760MHz,
fBLOCK = 2050MHz, PBLOCK = 5dBm
16
dB
2RF – 2LO Output Spurious Product
(fRF = fLO + fIF/2)
fRF = 1855MHz at –10dBm, fLO = 1760MHz, fIF = 190MHz
–67
dBc
3RF – 3LO Output Spurious Product
(fRF = fLO + fIF/3)
fRF = 1823.33MHz at –10dBm, fLO = 1760MHz, fIF = 190MHz
–73
dBc
Input 1dB Compression
RF = 1950MHz, VCCIF = 3.3V
RF = 1950MHz, VCCIF = 5V
11.3
14.6
dBm
High-Side LO Downmixer Application: RF = 1300-1800MHz, IF = 190MHz, fLO = fRF +fIF
PARAMETER
CONDITIONS
Conversion Gain
RF = 1450MHz
RF = 1600MHz
RF = 1750MHz
Conversion Gain Flatness
RF = 1600MHz ±30MHz, LO = 1790MHz, IF = 190 ±30MHz
Conversion Gain vs Temperature
TA = –40°C to 85°C, RF = 1600MHz
Input 3rd Order Intercept
MIN
TYP
8.9
8.4
8.0
±0.1
MAX
UNITS
dB
dB
–0.006
dB/°C
RF = 1450MHz
RF = 1600MHz
RF = 1750MHz
24.5
24.6
24.3
dBm
SSB Noise Figure
RF = 1450MHz
RF = 1600MHz
RF = 1750MHz
9.5
9.9
9.9
dB
SSB Noise Figure Under Blocking
fRF = 1600MHz, fLO = 1790MHz, fIF = 190MHz
fBLOCK = 1500MHz, PBLOCK = 5dBm
18
dB
2LO – 2RF Output Spurious Product
(fRF = fLO – fIF/2)
fRF = 1695MHz at –10dBm, fLO = 1790MHz
fIF = 190MHz
–69
3LO – 3RF Output Spurious Product
(fRF = fLO – fIF/3)
fRF = 1726.67MHz at –10dBm, fLO = 1790MHz
fIF = 190MHz
–74
Input 1dB Compression
RF = 1750MHz, VCCIF = 3.3V
RF = 1750MHz, VCCIF = 5V
11.1
14.4
dBc
dBc
dBm
5541f
3
LTC5541
DC ELECTRICAL CHARACTERISTICS
VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25°C, unless otherwise
noted. Test circuit shown in Figure 1. (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC Supply Voltage (Pins 6, 8 and 14)
3.1
3.3
3.5
V
VCCIF Supply Voltage (Pins 18 and 19)
3.1
3.3
5.3
V
92
100
192
108
120
228
mA
500
μA
Power Supply Requirements (VCC, VCCIF)
VCC Supply Current (Pins 6 + 8 + 14)
VCCIF Supply Current (Pins 18 + 19)
Total Supply Current (VCC + VCCIF)
Total Supply Current – Shutdown
SHDN = High
Shutdown Logic Input (SHDN) Low = On, High = Off
SHDN Input High Voltage (Off)
3
V
SHDN Input Low Voltage (On)
–0.3V to VCC + 0.3V
SHDN Input Current
–20
0.3
V
30
μA
Turn On Time
1
μs
Turn Off Time
1.5
μs
LO Select Logic Input (LOSEL) Low = LO1 Selected, High = LO2 Selected
LOSEL Input High Voltage
3
V
LOSEL Input Low Voltage
–0.3V to VCC + 0.3V
LOSEL Input Current
–20
LO Switching Time
0.3
V
30
μA
50
Note 3: SSB Noise Figure measurements performed with a small-signal
noise source, bandpass filter and 6dB matching pad on RF input, bandpass
filter and 6dB matching pad on the LO input, and no other RF signals
applied.
Note 4: LO switch isolation is measured at the IF output port at the IF
frequency with fLO1 and fLO2 offset by 2MHz.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC5541 is guaranteed functional over the operating
temperature range from –40°C to 85°C.
TYPICAL DC PERFORMANCE CHARACTERISTICS
VCC Supply Current
vs Supply Voltage
(Mixer and LO Switch)
SHDN = Low, Test circuit shown in Figure 1.
VCCIF Supply Current
vs Supply Voltage (IF Amplifier)
Total Supply Current
vs Temperature (VCC + VCCIF)
125
100
ns
220
98
SUPPLY CURRENT (mA)
SUPPLY CURRENT(mA)
94
85°C
92
25°C
90
–40°C
88
86
105
25°C
95
85
84
VCC = 3.3V, VCCIF = 5V
(DUAL SUPPLY)
200
190
VCC = VCCIF = 3.3V
(SINGLE SUPPLY)
180
170
–40°C
82
80
3.0
210
85°C
SUPPLY CURRENT(mA)
115
96
3.1
3.4
3.2
3.3
3.5
VCC SUPPLY VOLTAGE (V)
3.6
5541 G01
75
3.0
3.3
3.6 3.9 4.2 4.5 4.8 5.1
VCCIF SUPPLY VOLTAGE (V)
5.4
5541 G02
160
–45
–25
55
–5
15
35
TEMPERATURE (°C)
75
95
5541 G03
5541f
4
LTC5541
TYPICAL AC PERFORMANCE CHARACTERISTICS
Low-Side LO
VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25°C, PLO = 0dBm, PRF = –3dBm (–3dBm/tone for two-tone IIP3 tests, Δf = 2MHz),
IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1.
Conversion Gain, IIP3 and NF
vs RF Frequency
28
GC (dB), IIP3 (dBm), SSB NF (dB)
26
LO Leakage vs LO Frequency
IIP3
60
24
LO LEAKAGE (dBm)
18
16
14
12
LO-IF
ISOLATION (dB)
20
–40
LO-RF
45
40
RF-IF
35
10
6
1.65
30
GC
1.75
2.15
1.85 1.95 2.05
RF FREQUENCY (GHz)
–60
1.2
2.25
1.4
1.6
1.8
2.0
LO FREQUENCY (GHz)
5541 G04
20
27
20
26
18
25
18
24 IIP3
23
16
23
8
13
6
11
7
–6
–4
4
–2
0
2
LO INPUT POWER (dBm)
17
10
21
15
10
2
9
2
8
0
7
0
6
–6
–4
4
–2
0
2
LO INPUT POWER (dBm)
10
9
7
3.0
GC
IIP3
22
28
20
26
18
85°C
25°C 16
–40°C
14
23
21
19
12
NF
10
15
8
RF = 1950MHz
VCC = VCCIF 4
13
RF = 1950MHz 6
VCC = 3.3V 4
2
9
3.5
3.1
3.2
3.3
3.4
VCC, VCCIF SUPPLY VOLTAGE (V)
0
3.6
5541 G10
1
–4
4
–2
0
2
LO INPUT POWER (dBm)
11
7
3.0
GC
3.3
2
3.6 3.9 4.2 4.5 4.8 5.1
VCCIF SUPPLY VOLTAGE (V)
6
1950MHz Conversion Gain, IIP3
and RF Input P1dB vs Temperature
17
8
6
11
GC (dB), IIP3 (dBm)
85°C 16
25°C
–40°C 14
12
25
13
3
5541 G09
0
5.4
5541 G11
SSB NF (dB)
27
SSB NF (dB)
29
18
NF
5
GC
Conversion Gain, IIP3 and NF
vs IF Supply Voltage (Dual Supply)
20
15
7
–6
6
9
NF
12
5541 G08
25
17
14
4
27
19
11
11
Conversion Gain, IIP3 and NF
vs Supply Voltage (Single Supply)
21
16
20
4
5541 G07
23
18
85°C 17
25°C
–40°C 15
13
6
GC
19
22
13
6
IIP3
8
NF
21
GC (dB), IIP3 (dBm), P1dB (dBm)
GC
9
19
85°C 16
25°C
–40°C 14
12
GC (dB), IIP3 (dBm)
15
2.3
SSB NF (dB)
17
IIP3
SSB NF (dB)
19
SSB NF (dB)
85°C
25°C 14
–40°C
12
NF
10
21
1.7
1.9
2.1
RF FREQUENCY (GHz)
2150MHz Conversion Gain, IIP3
and NF vs LO Power
25
IIP3
1.5
5541 G06
1950MHz Conversion Gain, IIP3
and NF vs LO Power
GC (dB), IIP3 (dBm)
27
25
1.3
2.2
5541 G05
1750MHz Conversion Gain, IIP3
and NF vs LO Power
GC (dB), IIP3 (dBm)
50
–50
NF
RF-LO
55
–30
22
8
GC (dB), IIP3 (dBm)
RF Isolation vs RF Frequency
65
–20
IIP3
24
22
20
VCCIF = 5.0V
VCCIF = 3.3V
18
16
14
12
P1dB
10
8
GC
6
–45 –25
–5
15
35
55
TEMPERATURE (°C)
75
95
5541 G12
5541f
5
LTC5541
TYPICAL AC PERFORMANCE CHARACTERISTICS
Low-Side LO (continued)
VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25°C, PLO = 0dBm, PRF = –3dBm (–3dBm/tone for two-tone IIP3 tests, Δf = 2MHz),
IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1.
2-Tone IF Output Power, IM3 and
IM5 vs RF Input Power
20
IFOUT
10 (RF = 1950MHz)
IFOUT
0
RF1 = 1949MHz
RF2 = 1951MHz
LO = 1760MHz
–10
–20
–30
–40
–50
–60
LO = 1760MHz
–10
–20
–30
3RF-3LO
(RF = 1823.33MHz)
–40
–50
2RF-2LO
(RF = 1855MHz)
–60
IM3
–70
–80
–12
–9
–6
–3
0
3
RF INPUT POWER (dBm/TONE)
–80
–12 –9
6
PLO = 0dBm
11
–6
15
4
–2
0
2
LO INPUT POWER (dBm)
LO Switch Isolation
vs LO Frequency–LO2 Selected
PLO1 = –3dBm
55
PLO2 = 0dBm
50
PLO2 = 3dBm
40
1.2
5
PLO1 = 0dBm
50
LOSEL = LOW
PLO1 = 0dBm
1.4
1.6
1.8
2.0
LO FREQUENCY (GHz)
40
1.2
2.2
20
85°C
25°C
–40°C
35
85°C
25°C
–40°C
RF = 1950MHz
16
14
12
10
8
6
RF = 1950MHz
30
DISTRIBUTION (%)
DISTRIBUTION (%)
10
1.6
1.8
2.0
LO FREQUENCY (GHz)
2.2
SSB Noise Figure Distribution
18
30
15
1.4
5541 G18
IIP3 Distribution
20
LOSEL = HIGH
PLO2 = 0dBm
5541 G17
Conversion Gain Distribution
25
PLO1 = 3dBm
45
PLO = 3dBm
0
–20
–15
–10
–5
RF BLOCKER POWER (dBm)
6
5541 G15
45
RF = 1950MHz
–4
60
5541 G16
DISTRIBUTION (%)
12
ISOLATION (dB)
ISOLATION (dB)
SSB NF (dB)
PLO = –3dBm
12
35
3RF-3LO
(RF = 1823.33MHz)
PLO2 = –3dBm
14
40
–70
–80
3
6
9
–6 –3 0
RF INPUT POWER (dBm)
55
9
–25
2RF-2LO
(RF = 1855MHz)
–65
–75
60
15
10
–60
LO Switch Isolation
vs LO Frequency–LO1 Selected
RF = 1950MHz
BLOCKER = 2050MHz
13
–55
5541 G14
SSB Noise Figure
vs RF Blocker Level
16
RF = 1950MHz
PRF = –10dBm
LO = 1760MHz
–70
IM5
5541 G13
17
RELATIVE SPUR LEVEL (dBc)
0
–50
20
OUTPUT POWER (dBm)
OUTPUT POWER/TONE (dBm)
10
2 × 2 and 3 × 3 Spur Suppression
vs LO Power
Single-Tone IF Output Power, 2 × 2
and 3 × 3 Spurs vs RF Input Power
85°C
25°C
–40°C
25
20
15
10
4
5
5
2
0
6.9 7.1 7.3 7.5 7.7 7.9 8.1 8.3 8.5
CONVERSION GAIN (dB)
5541 G18a
0
25.0
0
25.4
25.8
26.2 26.6
IIP3 (dBm)
27.0
27.4
5541 G18b
8.2
8.6
9.0 9.4 9.8 10.2 10.6 11.0
SSB NOISE FIGURE (dB)
5541 G18c
5541f
6
LTC5541
TYPICAL AC PERFORMANCE CHARACTERISTICS
High-Side LO
VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25°C, PLO = 0dBm, PRF = –3dBm (–3dBm/tone for two-tone IIP3 tests, Δf = 2MHz),
IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1.
1450MHz Conversion Gain, IIP3
and RF Input P1dB vs Temperature
Conversion Gain, IIP3 and NF
vs RF Frequency
25
GC (dB), IIP3 (dBm), P1dB (dBm)
23
21
19
17
15
13
SSB NF
9
19
1350
VCCIF = 5.0V
VCCIF = 3.3V
17
15
13
P1dB
11
9
GC
7
1250
1450 1550 1650 1750
RF FREQUENCY (MHz)
23
21
7
–45
1850
–25
55
–5
15
35
TEMPERATURE (°C)
75
21
14
19
12
14
19
12
17
10
GC
4
–2
0
2
LO INPUT POWER (dBm)
GC (dB), IIP3 (dBm)
8
85°C 6
25°C
–40°C 4
NF
8
85°C
6
25°C
–40°C 4
15
13
11
2
9
0
7
GC
–6
6
–4
4
–2
0
2
LO INPUT POWER (dBm)
2-Tone IF Output Power, IM3 and
IM5 vs RF Input Power
13
2
9
0
7
2
0
–4
4
–2
0
2
LO INPUT POWER (dBm)
OUTPUT POWER (dBm)
0
2 × 2 and 3 × 3 Spur Suppression
vs LO Power
–50
–40
–50
LO = 1790MHz
–10
–20
–30
–40
3LO-3RF
(RF = 1726.67MHz)
–50
–60
IM5
–70
2LO-2RF
(RF = 1695MHz)
RF = 1600MHz
PRF = –10dBm
LO = 1790MHz
–55
–60
–65
2LO-2RF
(RF = 1695MHz)
–70
–75
3LO-3RF
(RF = 1726.67MHz)
–70
3
–9
–6
–3
0
RF INPUT POWER (dBm/TONE)
6
5541 G24
–80
–12 –9
6
5541 G23
RELATIVE SPUR LEVEL (dBc)
IFOUT
IM3
GC
–6
6
8
85°C 6
25°C
–40°C 4
11
IFOUT
10 (RF = 1600MHz)
RF1 = 1599MHz
–20 RF2 = 1601MHz
–30 LO = 1790MHz
–80
–12
15
20
–10
–60
10
NF
Single-Tone IF Output Power, 2 × 2
and 3 × 3 Spurs vs RF Input Power
20
0
17
5541 G22b
5541 G22
10
18
IIP3
SSB NF (dB)
21
IIP3
SSB NF (dB)
12
SSB NF (dB)
GC (dB), IIP3 (dBm)
16
14
8
OUTPUT POWER/TONE (dBm)
23
20
–4
5541 G21
16
22
10
95
75
18
23
NF
–5
15
35
55
TEMPERATURE (°C)
25
25
–6
GC
7
–45 –25
20
16
18
P1dB
11
1750MHz Conversion Gain, IIP3
and NF vs LO Power
27
12
13
95
18
IIP3
14
15
1600MHz Conversion Gain, IIP3
and NF vs LO Power
24
VCCIF = 5.0V
VCCIF = 3.3V
17
5541 G20
1450MHz Conversion Gain, IIP3
and NF vs LO Power
16
19
9
5541 G19
26
IIP3
21
GC
GC (dB), IIP3 (dBm)
11
IIP3
GC (dB), IIP3 (dBm), P1dB (dBm)
23
GC (dB), IIP3 (dBm), SSB NF (dB)
25
25
IIP3
10
1750MHz Conversion Gain, IIP3
and RF Input P1dB vs Temperature
–80
3
6
9
–6 –3 0
RF INPUT POWER (dBm)
12
15
5541 G25
–6
–4
4
–2
0
2
LO INPUT POWER (dBm)
6
5541 G26
5541f
7
LTC5541
PIN FUNCTIONS
NC (Pin 1): This pin is not connected internally. It can be
left floating, connected to ground or to VCC .
LOBIAS (Pin 7): This Pin Allows Adjustment of the LO
Buffer Current. Typical DC voltage is 2.2V.
RF (Pin 2): Single-Ended Input for the RF Signal. This pin
is internally connected to the primary side of the RF input
transformer, which has low DC resistance to ground. A
series DC-blocking capacitor should be used to avoid
damage to the integrated transformer. The RF input is
impedance matched, as long as the selected LO input is
driven with a 0dBm ±6dB source between 1.4GHz and
2GHz.
LOSEL (Pin 9): LO1/LO2 Select Pin. When the input voltage
is less than 0.3V, the LO1 port is selected. When the input
voltage is greater than 3V, the LO2 port is selected. Typical
input current is 11μA for LOSEL = 3.3V. This pin must not
be allowed to float.
CT (Pin 3): RF Transformer Secondary Center-Tap. This
pin may require a bypass capacitor to ground. See the
Applications Information section. This pin has an internally
generated bias voltage of 1.2V. It must be DC-isolated
from ground and VCC.
GND (Pins 4, 10, 12, 13, 17, Exposed Pad Pin 21):
Ground. These pins must be soldered to the RF ground
plane on the circuit board. The exposed pad metal of the
package provides both electrical contact to ground and
good thermal contact to the printed circuit board.
SHDN (Pin 5): Shutdown Pin. When the input voltage is
less than 0.3V, the internal circuits supplied through pins
6, 8, 14, 18 and 19 are enabled. When the input voltage
is greater than 3V, all circuits are disabled. Typical input
current is less than 10μA. This pin must not be allowed
to float.
VCC2 (Pin 6) and VCC1 (Pin 8): Power Supply Pins for
the LO Buffer and Bias Circuits. These pins are internally
connected and must be externally connected to a regulated
3.3V supply, with bypass capacitors located close to the
pin. Typical current consumption is 92mA.
LO1 (Pin 11) and LO2 (Pin 15): Single-Ended Inputs for
the Local Oscillators. These pins are internally biased
at 0V and require external DC blocking capacitors. Both
inputs are internally matched to 50Ω, even when the chip
is disabled (SHDN = high).
VCC3 (Pin 14): Power Supply Pin for the LO Switch. This
pin must be connected to a regulated 3.3V supply and
bypassed to ground with a capacitor near the pin. Typical
DC current consumption is less than 100μA.
IFGND (Pin 16): DC Ground Return for the IF Amplifier.
This pin must be connected to ground to complete the
IF amplifier’s DC current path. Typical DC current is
100mA.
IF – (Pin 18) and IF + (Pin 19): Open-Collector Differential
Outputs for the IF Amplifier. These pins must be connected
to a DC supply through impedance matching inductors, or
a transformer center-tap. Typical DC current consumption
is 50mA into each pin.
IFBIAS (Pin 20): This Pin Allows Adjustment of the IF Amplifier
Current. Typical DC voltage is 2.1V.
5541f
8
LTC5541
BLOCK DIAGRAM
20
19 18
16
21
IF+
IFBIAS
IF –
IFGND
EXPOSED
PAD
IF
AMP
2
3
5
LO2
15
VCC3
14
RF
LO
AMP
LOSEL
PASSIVE
MIXER
CT
SHDN
9
LO1
11
BIAS
VCC2
VCC1
6
8
7
LOBIAS
GND PINS ARE
NOT SHOWN
5541 BD
TEST CIRCUIT
IFOUT
190MHz
50Ω
4:1
T1
L1
VCCIF
3.1V TO 5.3V
100mA
C9
L1, L2 vs IF
Frequencies
C10
IF (MHz)
L1, L2 (nH)
L2
140
270
190
150
240
100
300
56
380
33
C8
20
19
18
IFBIAS
IF+
IF –
17
GND
16
IFGND
1 NC
LO2 15
2 RF
VCC3 14
C4
LO2IN
50Ω
C1
RFIN
50Ω
LTC5541
3 CT
C7
GND 13
4 GND
GND 12
C3
SHDN
(0V/3.3V)
5 SHDN
VCC2
LOBIAS
7
6
VCC
3.1V TO 3.5V
92mA
C5
0.015”
0.062”
0.015”
VCC1
LOSEL
9
8
LO1IN
50Ω
LO1 11
GND
10
REF DES
VALUE
SIZE
COMMENTS
C1
2.2pF
0402
AVX
C3, C4, C6,
C7, C8
22pF
0402
AVX
C5, C9
1μF
0603
AVX
AVX
C10
1000pF
0402
L1, L2
150nH
0603 Coilcraft 0603CS
T1
(Alternate)
TC4-1W-7ALN+
(WBC4-6TLB)
Mini-Circuits
(Coilcraft)
5541 TC
C6
LOSEL
(0V/3.3V)
RF
GND
DC1431A
BOARD
BIAS STACK-UP
GND (NELCO N4000-13)
Figure 1. Standard Downmixer Test Circuit Schematic (190MHz IF)
5541f
9
LTC5541
APPLICATIONS INFORMATION
Introduction
The LTC5541 consists of a high linearity passive doublebalanced mixer core, IF buffer amplifier, high speed singlepole double-throw (SPDT) LO switch, LO buffer amplifier
and bias/shutdown circuits. See Block Diagram section for
a description of each pin function. The RF and LO inputs
are single-ended. The IF output is differential. Low-side or
high-side LO injection can be used. The evaluation circuit,
shown in Figure 1, utilizes bandpass IF output matching and
an IF transformer to realize a 50Ω single-ended IF output.
The evaluation board layout is shown in Figure 2.
applications. When used, C2 should be located within
2mm of pin 3 for proper high-frequency decoupling. The
nominal DC voltage on the CT pin is 1.2V.
For the RF input to be matched, the selected LO input
must be driven. A broadband input match is realized with
C1 = 2.2pF. The measured input return loss is shown in
Figure 4 for LO frequencies of 1.4GHz, 1.75GHz and 2GHz.
These LO frequencies correspond to the lower, middle
and upper values of the LO range. As shown in Figure 4,
the RF input impedance is somewhat dependent on LO
frequency, although a single value of C1 is adequate to
cover the 1.3GHz-2.3GHz RF band.
TO MIXER
RFIN
C1
2
3
RF
CT
C2
LTC5541
5541 F03
5541 F02
Figure 2. Evaluation Board Layout
Figure 3. RF Input Schematic
RF Input
The secondary winding of the RF transformer is internally
connected to the passive mixer. The center-tap of the
transformer secondary is connected to pin 3 (CT) to allow
the connection of bypass capacitor, C2. The value of C2
is LO frequency-dependent and is not required for most
–5
LO = 2GHz
RETURN LOSS (dB)
The mixer’s RF input, shown in Figure 3, is connected to
the primary winding of an integrated transformer. A 50Ω
match is realized when a series capacitor, C1, is connected
to the RF input. C1 is also needed for DC blocking if the
RF source has DC voltage present, since the primary side
of the RF transformer is DC-grounded internally. The DC
resistance of the primary is approximately 3.6Ω.
0
–10
–15
–20
LO = 1.4GHz
–25
LO = 1.75GHz
–30
1.0
1.5
2.0
2.5
FREQUENCY (GHz)
3.0
5541 F04
Figure 4. RF Input Return Loss
5541f
10
LTC5541
APPLICATIONS INFORMATION
The RF input impedance and input reflection coefficient,
versus RF frequency, is listed in Table 1. The reference
plane for this data is pin 2 of the IC, with no external
matching, and the LO is driven at 1.75GHz.
Table 1. RF Input Impedance and S11
(at Pin 2, No External Matching, LO Input Driven at 1.75GHz)
S11
The LO switch is designed for high isolation and fast
(<50ns) switching. This allows the use of two active
synthesizers in frequency-hopping applications. If only
one synthesizer is used, then the unused LO input may
be grounded. The LO switch is powered by VCC3 (Pin 14)
and controlled by the LOSEL logic input (Pin 9). The LO1
and LO2 inputs are always 50Ω-matched when VCC is
applied to the chip, even when the chip is shutdown. The
DC resistance of the selected LO input is approximately
23Ω and the unselected input is approximately 50Ω. A
logic table for the LO switch is shown in Table 2. Measured
LO input return loss is shown in Figure 6.
FREQUENCY
(GHz)
INPUT
IMPEDANCE
MAG
ANGLE
1.0
24.1 + j42.1
0.58
92.1
1.2
33.1 + j47.2
0.53
79.8
1.4
43.6 + j49.2
0.47
69.7
1.6
58.0 + j47.1
0.41
56.9
1.8
50.2 + j20.6
0.20
77.8
2.0
43.0 + j32.4
0.34
82.9
LOSEL
ACTIVE LO INPUT
2.2
43.7 + j37.8
0.39
79.0
Low
LO1
2.4
44.1 + j44.4
0.43
72.4
High
LO2
2.6
49.0 + j51.7
0.47
63.6
2.8
56.8 + j57.6
0.48
55.0
3.0
68.9 + j61.0
0.48
45.7
LTC5541
LO2
C4 LO2IN
15
LO BUFFER
VCC3
14
TO
MIXER
Table 2. LO Switch Logic Table
The LO amplifiers are powered by VCC1 and VCC2 (pin 8
and pin 6). When the chip is enabled (SHDN = low), the
internal bias circuit provides a regulated 4mA current to the
amplifier’s bias input, which in turn causes the amplifiers
to draw approximately 80mA of DC current. This 4mA
reference current is also connected to LOBIAS (Pin 7)
to allow modification of the amplifier’s DC bias current
for special applications. The recommended application
circuits require no LO amplifier bias modification, so this
pin should be left open-circuited.
0
BIAS
7
LOBIAS
6
VCC2
8
VCC1
9
LOSEL
5541 F05
C3 = C4 = 22pF
–5
RETURN LOSS (dB)
LO1
11
4mA
C3 LO1IN
–10
SELECTED
–15
–20
NOT SELECTED
OR SHUTDOWN
Figure 5. LO Input Schematic
–25
LO Inputs
The mixer’s LO input circuit, shown in Figure 5, consists
of an integrated SPDT switch, a balun transformer, and
a two-stage high-speed limiting differential amplifier to
drive the mixer core. The LTC5541’s LO amplifiers are
optimized for the 1.4GHz to 2.0GHz LO frequency range.
LO frequencies above or below this frequency range may
be used with degraded performance.
–30
0.8
1.1
1.4
1.7
2.0
FREQUENCY (GHz)
2.3
2.6
5541 F06
Figure 6. LO Input Return loss
5541f
11
LTC5541
APPLICATIONS INFORMATION
The nominal LO input level is 0dBm although the limiting
amplifiers will deliver excellent performance over a ±6dB
input power range. LO input power greater than 6dBm
may cause conduction of the internal ESD diodes. Series
capacitors C3 and C4 optimize the input match and provide
DC blocking.
T1
C10
R1
(OPTION TO
REDUCE
DC POWER)
IFBIAS
The LO1 input impedance and input reflection coefficient,
versus frequency, is shown in Table 3. The LO2 port
is identical due to the symmetric device layout and
packaging.
IFOUT
4:1
20
L1
L2
VCCIF
100mA L3 (OR SHORT)
C8
19
IF+
IF –
18
16
IFGND
VCC
IF
AMP
4mA
Table 3. LO1 Input Impedance vs Frequency
(at Pin 11, No External Matching, LOSEL = Low)
LTC5541
BIAS
S11
FREQUENCY
(GHz)
INPUT
IMPEDANCE
MAG
ANGLE
1.0
55.1 – j21.8
0.209
–65.2
1.2
34.5 – j11.4
0.225
–135.9
1.4
29.5 – j1.2
0.257
–176.1
1.6
29.6 + j6.3
0.267
+158.2
1.8
31.6 + j10.9
0.261
+141.5
2.0
33.5 + j13.7
0.255
+130.7
2.2
35.2 + j16.1
0.253
+121.6
2.4
36.9 + j17.8
0.251
+114.4
2.6
38.0 + j18.9
0.250
+110.0
2.8
38.3 + j19.5
0.254
+108.3
3.0
37.3 + j20.4
0.270
+108.5
IF Output
The IF amplifier, shown in Figure 7, has differential opencollector outputs (IF+ and IF –), a DC ground return pin
(IFGND), and a pin for modifying the internal bias (IFBIAS).
The IF outputs must be biased at the supply voltage (VCCIF),
which is applied through matching inductors L1 and L2.
Alternatively, the IF outputs can be biased through the
center tap of a transformer. Each IF output pin draws
approximately 50mA of DC supply current (100mA total).
IFGND (pin 16) must be grounded or the amplifier will not
draw DC current. Grounding through inductor L3 may
improve LO-IF and RF-IF leakage performance in some
applications, but is otherwise not necessary. High DC
resistance in L3 will reduce the IF amplifier supply current,
which will degrade RF performance.
5541 F07
Figure 7. IF Amplifier Schematic with Bandpass Match
transformer or discrete IF balun circuit. The evaluation
board (see Figures 1 and 2) uses a 4:1 ratio IF transformer
for impedance transformation and differential to singleended transformation. It is also possible to eliminate the
IF transformer and drive differential filters or amplifiers
directly.
The IF output impedance can be modeled as 300Ω in
parallel with 2.3pF at IF frequencies. An equivalent smallsignal model (including bondwire inductance) is shown in
Figure 8. Frequency-dependent differential IF output
impedance is listed in Table 4. This data is referenced
to the package pins (with no external components) and
includes the effects of IC and package parasitics.
19
18
IF+
0.9nH
IF –
0.9nH
RIF
CIF
LTC5541
5541 F08
Figure 8. IF Output Small-Signal Model
For optimum single-ended performance, the differential
IF outputs must be combined through an external IF
5541f
12
LTC5541
APPLICATIONS INFORMATION
Bandpass IF Matching
4:1
VCCIF
3.1-5.3V
The IF output can be matched for IF frequencies as low
as 90MHz or as high as 500MHz using the bandpass
IF matching shown in Figure 1 and Figure 7. L1 and L2
resonate with the internal IF output capacitance at the
desired IF frequency. The value of L1, L2 is calculated
as follows:
IFOUT
50Ω
T1
C9
C8
L1
19
L2
18
IF +
IF –
LTC5541
L1, L2 = 1/[(2 π fIF)2 • 2 • CIF]
5541 F09
Figure 9. IF Output with Lowpass Matching
where CIF is the internal IF capacitance (listed in Table 4).
Values of L1 and L2 are tabulated in Figure 1 for various IF
frequencies. For IF frequencies below 90MHz, the values of
L1, L2 become unreasonably high and the lowpass topology
shown in Figure 9 is preferred. Measured IF output return
loss for bandpass IF matching is plotted in Figure 10.
0
RETURN LOSS (dB)
–5
Table 4. IF Output Impedance vs Frequency
FREQUENCY (MHz)
DIFFERENTIAL OUTPUT
IMPEDANCE (RIF || XIF (CIF))
90
329 || –j769 (2.3pF)
140
314 || –j494 (2.3pF)
190
305 || –j364 (2.3pF)
240
310 || –j288 (2.3pF)
300
303 || –j226 (2.35pF)
380
289 || –j175 (2.4pF)
500
273 || –j118 (2.7pF)
Lowpass IF Matching
An alternative IF matching network shown in Figure 9 uses
a lowpass topology, which provides excellent RF to IF
and LO to IF isolation. VCCIF is supplied through the
center tap of the 4:1 transformer. Similar to the bandpass
topology, L1 and L2 cancel out the reactive part of the
internal capacitance and the impedance transformation is
realized by the 4:1 transformer. This topology is preferred
for low IF frequencies since L1 and L2 may be replaced
with shorts. The LTC5541 demo board (see Figure 2) has
been laid out to accommodate this matching topology
with very few modifications.
–10
L1, L2 = 100nH
–15
L1, L2 = 270nH
L1, L2 = 150nH
–20
50
100 150 200 250 300 350 400 450
IF FREQUENCY (MHz)
5541 F10
Figure 10. IF Output Return Loss
IF Amplifier Bias
The IF amplifier delivers excellent performance with
VCCIF = 3.3V, which allows the VCC and VCCIF supplies
to be common. With VCCIF increased to 5V, the RF input
P1dB increases by approximately 3dB, at the expense of
higher power consumption. Mixer performance at 1950MHz
is shown in Table 5 with VCCIF = 3.3V and 5V. For the
highest conversion gain, high-Q wire-wound chip inductors
are recommended for L1 and L2, especially when using
VCCIF = 3.3V. Low-cost multilayer chip inductors may be
substituted, with a slight reduction in conversion gain.
Table 5. Performance Comparison with VCCIF = 3.3V and 5V
(RF = 1950MHz, Low-Side LO, IF = 190MHz)
VCCIF
ICCIF
(mA)
GC
(dB)
P1dB
(dBm)
IIP3
(dBm)
NF
(dB)
3.3V
100
7.8
11.3
26.4
9.6
5V
102
7.7
14.6
27.3
9.7
5541f
13
LTC5541
APPLICATIONS INFORMATION
The IFBIAS pin (pin 20) is available for reducing the DC
current consumption of the IF amplifier, at the expense of
IIP3. This pin should be left open-circuited for optimum
performance. The internal bias circuit produces a 4mA
reference for the IF amplifier, which causes the amplifier
to draw approximately 100mA. If resistor R1 is connected
to pin 20 as shown in Figure 7, a portion of the reference
current can be shunted to ground, resulting in reduced
IF amplifier current. For example, R1 = 1kΩ will shunt
away 1.5mA from pin 20 and the IF amplifier current will
be reduced by 38% to approximately 62mA. The nominal,
open-circuit DC voltage at pin 20 is 2.1V. Table 6 lists RF
performance at 1950MHz versus IF amplifier current.
The SHDN pin must be pulled high or low. If left floating,
then the on/off state of the IC will be indeterminate. If a
three-state condition can exist at the SHDN pin, then a
pull-up or pull-down resistor must be used.
LTC5541
VCC2
6
SHDN
500Ω
5
Table 6. Mixer Performance with Reduced IF Amplifier Current
(RF = 1950MHz, Low-Side LO, IF = 190MHz)
VCCIF =3.3V
R1
(kΩ)
ICCIF
(mA)
GC
(dB)
IIP3
(dBm)
P1dB
(dBm)
NF
(dB)
OPEN
100
7.8
26.4
11.4
9.6
4.7
90
7.5
26.0
11.6
9.6
2.2
81
7.4
25.3
11.7
9.5
1
62
6.9
23.4
11.7
9.7
R1
(kΩ)
ICCIF
(mA)
GC
(dB)
IIP3
(dBm)
P1dB
(dBm)
NF
(dB)
OPEN
102
7.7
27.3
14.6
9.7
4.7
92
7.5
27.2
14.7
9.6
5541 F11
Figure 11. Shutdown Input Circuit
VCCIF = 5V
2.2
83
7.2
26.5
14.8
9.6
1
65
6.7
24.7
14.0
9.7
Shutdown Interface
Supply Voltage Ramping
Fast ramping of the supply voltage can cause a current
glitch in the internal ESD protection circuits. Depending on
the supply inductance, this could result in a supply voltage
transient that exceeds the maximum rating. A supply voltage
ramp time of greater than 1ms is recommended.
Figure 11 shows a simplified schematic of the SHDN pin
interface. To disable the chip, the SHDN voltage must be
higher than 3.0V. If the shutdown function is not required,
the SHDN pin should be connected directly to GND. The
voltage at the SHDN pin should never exceed the power
supply voltage (VCC) by more than 0.3V. If this should
occur, the supply current could be sourced through the
ESD diode, potentially damaging the IC.
5541f
14
LTC5541
PACKAGE DESCRIPTION
UH Package
20-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1818 Rev Ø)
0.70 p0.05
5.50 p 0.05
4.10 p 0.05
2.60 REF
2.70 p 0.05
2.70 p 0.05
PACKAGE
OUTLINE
0.25 p0.05
0.65 BSC
PIN 1 NOTCH
R = 0.30 TYP
OR 0.35 s 45o
CHAMFER
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.75 p 0.05
5.00 p 0.10
R = 0.05
TYP
R = 0.125
TYP
19 20
0.40 p 0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
2.70 p 0.10
5.00 p 0.10
2.60 REF
2.70 p 0.10
(UH20) QFN 0208 REV Ø
0.200 REF
0.00 – 0.05
0.25 p 0.05
0.65 BSC
NOTE:
BOTTOM VIEW—EXPOSED PAD
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
5541f
15
LTC5541
TYPICAL APPLICATION
Wideband Receiver
190MHz
SAW
1nF
VCCIF
3.3V or 5V
1μF
22pF
IF
AMP
1nF
150nH
150nH
8.8
ADC
IF –
RF
1920MHz
TO
1980MHz
LO2
LTC5541
IF
RF
LNA
SYNTH 2
ALTERNATE LO FOR
FREQUENCY-HOPPING
LO
22pF
SHDN
(0V/3.3V)
BIAS
SHDN
VCC2
VCC 3.3V
1μF
VCC1
22pF
LO1
LOSEL
VCC3
LO SELECT
(0V/3.3V)
SYNTH 1
LO
1760MHz
GC (dB)
22pF
IMAGE
BPF 2.2pF
28
8.6
IIP3
RF = 1950 ±30MHz
8.4 LO = 1760MHz
P = 0dBm
8.2 LO
TEST CIRCUIT IN FIGURE 1
8.0
7.8
26
24
22
20
18
GC
7.6
16
7.4
14
7.2
12
7.0
6.8
160
IIP3 (dBm), SSB NF (dB)
IF+
Wideband Conversion Gain, IIP3
and NF vs IF Output Frequency
190MHz
BPF
10
NF
190
200
170
180
210
IF OUTPUT FREQUENCY (MHz)
5541 TA03
8
220
5541 TA04
RELATED PARTS
PART NUMBER
Infrastructure
LT5527
LTC6400-X
LTC6401-X
LTC6416
LTC6412
LT5554
LT5557
DESCRIPTION
COMMENTS
400MHz to 3.7GHz,
5V Downconverting Mixer
300MHz Low Distortion IF Amp/ADC Driver
140MHz Low Distortion IF Amp/ADC Driver
2GHz 16-Bit ADC Buffer
31dB Linear Analog VGA
Ultralow Distort IF Digital VGA
400MHz to 3.8GHz 3.3V Downconverting Mixer
2.3dB Conversion Gain, 23.5dBm IIP3 and 12.5dB NF at 1900MHz,
5V/78mA Supply
Fixed Gain of 8dB, 14dB, 20dB and 26dB; >36dBm OIP3 at 300MHz, Differential I/O
Fixed Gain of 8dB, 14dB, 20dB and 26dB; >40dBm OIP3 at 140MHz, Differential I/O
40.25dBm OIP3 to 300MHz, Programmable Fast Recovery Output Clamping
35dBm OIP3 at 240MHz, Continuous Gain Range –14dB to 17dB
48dBm OIP3 at 200MHz, 2dB to 18dB Gain Range, 0.125dB Gain Steps
2.9dB Conversion Gain, 24.7dBm IIP3 and 11.7dB NF at 1950MHz,
3.3V/82mA Supply
Integrated Baluns, 28dBm IIP3, 13dBm P1dB, 0.03dB I/Q Amplitude Match,
0.4° Phase Match
27dBm OIP3 at 900MHz, 24.2dBm at 1.95GHz, Integrated RF Transformer
LT5575
700MHz to 2.7GHz Direct Conversion I/Q
Demodulator
LT5578
400MHz to 2.7GHz High Linearty Upconverting
Mixer
LT5579
1.5GHz to 3.8GHz High Linearity Upconverting
Mixer
LTC5598
5MHz to 1.6GHz I/Q Modulator
RF Power Detectors
LT5534
50MHz to 3GHz Log RF Power Detector with
60dB Dynamic Range
LT5537
Wide Dynamic Range Log RF/IF Detector
LT5570
2.7GHz Mean-Squared Detector
LT5581
ADCs
LTC2208
LTC2262-14
LTC2242-12
6GHz Low Power RMS Detector
16-Bit, 130Msps ADC
14-Bit, 150Msps ADC Ultralow Power at 1.8V
Supply
12-Bit, 250Msps ADC
27.3dBm OIP3 at 2.14GHz, NF = 9.9dB, 3.3V Supply, Single-Ended LO and RF Ports
27.7dBm OIP3 at 140MHz, 22.9dBm at 900MHz, –161.2dBm/Hz Noise Floor
±1dB Output Variation over Temperature, 38ns Response Time, Log Linear
Response
Low Frequency to 1GHz, 83dB Log Linear Dynamic Range
±0.5dB Accuracy Over Temperature and >50dB Dynamic Range, Fast 500ns
Rise Time
40dB Dynamic Range, ±1dB Accuracy Over Temperature, 1.5mA Supply Current
78dBFS Noise Floor, >83dB SFDR at 250MHz
72.8dB SNR, 88dB SFDR, 149mW Power Consumption
65.4dB SNR, 78dB SFDR, 740mW Power Consumption
5541f
16 Linear Technology Corporation
LT 1209 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2009