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EE70 Review Electrical Current dq (t ) i (t ) dt t q (t ) i (t )dt q (t0 ) t0 Circuit Elements An electrical circuit consists of circuit elements such as voltage sources, resistances, inductances and capacitances that are connected in closed paths by conductors Reference Directions The voltage vab has a reference polarity that is positive at point a and negative at point b. Reference Directions Reference Directions “uphill: battery” “downhill: resistor” Energy is transferred when charge flows through an element having a voltage across it. Power and Energy p(t ) v(t )i (t ) Watts t2 w p(t )dt t1 Joules Reference Direction Current is flowing in the passive configuration • If current flows in the passive configuration the power is given by p = vi • If the current flows opposite to the passive configuration, the power is given by p = -vi Dependent Sources Resistors and Ohm’s Law a b v iR vab iab R The units of resistance are Volts/Amp which are called “ohms”. The symbol for ohms is omega: Resistance Related to Physical Parameters R L A is the resistivity of the material used to fabricate the resistor. The units of resitivity are ohm-meters (-m) Power dissipation in a resistor 2 v p vi Ri R 2 Kircohoff’s Current Law (KCL) • The net current entering a node is zero • Alternatively, the sum of the currents entering a node equals the sum of the currents leaving a node Kircohoff’s Current Law (KCL) Series Connection ia ib i c Kircohoff’s Voltage Law (KVL) The algebraic sum of the voltages equals zero for any closed path (loop) in an electrical circuit. Kircohoff’s Voltage Law (KVL) Parallel Connection KVL through A and B: -va+vb = 0 va = vb KVL through A and C: -va - vc = 0 va = -vc Equivalent Series Resistance v v1 v2 v3 iR1 iR2 iR3 i( R1 R2 R3 ) iReq Equivalent Parallel Resistance 1 v v v 1 1 v i i1 i2 i3 v R1 R2 R3 R1 R2 R3 Req Circuit Analysis using Series/Parallel Equivalents 1. Begin by locating a combination of resistances that are in series or parallel. Often the place to start is farthest from the source. 2. Redraw the circuit with the equivalent resistance for the combination found in step 1. Voltage Division R1 v1 R1i v total R1 R2 R3 R2 v2 R2 i v total R1 R2 R3 Of the total voltage, the fraction that appears across a given resistance in a series circuit is the ratio of the given resistance to the total series resistance. Current Division R2 v i1 itotal R1 R1 R2 R1 v i2 itotal R2 R1 R2 For two resistances in parallel, the fraction of the total current flowing in a resistance is the ratio of the other resistance to the sum of the two resistances. Node Voltage Analysis Node Voltage Analysis v1 v s v2 v1 v2 v2 v3 0 R2 R4 R3 v3 v1 v3 v3 v2 0 R1 R5 R3 Mesh Current Analysis Mesh Current Analysis Thévenin Equivalent Circuits Thévenin Equivalent Circuits Vt voc Thévenin Equivalent Circuits Vt isc Rt Thévenin Equivalent Circuits voc Rt isc Thévenin Equivalent Circuits Norton Equivalent Circuits Norton Equivalent Circuits I n isc Source Transformations Maximum Power Transfer Vt IL Rt RL PL iL2 RL Vt Rt RL 2 RL dPL 0 RL Rt dRL Superposition Principle The superposition principle states that the total response is the sum of the responses to each of the independent sources acting individually. In equation form, this is rT r1 r2 rn Superposition Principle Superposition Principle Current source open circuit R2 5 v1 vs 15V 5V R1 R2 5 10 Superposition Principle Voltage source short circuit v2 is Req Req R1 R2 (10 )(5) is (2 A) (2 A)(3.33) 6.66V R1 R2 10 5 vT v1 v2 5V 6.66V 11 .66V Voltage-Amplifier Model The input resistance Ri is the equivalent resistance see when looking into the input terminals of the amplifier. Ro is the output resistance. Avoc is the open circuit voltage gain. Voltage Gain Ideally, an amplifier produces an output signal with identical waveshape as the input signal, but with a larger amplitude. vo t Av vi t Current Gain io Ai ii io vo RL Ri Ai Av ii vi Ri RL Power Gain Po G Pi Po Vo I o 2 Ri G Av Ai Av Pi Vi I i RL Operational Amplifier Summing Point Constraint Operational amplifiers are almost always used with negative feedback, in which part of the output signal is returned to the input in opposition to the source signal. Summing Point Constraint In a negative feedback system, the ideal opamp output voltage attains the value needed to force the differential input voltage and input current to zero. We call this fact the summing-point constraint. Summing Point Constraint 1. Verify that negative feedback is present. 2. Assume that the differential input voltage and the input current of the op amp are forced to zero. (This is the summing-point constraint.) 3. Apply standard circuit-analysis principles, such as Kirchhoff’s laws and Ohm’s law, to solve for the quantities of interest. The Basic Inverter Applying the Summing Point Constraint Inverting Amplifier vo R2 Av vin R1 Summing Amplifier Non-inverting Amplifiers vo R2 Av 1 vin R1 Voltage Follower vo R2 0 A v 1 1 1 vin R1 Capacitance q C v qt q v C t it dt qt 0 t0 t 1 v t i t dt v t0 C t0 Capacitances in Parallel Capacitances in Series 1 1 1 1 Ceq C1 C 2 C3 Inductance Inductance The polarity of the voltage is such as to oppose the change in current (Lenz’s law). Series Inductances Leq L1 L2 L3 Parallel Inductances 1 1 Leq L1 L2 L3 Mutual Inductance Fields are aiding Fields are opposing Magnetic flux produced by one coil links the other coil Discharge of a Capacitance through a Resistance iC iR KCL at the top node of the circuit: q dq dv C q Cv iC C v dt dt vC (t ) iR R dvC t vC t C 0 dt R dvC t RC vC t 0 dt Discharge of a Capacitance through a Resistance dvC t RC vC t 0 dt dvC t 1 vC t dt RC We need a function vC(t) that has the same form as it’s derivative. vC t Ke st Substituting this in for vc(t) RCKse Ke 0 st st Discharge of a Capacitance through a Resistance 1 Solving for s: s RC Substituting into vc(t): Initial Condition: vC 0 Vi vC t Ke t RC Full Solution: vC t Vi e t RC Discharge of a Capacitance through a Resistance vC t Ke t RC To find the unknown constant K, we need to use the boundary conditions at t=0. At t=0 the capacitor is initially charged to a voltage Vi and then discharges through the resistor. vC 0 Vi vC t Vi e t RC Discharge of a Capacitance through a Resistance Charging a Capacitance from a DC Source through a Resistance Charging a Capacitance from a DC Source through a Resistance KCL at the node that joins the resistor and the capacitor dvC (t ) vC (t ) VS C 0 dt R Current into the dvc capacitor: C dt Current through the resistor: vC (t ) VS R Charging a Capacitance from a DC Source through a Resistance dvC (t ) vC (t ) VS C 0 dt R Rearranging: dvC (t ) RC vC (t ) VS dt This is a linear first-order differential equation with contant coefficients. Charging a Capacitance from a DC Source through a Resistance The boundary conditions are given by the fact that the voltage across the capacitance cannot change instantaneously: vC (0) vC (0) 0 Charging a Capacitance from a DC Source through a Resistance Try the solution: vC (t ) K1 K 2e st Substituting into the differential equation: Gives: dvC (t ) RC vC (t ) VS dt (1 RCs) K 2e st K1 VS Charging a Capacitance from a DC Source through a Resistance (1 RCs) K 2e K1 VS st For equality, the coefficient of est must be zero: 1 1 RCs 0 s RC Which gives K1=VS Charging a Capacitance from a DC Source through a Resistance Substituting in for K1 and s: vC (t ) K1 K 2e st VS K 2e t / RC Evaluating at t=0 and remembering that vC(0+)=0 vC (0) VS K 2e0 VS K 2 0 K 2 Vs Substituting in for K2 gives: vC (t ) K1 K 2e st VS VS e t / RC Charging a Capacitance from a DC Source through a Resistance vC t Vs Vs e t DC Steady State dvC (t ) iC (t ) C dt In steady state, the voltage is constant, so the current through the capacitor is zero, so it behaves as an open circuit. DC Steady State diL (t ) v L (t ) L dt In steady state, the current is constant, so the voltage across and inductor is zero, so it behaves as a short circuit. DC Steady State The steps in determining the forced response for RLC circuits with dc sources are: 1. Replace capacitances with open circuits. 2. Replace inductances with short circuits. 3. Solve the remaining circuit. RL Transient Analysis VS i(t ) R v(t ) 0 di (t ) i(t ) R L VS dt RL Transient Analysis i (t ) R L di (t ) VS dt di(t ) i (t ) R L VS dt Try i(t ) K1 K 2e st Try i(t ) K1 K 2e st RK 1 ( RK 2 sLK 2 )e VS st VS 100V RK 1 VS K1 2A R 50 L RK 2 sLK 2 0 s R RC and RL Circuits with General Sources First order differential equation with constant coefficients di (t ) L Ri (t ) vt (t ) dt vt (t ) L di(t ) i (t ) R dt R dx(t ) Forcing x(t ) f (t ) function dt RC and RL Circuits with General Sources The general solution consists of two parts. The particular solution (also called the forced response) is any expression that satisfies the equation. dx(t ) x(t ) f (t ) dt In order to have a solution that satisfies the initial conditions, we must add the complementary solution to the particular solution. The homogeneous equation is obtained by setting the forcing function to zero. dx(t ) x(t ) 0 dt The complementary solution (also called the natural response) is obtained by solving the homogeneous equation. Integrators and Differentiators Integrators produce output voltages that are proportional to the running time integral of the input voltages. In a running time integral, the upper limit of integration is t . 1 vo t RC t 0 vin t dt Differentiator Circuit dvin vo t RC dt Second–Order Circuits di t 1 L Ri t i t dt vC 0 vs t dt C0 t Differentiating with respect to time: 2 L d i(t ) dt 2 dvs (t ) di(t ) 1 R i(t ) dt C dt Second–Order Circuits d 2i(t ) dt Define: 2 R di(t ) 1 1 dvs (t ) i(t ) L dt LC L dt R 2L 0 1 LC Dampening coefficient Undamped resonant frequency 1 dvs (t ) f (t ) Forcing function L dt 2 d i(t ) dt 2 di(t ) 2 2 0 i(t ) f (t ) dt Solution of the Second-Order Equation Particular solution d it dit 2 2 i t f t 0 2 dt dt Complementary solution 2 d it 2 dt 2 dit 2 2 0 it 0 dt Solution of the Complementary Equation d it 2 dt 2 dit 2 02it 0 dt Try iC (t ) Ke st : s 2 Ke st 2sKe st 02 Ke st 0 Factoring : ( s 2 2s 02 ) Ke st 0 Characteristic equation: s 2 2s 02 0 Solution of the Complementary Equation Roots of the characteristic equation: s1 2 s2 2 0 2 0 2 0 Dampening ratio 1. Overdamped case (ζ > 1). If ζ > 1 (or equivalently, if α > ω0), the roots of the characteristic equation are real and distinct. Then the complementary solution is: ic t K1e s1t K 2e s 2t In this case, we say that the circuit is overdamped. 2. Critically damped case (ζ = 1). If ζ = 1 (or equivalently, if α = ω0 ), the roots are real and equal. Then the complementary solution is ic t K1e s1t K 2te s1t In this case, we say that the circuit is critically damped. 3. Underdamped case (ζ < 1). Finally, if ζ < 1 (or equivalently, if α < ω0), the roots are complex. (By the term complex, we mean that the roots involve the square root of –1.) In other words, the roots are of the form: s1 jn and s2 jn in which j is the square root of -1 and the natural frequency is given by: n 2 0 2 For complex roots, the complementary solution is of the form: ic t K1e t cosnt K 2e t sinnt In this case, we say that the circuit is underdamped. Circuits with Parallel L and C V iR R t 1 dq dv iL vdt i L (0) ic C L dt dt 0 We can replace the circuit with it’s Norton equivalent and then analyze the circuit by writing KCL at the top node: t C dv(t ) 1 1 v(t ) v(t )dt i L (0) in (t ) dt R L 0 Circuits with Parallel L and C t dv(t ) 1 1 C v(t ) v(t )dt iL (0) in (t ) dt R L 0 differentiating : din (t ) d 2 v(t ) 1 dv(t ) 1 C v(t ) dt R dt L dt d 2 v(t ) 1 dv(t ) 1 1 din (t ) v(t ) dt RC dt LC C dt Circuits with Parallel L and C d 2 v(t ) 1 dv(t ) 1 1 din (t ) v(t ) dt RC dt LC C dt 1 Dampening coefficient 2 RC 1 Undamped resonant frequency 0 LC 1 din (t ) Forcing function f (t ) C dt d 2 v(t ) dv(t ) 2 2 0 v(t ) f (t ) dt dt Circuits with Parallel L and C d 2 v(t ) dv(t ) 2 02 v(t ) f (t ) dt dt This is the same equation as we found for the series LC circuit with the following changes for : 1 Parallel circuit 2 RC R Series circuit 2L Complex Impedances-Inductor VL jL I L Z L jL L90 VL Z L I L Complex Impedances-Inductor Complex Impedances-Capacitor VC Z C I C 1 1 1 ZC j 90 C jC C VR RI R Complex Impedances-Capacitor Impedances-Resistor VR RI R Impedances-Resistor Kirchhoff’s Laws in Phasor Form We can apply KVL directly to phasors. The sum of the phasor voltages equals zero for any closed path. V1 V2 V3 0 The sum of the phasor currents entering a node must equal the sum of the phasor currents leaving. I in I out Power in AC Circuits V Vm 0 I I m Z Z Vm where I m Z For >0 the load is called “inductive” since Z=jL for an inductor For <0 the load is “capacitive” since Z=-j/C for a capacitor Load Impedance in the Complex Plane Z Z R jX R cos( ) Z X sin( ) Z Power for a General Load If the phase angle for the voltage is not zero, we define the power angle : Power angle: voltage current P Vrms I rms cos( ) PF cos( ) AC Power Calculations Average Power: P Vrms I rms cos W Reactive Power: Q Vrms I rms sin VAR Apparent Power: VRMS I RMS VA Power Triangles Average power P Q Vrms I rms 2 Average power 2 2 Reactive power Apparent power Thevenin Equivalent Circuits The Thevenin equivalent for an ac circuit consists of a phasor voltage source Vt in series with a complex impedance Zt Thevenin Equivalent Circuits The Thévenin voltage is equal to the open-circuit phasor voltage of the original circuit. Vt Voc We can find the Thévenin impedance by zeroing the independent sources and determining the impedance looking into the circuit terminals. Thevenin Equivalent Circuits The Thévenin impedance equals the open-circuit voltage divided by the short-circuit current. Voc Vt Z t I sc I sc Norton Equivalent Circuit The Norton equivalent for an ac circuit consists of a phasor current source In in parallel with a complex impedance Zt I n I sc Maximum Average Power Transfer The Thevenin equivalent of a two-terminal circuit delivering power to a load impedance. Maximum Average Power Transfer If the load can take on any complex value, maximum power transfer is attained for a load impedance equal to the complex conjugate of the Thévenin impedance. If the load is required to be a pure resistance, maximum power transfer is attained for a load resistance equal to the magnitude of the Thévenin impedance. Transfer Functions The transfer function H(f ) of the two-port filter is defined to be the ratio of the phasor output voltage to the phasor input voltage as a function of frequency: Vout Hf Vin First-Order Low Pass Filter Vin I 1 R j 2fC 1 Vin 1 Vout I j 2fC j 2fC R 1 j 2 fC V 1 1 H ( f ) out Vin 1 j 2fRC 1 j ( f / f B ) fB 1 2RC Half power frequency First-Order Low Pass Filter 1 H f 1 j f f B H f 1 1 f fB 2 10 1 f fB 2 f arctan fB f H f arctan fB First-Order Low Pass Filter For low frequency signals the magnitude of the transfer function is unity and the phase is 0. Low frequency signals are passed while high frequency signals are attenuated and phase shifted. Magnitude Bode Plot for First-Order Low Pass Filter 1. A horizontal line at zero for f < fB /10. 2. A sloping line from zero phase at fB /10 to –90° at 10fB. 3. A horizontal line at –90° for f > 10fB. First-Order High-Pass Filter Vout Vout Vin R Vin 1 R j 2fC j( f / f B ) 1 j( f / f B ) 1 1 1 j 2fRC j 2fRC Vin Vin j 2fRC 1 1 where f B 2fRC First-Order High-Pass Filter Vout j f f B f f B 90 Hf Vin 1 j f f B 1 f f B 2 arctan f f B Hf f fB 1 f f B 2 90 H f 90 arctan f f B arctan f f B First-Order High-Pass Filter H f f fB 1 f f B 2 H f 90 arctan f f B Bode Plots for the First-Order HighPass Filter H f 20 log( f f B ) 10 log 1 f f B 2 For f f B H f 20 log( f f B ) For f f B H f 20 log( f f B ) For f f B H f 20 log( f f B ) 10 log f f B 2 0 For f f B H f 20 log( f f B ) 10 log f f B 2 0 f H f 90 arctan fB For f f B H f 90 For f f B H f 0 Series Resonance Z s ( f ) j 2fL R j 1 2fC resonanceof : the inductor and the capacitor cancel: For resonance For the reactance 1 1 2 2f 0 L f0 2f 0 C (2 ) 2 LC 1 f0 2 LC Series Resonance Quality factor QS Qs Substitute L Qs Reactance of inductanceat resonance Resistance 2f 0 L R 1 1 from f 0 2 2 (2 ) ( f 0 ) C 2 LC 1 2f 0 CR Series Resonant Band-Pass Filter Vs I Zs ( f ) Vs / R f f0 1 jQ s f f0 Vs V 1 VR RI R Vs f f f0 f0 1 jQ s 1 jQ s f f f0 f0 Series Resonant Band-Pass Filter VR 1 Vs 1 jQs f f 0 f 0 f Parallel Resonance 1 Zp 1 R j 2fC j 1 2fL At resonance ZP is purely resistive: j 2f 0C j 1 2f 0 L f 0 1 2 LC Parallel Resonance Quality factor QP Resistance QP Reactance of inductanceat resonance R 2f 0 L Substitute L 1 (2 ) ( f 0 ) C 2 QP 2f 0CR 2 from f 0 1 2 LC Parallel Resonance Vout IR IZ P f f0 1 jQ P f f0 Vout for constant current, varying the frequency Second Order Low-Pass Filter j 2fC Vout j ZC 2fRC Vin Vin Vin j Z R Z L ZC 2f 0 L f 1 R j 2fL 1 j 2fC R f 0 2ff 0 LC Vout Vin j jQ S ( f / f 0 ) 2fRC H( f ) f 2f 0 L f f 1 1 jQ S 0 1 j R f 0 2ff 0 LC f f0 Second Order Low-Pass Filter Vout jQ s f 0 f Hf Vin 1 jQ s f f 0 f 0 f Qs f 0 f 90 2 1 QS Hf f f 0 f 0 f Tan Qs f f 0 f 0 f 1 2 Qs f 0 f 2 1 QS f f0 f0 f 2 Second Order Low-Pass Filter Second Order High-Pass Filter At low frequency the capacitor is an open circuit At high frequency the capacitor is a short and the inductor is open Second Order Band-Pass Filter At low frequency the capacitor is an open circuit At high frequency the inductor is an open circuit Second Order Band-Reject Filter At low frequency the capacitor is an open circuit At high frequency the inductor is an open circuit First-Order Low-Pass Filter Zf Vo H( f ) Vi Zi 1 1 Zf Rf Zf j 2fR f C f 1 1 1 Rf Rf j 2fC f Rf 1 j 2fR f C f Rf 1 H( f ) Zi Ri 1 j 2fR f C f R f 1 1 j( f / f ) R B i 1 fB 2R f C f Zf A low-pass filter with a dc gain of -Rf/Ri First-Order High-Pass Filter Zf vo H( f ) vi Zi Z i Ri H( f ) Zf Zi 1 j 2 f Ci Z f Rf Rf Ri j 2 f R f Ci 1 j 2 f Ci R i 1 j 2 f Ri Ci Ri R f j ( f / f B ) 1 j( f / f ) R i B 1 fB 2 Ri Ci j 2 f R f Ci 1 j 2 f R C i i A high-pass filter with a high frequency gain of -Rf/Ri Flux Linkages and Faraday’s Law Magnetic flux passing through a surface area A: B dA A For a constant magnetic flux density perpendicular to the surface: BA The flux linking a coil with N turns: N Faraday’s Law Faraday’s law of magnetic induction: d e dt The voltage induced in a coil whenever its flux linkages are changing. Changes occur from: • Magnetic field changing in time • Coil moving relative to magnetic field Lenz’s Law Lenz’s law states that the polarity of the induced voltage is such that the voltage would produce a current (through an external resistance) that opposes the original change in flux linkages. Lenz’s Law Magnetic Field Intensity and Ampère’s Law B H H Magnetic field intensity 0 4 10 7 Wb Am r Relative permeability 0 Ampère’s Law: H dl i Ampère’s Law The line integral of the magnetic field intensity around a closed path is equal to the sum of the currents flowing through the surface bounded by the path. Magnetic Field Intensity and Ampère’s Law H dl Hdl cos( ) dot product If the magnetic field H has a constant magnitude and points in the same direction as the incremental length dl Hl i Magnetic Circuits In many engineering applications, we need to compute the magnetic fields for structures that lack sufficient symmetry for straight-forward application of Ampère’s law. Then, we use an approximate method known as magnetic-circuit analysis. magnetomotive force (mmf) of an N-turn current-carrying coil F NI Analog: Voltage (emf) reluctance of a path for magnetic flux R A Analog: Resistance F R Analog: Ohm’s Law Magnetic Circuit for Toroidal Coil l 2R A r 2 1 l 1 2R 1 2 R R 2 2 A r r F NI F Nr I R 2R 2 A Magnetic Circuit with Reluctances in Series and Parallel A Magnetic Circuit with Reluctances in Series and Parallel Rtotal Rc 1 1 1 Ra Rb Ni c Rtotal a Rb c Ra Rb b Ra c Ra Rb Ba Ba a Aa a Aa (current divider) Mutual Inductance Self inductance for coil 1 Self inductance for coil 2 11 L1 i1 11 i1 L2 Mutual inductance between coils 1 and 2: M 21 i1 21 i1 12 i2 12 i2 2 2 i2 22 i2 Mutual Inductance Total fluxes linking the coils: 1 11 12 2 22 21 Mutual Inductance Currents entering the dotted terminals produce aiding fluxes Circuit Equations for Mutual Inductance 1 L1i1 Mi2 2 Mi1 L2i2 d1 di1 di2 e1 L1 M dt dt dt d2 di1 di2 e2 M L2 dt dt dt Ideal Transformers Ideal Transformers N2 v 2 t v1 t N1 N1 i2 (t ) i1 (t ) N2 p2 t p1 t Mechanical Analog d1 d2 N2 v2 t v1 t N1 l2 d 2 d1 l1 N1 i2 (t ) i1 (t ) N2 l1 F2 F1 l2 Impedance Transformations 2 V1 N 1 Z L Z L I1 N 2 Semiconductor Diode Shockley Equation vD iD I s exp nVT 1 vD iD I s exp nVT for v D VT kT VT 26 mV q iD I s for vD -VT until reaching reverse breakdown Load-Line Analysis of Diode Circuits VSS Ri D v D Assume VSS and R are known. Find iD and vD Load-Line Analysis of Diode Circuits VSS Ri D v D VSS Ri D v D Ideal Diode Model The ideal diode acts as a short circuit for forward currents and as an open circuit with reverse voltage applied. iD > 0 vD < 0 diode is in the “on” state vD < 0 ID = 0 diode is in the “off” state Assumed States for Analysis of Ideal-Diode Circuits 1. Assume a state for each diode, either on (i.e., a short circuit) or off (i.e., an open circuit). For n diodes there are 2n possible combinations of diode states. 2. Analyze the circuit to determine the current through the diodes assumed to be on and the voltage across the diodes assumed to be off. 3. Check to see if the result is consistent with the assumed state for each diode. Current must flow in the forward direction for diodes assumed to be on. Furthermore, the voltage across the diodes assumed to be off must be positive at the cathode (i.e., reverse bias). 4. If the results are consistent with the assumed states, the analysis is finished. Otherwise, return to step 1 and choose a different combination of diode states. Half-Wave Rectifier with Resistive Load The diode is on during the positive half of the cycle. The diode is off during the negative half of the cycle. Half-Wave Rectifier with Smoothing Capacitor The charge removed from the capacitor in one cycle: Q I LT VC Vr C Full-Wave Rectifier The capacitance required for a full-wave rectifier is given by: I LT C 2Vr Full-Wave Rectifier Clipper Circuit NPN Bipolar Junction Transistor Bias Conditions for PN Junctions The base emitter p-n junction of an npn transistor is normally forward biased The base collector p-n junction of an npn transistor is normally reverse biased Equations of Operation v BE iE I ES exp VT 1 From Kirchoff’s current law: iE iC iB Equations of Operation Define as the ratio of collector current to emitter current: iC iE Values for range from 0.9 to 0.999 with 0.99 being typical. Since: iE iC iB 0.99iE iB iB 0.01iE Most of the emitter current comes from the collector and very little (1%) from the base. Equations of Operation Define as the ratio of collector current to base current: iC iB 1 Values for range from about 10 to 1,000 with a common value being 100. iC iB The collector current is an amplified version of the base current. The base region is very thin Only a small fraction of the emitter current flows into the base provided that the collector-base junction is reverse biased and the base-emitter junction is forward biased. Common-Emitter Characteristics vBC vCE v BC v BE vCE if v CE v BE v BC 0 reverse bias Common-Emitter Input Characteristics vBE iB (1 ) I ES exp VT 1 Common-Emitter Output Characteristics iC iB for 100 Amplification by the BJT A small change in vBE results in a large change in iB if the base emitter is forward biased. Provided vCE is more than a few tenth’s of a volt, this change in iB results in a larger change in iC since iC=iB. Common-Emitter Amplifier Load-Line Analysis of a Common Emitter Amplifier (Input Circuit) VBB vin t RBiB t vBE t Load-Line Analysis of a Common Emitter Amplifier (Output Circuit) VCC RC iC vCE Inverting Amplifier As vin(t) goes positive, the load line moves upward and to the right, and the value of iB increases. This causes the operating point on the output to move upwards, decreasing vCE An increase in vin(t) results in a much larger decrease in vCE so that the common emitter amplifier is an inverting amplifier PNP Bipolar Junction Transistor Except for reversal of current directions and voltage polarities, the pnp BJT is almost identical to the npn BJT. PNP Bipolar Junction Transistor iC i E i B (1 )i E iC i B i E iC i B NMOS Transistor NMOS Transistor Operation in the Cutoff Region iD 0 for vGS Vto Operation Slightly Above Cut-Off By applying a positive bias between the Gate (G) and the body (B), electrons are attracted to the gate to form a conducting n-type channel between the source and drain. The positive charge on the gate and the negative charge in the channel form a capacitor where: Operation Slightly Above Cut-Off iDS W Lt ox (vGS Vto )v DS For small values of vDS, iD is proportional to vDS. The device behaves as a resistance whose value depends on vGS. Operation in the Triode Region iD C 2 2 vGS vto vDS vDS W KP C L 2 Load-Line Analysis of a Simple NMOS Circuit vGS (t ) vin (t ) 4V Load-Line Analysis of a Simple NMOS Circuit v DD RDiD t v DS t Load-Line Analysis of a Simple NMOS Circuit CMOS Inverter Two-Input CMOS NAND Gate Two-Input CMOS NOR Gate