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Chapter 2
Basic laws
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Some Basic Concepts
• Branch-----
A branch represents a single element such as a
voltage source or a resistor.
{But usually we think a branch as a path flowing the same current. So
maybe includes more than one element.}
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Some Basic Concepts
•Node-------A node is the
point of connection between two
or more branches
•Loop-------A loop is any
closed path in a circuit.
•Mesh------A mesh is a
loop which does not contain any
other loops within it.
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KIRCHHOFF’S LAWS
• Kirchhoff’s Current Law (KCL):
N
i
k 1
k
0
The algebraic sum of currents entering a
node (or a closed boundary) is zero.
(Based on the law of conservation of
charge)
The sum of the currents entering a node =
the sum of the currents leaving the node.
i1  i2  i3  i4  i5  0
or
i1  i3  i4  i2  i5
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i3
KCL also applies to a closed boundary.
i6
i4
i2
i7 i
i1 5
so i1  i2  i3  i6  i7  0
or i1  i2  i3  i4  i5  0
Note: 1) KCL is available to every node at anytime.
2) KCL is related only to the currents instead of the elements.
3) Pay attention to the current direction.
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KIRCHHOFF’S LAWS
• Kirchhoff’s Voltage Law (KVL):
The algebraic sum of all voltages around a closed path (or loop) is zero.
(Based on the principle of conservation of energy)
To illustrate KVL, consider the circuit :
V1
+V2R1
+V3R2
1k
1k
M
v
k 1
k
0
R3
V1-V2-V3+V4-V5=0 or
V2+V3+V5=V1+V4
1k
Sum of voltage drops=Sum of voltage rises
V4
-V5+
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TWO SORTS OF CONSTRAINTS
•
1.
Topological constraints
Determined by the way of connection among the elements.
(Such as KCL KVL)
2.
Element constraints
Determined by the elements.
(VAR)
Using two sorts of constraints, we can analysis any
lumped circuit (solve out all the voltages and currents).
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In a circuit with b branches and n nodes, there are 2b variables should be
valued. Then:
KCL for n nodes: only n-1 equations are independent.
KVL for loops: only b-n+1 equations are independent. (only KVL for
meshes)
VAR for branches: b equations.
So, (n-1)+(b-n+1)+b=2b, 2b equations to value 2b variables.
That is called 2b analysis.
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SERIES RESISTORS AND
VOLTAGE DIVISION
• As we know, Series-connected means that the same current flows in
them.
• The equivalent resistance of any number of resistors connected in
series is the sum of the individual resistances.
See illustration with 2 resistors:
v  v1  v2  R1i  R2i  Ri
 R  R1  R2
R is the equivalent resistance.
It can be applied to any number of resistors
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P  vi  v1i  v2i  R1i 2  R2i 2
 Ri 2  P1  P2
The equivalent power of any number of resistors connected
in series is the sum of the individual powers.
Concept of Equivalent:
Be equivalent to the outside, not the inside.
Principle of voltage division: if a voltage divider has N
resistors(R1,R2,…RN) in series with the source voltage v,
the nth resistor(Rn)will have a voltage drop of
Rn
vn 
v
R1  R2  ...  RN
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PARALLEL RESISTORS AND
CURRENT DIVISION
• As we know, Parallel-connected means that the same voltage covers
over them.
• The equivalent conductance of resistors connected in parallel is the
sum of their individual conductances.
See illustration with 2 resistors:
i  i1  i2  G1v  G2v  Gv
G
G
G  G1  G2
G is the equivalent conductance.
It can be applied to any number of resistors
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P  vi  vi1  vi2  G1v 2  G2v 2
 Gv2  P1  P2
The equivalent power of any number of resistors connected
in parallel is the sum of the individual powers.
Principle of current division
If a current divider has N conductors (G1,G2…GN) in
parallel with the source current i, the nth conductor (Gn)
will have current
Gn
in 
i
G1  G2  ...  GN
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MIXED CONNECTION AND ITS
EQUIVALENT RESISTANCE
Examples (we combine resistors in series and in parallel)
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WYE-DELTA TRANSFORMATIONS
Situations often arise in circuit analysis when the resistors
are neither in parallel nor in series.
d
e
R12=?
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WYE-DELTA TRANSFORMATIONS
Y
Rb Rc
R1 
Ra  Rb  Rc
R2 
Rc Ra
Ra  Rb  Rc
R3 
Ra Rb
Ra  Rb  Rc
Y
R1 R2  R2 R3  R3 R1
Ra 
R1
R1 R2  R2 R3  R3 R1
Rb 
R2
R1 R2  R2 R3  R3 R1
Rc 
R3
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So
2
d
e
1
3
Can you imagine another way of transformation?
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