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REFERENCE CIRCUITS
A reference circuit is an independent voltage or
current source which has a high degree of
precision and stability.
• Output voltage/current should be
independent of power supply.
• Output voltage/current should be
independent of temperature.
• Output voltage/current should be
independent of processing variations.
I-V curves of ideal references
Concept of Sensitivity
Let
Then:
y  f ( x1 , x2 , x3 )
f
f
f
y 
x1 
x2 
x3  
x1
x1
x1
y f x1 x1 f x2 x2 f x3 x3




y x1 y x1 x1 y x2 x1 y x3
y
y x1
y x2
y x3
 S x1
 S x2
 S x3

y
x1
x2
x3
y
S xi is called the sensitivity of y with respect to xi
Total percentage change in y =
Sensitivity w.r.t. x1 * percentage
change in x1
+ Sensitivity w.r.t. x2 * percentage
change in x2
+ ……
Goal: Design reference circuits so that
the reference’s sensitivities w.r.t.
various variations are minimized.
Types of commonly used references
•
•
•
•
•
•
•
Voltage dividers - passive and active.
MOS diode reference.
PN junction diode reference.
Gate-source threshold reference circuit.
Base-emitter reference circuit.
Thermo voltage reference circuit
Bandgap reference circuit
Typical variations affecting the
references
• Power supply variation (main concern
here)
• Load variation (ro=∞ for I-ref, ro=0 for Vref)
• Temperature variation (main concern also)
• Processes variation (good process and
layout)
• Interferences and noise (not considered
here)
For temperature variation, typically use
fractional temperature coefficient:
1 y 1 y
TCF = ST =
y T
T
Voltage references
Passive Divider
Limited accuracy,
~6-bit, or 2%
Large static power
for small ro
Large area
Power sensitivity =1
Temp coeff depends on
material
Active Dividers
These can be used as “start up” circuits.
PN Junction Voltage References
S
VREF
VCC
=
1
ln(VCC / RI s )
If VCC = 10V, R = 10 kW, and IS =
10-15A,
then
S
VREF
VCC
= 0.0362.
For a diode:
VCC  VREF
VREF  VGO
3
 KT exp(
)
R
kT / q
Taking ∂/∂T and using: VCC − VREF + kT/q ≈ VCC − VREF:
3k
kT R
1 VREF VREF  VGO
TCF≈
=


VREF T
VREFT
VREF q VREF q RT
where VGO = 1.205 V is the bandgap voltage of
silicon.
If VREF = VBE = 0.6V, TCF of R = 1500 ppm,
then TCF of VREF = -3500 ppm/oC
VREF
HW: Calculate S V
Calculate TCF
CC
MOS equivalent of VBE reference:
The sensitivity w.r.t. VDD:
S
VREF
VDD

If VDD = 10V, W/L = 10, R = 100kW,and using
parameters from Table3.1-2,
then VREF = 1.97V and
S
VREF
VDD
= 0.29
This is not nearly as good as the VBE reference.
For temperature coefficient
mo = KT-1.5 ; VT = VT0 - aT or VT(T) = VT(To) - a(T-To)
mCoxW
VDD  VREF
VREF  VT  
2L
R
mCoxW
m mCoxW
VREF VT
2
VREF  VT   2
VREF  VT (

)
mT 2 L
2L
T
T
VDD  VREF R 1 VREF


R
RT R T
mCoxW VDD  VREF VREF
 1.5 VDD  VREF
2
(
a)
T
R
2L
R
T
VDD  VREF R 1 VREF


R
RT R T
2
Solving for ∂VREF/∂T and computer TC:
1 VREF
TC F 
VREF T
VDD  VREF  1.5 1 R 
a 



2 R  T R T 
1

1
VREF
1
2 R(VDD  VREF )
The book has one example of using this.
VGS based Current reference
MOS version: use VGS to generate a current and
then use negative feed back stabilize i in MOS
Start
up
Current mirror
VGS
Why the start up circuit?
There are two possible operating points:
The desired one and
The one that gives I1 = I2 = 0.
At power up, I1 = I2 = 0 without the start up.
RB bias M6 to be on, which turns M2 and M1 on.
Considering the l-effect, (1) is more like:
Then:
Differentiating wrt VDD and assuming constant VDS1
and VGS4 gives the sensitivity of IOUT wrt VDD.
HW: Verify the following sensitivity expression:
HW: Show that approximately:
VEB based current reference
Start
up
VEB=VR
A cascoded version to increase ro and
reduce sensitivity:
Requires start up
Not shown here
VEB reference
HW:
Analyze the sensitivity of the output I with
respect to VDD and temperature.
Come up with a start up circuit for the circuit on
the previous slide, using only active resisters
without RB. Note that you need to make sure
that at the desired operating point, the
connection from the start up circuit should be
turned off.
A thermal voltage based current reference
I1 = I2,  J1 = KJ2,
but J = Jsexp(VEB/Vt)
 J1/J2 = K =
exp((VEB1─ VEB2)/Vt)
 VEB1─ VEB2 = Vt ln(K)
I = (VEB1─ VEB2)/R
= Vt ln(K)/R  Vt = kT/q
A band gap voltage reference
Vout = VEB3 + I*L*R =
VEB3 + (kT/q)*Lln(K)
Vout/T = VEB3/T +
(k/q)*Lln(K)
At room temperature,
VEB3/T = ─2.2 mV/oC,
k/q = +0.085 mV/oC.
Hence, choosing
appropriate L and K can
make
Vout/T=0
When this happens, Vout
= 1.26 V
General principle of bandgap reference
Generate a negatively PTAT (Proportional To
Absolute Temperature) and a positively PTAT
voltages and sum them appropriately.
Positive
Temperature
Coefficient
(PTC)
Negative
Temperature
Coefficient
(NTC)
XP
XOUT
XN
K
A Common way of bandgap reference
VBE is negatively PTAT at roughly -2.2 mV/°C at
room temperature
Vt (Vt = kT/q) is PTAT that has a temperature
coefficient of +0.085 mV/°C at room temperature.
Multiply Vt by a constant K and sum it with the
VBE to get
VREF = VBE + KVt
If K is right, temperature coefficient can be zero.
In general, use VBE + VPTAT
How to get Bipolar in CMOS?
A conventional CMOS bandgap reference
for a n-well process
VOS represents input offset voltage of the amplifier.
Transistors Q1 and Q2 are assumed to have emitterbase areas of AE1 and AE2, respectively.
If VOS is zero, then the voltage across R1 is given as
Bandgap reference still varies a little with temp
Converting a bandgap voltage reference
to a current reference
VBE 2  VBE1  VBE
VDD
R3
R4
 k  AE1 R3 
T
  ln 
 q  AE 2 R4 
 
I  
1  

I  a I

 
I  
1  

I  a I

1
C1
VREF
1
2
Q1
C2
Q2
R2
V
REF
R1
V
BE 2
E1
R

R
1
2
 a
1  
 a
1 E1
E2
2
1
2
R

R
2 E2
3

  V

BE
4

Vref=I3*R3=
VGo
To
A2 VBE  VG 0
1 k
m 1
R3 [
(
ln( ) 
) T 
kT  ln( )]
R1
R0 q
A1
To
R1q
T
Curvature corrected bandgap circuit
R3= R4
Vref
Q2
Q1
R2
I R1  I R 3  I R 4  2 I R 4
 2I R 2
R1
VBE 2  VBE1
2
R2
VREF  VBE 2  VR1  VBE 2  I R1  R1
2 R1
 VBE 2 
(VBE 2  VBE1 )
R2
Problem :
 2 R1
V
VBE  const, but BE  const
T R2
T
VBE
In fact :
T

Vref
T
Solution:
R4= R5
Vref
IPTAT↓
D2
D1
R1
R2
R3
IPTAT2
Vref
VBE
VPTAT
VPTAT2
T
R
 2
Vref  VBE 2  2 I PTAT  4  R2  R3   I PTAT
 R3
2


V
 VBE1
I PTAT  BE 2
R1

1 kT  AE1 

ln 
R1 q  AE 2 
2
How to get I PTAT
?
Ex:
1. Suppose you have an IPTAT2 source characterized by
IPTAT2 = aT2, derive the conditions so that both first
order and second order partial derivative of Vref with
respect to T are canceled at a given temperature T0.
2. Suggest a circuit schematic that can be used to
generated IPTAT2 current. You can use some of the
circuit elements that we talked about earlier together
with current mirrors/amplifiers to construct your
circuit. Explain how your circuit work. If you found
something in the literature, you can use/modify it but
you should state so, give credit, and explain how the
circuit works.