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Multilevel Selective Harmonic Elimination PWM Technique in Series Connected Voltage Inverters 1 2 1 Kumari Gita Arunima Verma , MIEEE Assistant Prof, Department of Electrical Engineering, REC Banda Email: [email protected] 2 Assistant Prof, Department of Electrical Engineering, Institute of Engg. & Technology, Sitapur Road, Lucknow email: [email protected] Abstract-Recent advances in semiconductor switches, new multilevel converter topologies and advanced converter modulation techniques have contributed to the expansion of voltage source converters (VSCs) to higher voltage and power ratings for utility-scale and motor drive applications. Multilevel VSC topologies extend the advantages of the fully controlled, four-quadrant, two level converters by improving the quality of the output waveforms and minimizing filtering requirements. This paper deals with selective harmonic elimination pulse width modulation (SHE-PWM) for three-phase, two-level and multilevel converter topologies. Different formulations of SHE-PWM based on relaxing the symmetry requirements have been investigated. New solution sets have been calculated by imposing half-wave symmetry or completely eliminating the symmetry requirements. Moreover, modulation of the modular multilevel converter (MMC) and its operation in utility-scale applications has been carried out. Finally, the paper discusses the back-to-back configuration of MMC topologies. The converters are operated with sinusoidal PWM, under both the modulation techniques and the voltage balancing method. Based on controllers in the synchronous rotating reference frame, the system is investigated for its operation under steady state and during transients in the active and reactive power references of the converters. Keywords: Pulse Width Modulation, Multilevel Voltage Source Converter, Selective Harmonic Elimination PWM, Harmonic Reduction I. INTRODUCTION In an industrialized nation today, an increasingly significant portion of the generated electrical energy is processed through power converters for various applications in industrial, commercial, residential, aerospace and military environments. The input and output currents and voltages of static power converters are generally associated with harmful lower-order harmonics. In 1983 [1] reviewed A recalculated optimized pulse-width-modulation (PWM) technique which selectively eliminates several lower-order harmonics in the output voltage of the inverter has many advantages. [2] discussed a number of issues involved in designing a voltage-source inverter system for a large induction motor drive. Using two modulation techniques-selected harmonic elimination in the upper frequency range and trapezoidal modulation in the lower frequency range-control of voltage, current, Li, Dariusz Czarkowski et. al. [3] discussed the selective harmonic elimination pulse width modulation (SHE-PWM) method is systematically applied for the first time to multilevel series-connected voltage-source PWM inverters. The method is implemented based on optimization techniques. The optimization starting point is obtained using a phase-shift harmonic suppression approach. Another less computationally demanding harmonic suppression technique, called a mirror surplus harmonic method, is proposed for double-cell (five-level) inverters. S. R. Bowes et. al in [ 4 ] proposed a new harmonic elimination PWM strategy for single-phase VSI and CSI inverters is presented which closely approximates the exact switching angles produced offline for the harmonic elimination PWM (HEPWM) strategy. In 2008, [5] presented several conventional selected harmonic elimination techniques that form a class of pulse width modulation techniques (SHEPWM) that are very effective compared to other PWM schemes in the elimination of the low-order harmonics. However they suffer from a complicated computational process especially if the number of low order harmonics to be eliminated is high. Madhukar waware and Pramod Agarwal [6] discussed Harmonic currents produced by non linear loads are injected back into the supply systems. The objective of this paper is to investigate and successfully implement the optimal firing strategy for harmonics elimination in single-phase and three-phase voltage-source Inverters. N o v e l Optimization technique has been proposed to generate optimal switching patterns for the single-phase and three-phase inverter configurations. Next, a control scheme for implementing the firing strategies has developed. The circuits for the single-phase inverter configuration (single-phase half-bridge and single-phase full bridge) and the circuit for three phase inverters are individually built on the bench and their corresponding firing strategies are implemented through the control scheme. The results are obtained with the design values from the optimization programs to ensure effective harmonics elimination and high-quality output spectra. II. HARMONIC REDUCTION IN INVERTERS The harmonics present in a dc to ac inverter are very much obvious compared to the harmonics that can be present in an ac to dc converter [6]. The passive filters can be easily used in order to improve the output of an ac to dc converter. nverter. While, in case of dc to ac inverter, the harmonic reduction reduction is harder and it also includes the use of active filters. The The filters used to remove the harmonics from the inverters are are more complex and consists of large number of inductors and and capacitors to remove the harmonics of higher order. This also results into more costly filters to remove harmonics from from the inverter. Thus, in order to avoid the cost of such such expensive and complex filters controlling the width or reducing reducing the number of pulses may result into reduction of harmoni harmonics. One such technique is explained below called pulse width width modulation technique [7] In case of sinusoidal pulse widt dth modulation, as shown in Figure 1, all the pulses are modulated modulated individually. Each and every pulse is compared to a reference erence sinusoidal pulse and then they are modulated accordingl accordingly to produce a waveform which is equal to the reference erence sinusoidal waveform. Figure1: Representation of Sinusoidal Pulse Width Width Modulation. The performance characteristics of an iinverter power conversion scheme largely depend on the choice of the particular PWM strategy employed. Presentntly the PWM schemes can be broadly classified as bellow [[7]. three-phase inverter are presented in this paper. Simulation results for an 11-level (five-celll) 45-angle three-phase inverter are also given. A reeduced-order SHEPWM method by mirror surplus harmon rmonic shaping for five-level inverters is proposed through the waveform waveform shown in figure 2 [11]. Figure 2: Waveform of triple-level SHEPWMM III. MODELLING OF NG OF SHE-PWM In this paper the optimal switching strat switching strategies developed for the three phase inverter was for a fifixed per unit fundamental voltage and a fixed switching frequ requency. A switching strategy could be developed such that for a particular frequency of inverter output, an optimal switching itching pattern is developed for the per-unit fundamental output voltageltage which corresponds to that frequency. Hence a large arra ray can be generated with switching patterns for the frequenc y varying smoothly from a very small value (say 0.5 Hertz) to o the standard frequency of operation (say 60 Hertz). Three-phphase inverters are normally used for high power applications.ons. Figure 3 shows the modeling of the proposed three-pphase double-cell series-connected PWM inverter. 1) Sinusoidal PWM (SPWM) 2) Space-vector PWM (SVPWM) 3) Non sinusoidal carrier PWM 4) Mixed PWM 5) Selective harmonic elimination PWM (SHEPM (SHEPWM). In SPWM a triangular signal of certain amplitude and frequency is compared to a sinusoidal signalsignal in phase with the output voltage of the inverter. The widths idths of the pulses are varied by changing the amplitude of the sinusoidal waveform. In this method, the lower orderr harmonics are c o m p l e t e l y removed. As the switchingswitching frequency increases, more harmonics can be eliminated.ted. The limiting factors are the switching device speed, switching loss and the power ratings [8]. The SHEPWM-based methods can theoreticacally provide the highest quality output among all the PWMM methods. A SHEPWM model of a multilevel series-connonnected VSI has the highest quality output among all the PWWM methods [3, 9]. A SHEPWM model of a multilevel seeries-connected voltage-source inverter is developed which cacan be used for an arbitrary number of levels say 7 level level [10, 11] and switching angles. Simulation results for a fivee-level 20-angle Fig. 3 Three-phase differential doubldouble-cell series-connected PWM inverter model The gating signal of single-phaase inverters should be 0 advanced or delayed by 120 with respect to each other to obtain three-phase balanced (fundundamental) voltages. This arrangement requires three singlegle phase (double-cell) transformers, 24 transistors, and 24 diodes. IIf the output of single-phase inverters is not perfectly balanced in magnitudes and phases, the three-phasee (double-cell) output voltages are unbalanced. The pulsespulses are given through a pulse generator given in figure gure 4. 12 pulses discrete PWM generator in which the output output pulses are a vector (with values=0 or 1). Depending onon the selected "Generator Mode", the output vector contains:: For a 1-arm bridge: Two pulses. Pulse 1 isis for the upper switch and pulse 2 is for the lower switch. For a 2-arm bridge: Four pulses. PulsesPulses 1 and 3 are respectively for the upper switches of the first and second arm. Pulses 2 and 4 are for the lower switches.s. For a 3-arm bridge: Six pulses. Pulses 1,3 and 5 are respectively for the upper switches of the ffirst, second and third arm. Pulses 2,4 and 6 are for the lower swwitches. For double 3-arm bridges: Twelve pulsespulses. The first six pulses (pulses 1 to 6) must be sent to the fifirst 3-arm bridge and the last six (pulses 7 to 12) to the second 33-arm bridge. Fig. 5 Differential Waveform of Output voltage and load current for upper cell Fig. 4 Trigger pulse Generator IV. RESULTS AND DISCUSSION USSION Figures 5 and 6 show the differential waveeform of output voltage and current of upper cell and lower cell respectively. A three-phase output can be obtaained from a configuration of twelve transistors and twelve diodes. T wo types of control signals can be applied tto the transistors: 00 0 180conduction or 120conduction. The 18180conduction has better utilization of the switches and is the preferred method. Fig. 6 Differential Waveform of Output voltage and load current For lower cell The frequency spectrum for uppupper cell l i n e t o l i n e v o l t a g e i n voltage inverter with multilevel selective harmonic elimination PWM methood is shown in figure 7. The calculation of total harmonic harmonic distortion for voltage waveform using FFT analysis in MATL MATLAB Simulink model for 2 and 5 cycles are shown in figures n in figures 8-10 Fig. 7 Frequency spectrum for upper cell volll voltage inverter Fig 10 FFT Analysis of Three Phase Double Inverte Inverter with R-L Load Fig 8 FFT Analysis of Single Phase Inverter ase Inverter with R-L Load for 2 and 5 cycles respectively Fig 9 FFT Analysis of Three Phase hase Single Inverter with R-L Load The FFT results obtained from om figures 8-10 clearly reveal that as the level of inverter is increased, in which SHEPWM has been employed, thethe value of % THD has reduced. The THD through FFTFFT analysis is maximum in case of single phase inverter both both for 2 and 5 cycles of the voltage waveforms as sho shown in figure 8, which is further reduced when the same same analysis in figure 9 is carried out for three phase sin single level inverter but the value of THD has drastically reduced in a double level three phase inverter incorporat ating SHE-PWM technique of harmonic elimination as can can be observed from figure 10. Further it can be inferred that as the number of cycles of the waveforms is increased, tthere is reduction in total harmonic distortion factor which which directly implies that harmonics are eliminated botboth using SHE PWM technique and by considering mo more number of cycles. for example, in case of 2 cycles inin figures 8-10 have more THD as compared to 5 cycles. V CONCLUS CONCLUSION This paper has investigated and successfully implemented optimal switching strategies for harmonics elimination in single phase and three phase voltage age-source inverters. Optimal switching patterns for the voltage-source inverter configurations were generated throughthrough optimization programs. Then a simple low cost control schscheme was developed to implement the switching strategies es. The single phase and the three phase inverter configurations were individually built on the bench and selected results werewere verified applying the corresponding switching patterns to to these circuits, through the control scheme. The advantages of the proposed method over the SPWM scheme were established. ished. The main advantages established are are: • Added flexibility in optimizinoptimizing a particular objective functions such as to obtain selselective elimination of harmonics, when compared to tthe SPWM scheme. • Lower inverter switching frequency needed for eliminating the same number of h same number of harmonics as the SPWM scheme, when both the schemes chemes were applied to a three phase inverter. • A significantly better quality of output voltage for the same number of pulses per half cycle as the SPWM scheme, when both the schemes chemes were applied to a three phase inverter. The measured values of THD for the cases ses in figures 8-10 have been provided in Table 1. Table 1: %THD values for various proposedproposed inverter configurations S.N 1 CYCLES THD 2 23.83% 5 35.51% 12 Pulse Three Phase Single Inverter with R-L Load 2 7.24% 5 4.38% 24 Pulse Three Phase Double Inverter with R-L Load 2 3.36% 6 Pulse Single Phase Inverter with R-L Load 2 3 5 1.96% For low frequencies of operation, the the switching patterns could be adjusted to have more number of pulses per half cycle (to eliminate the large number of troublesome lower order harmonics at low frequencies) and progressively less number of pulses for higher frequencies of operation.operation. Also, since in an induction motor, high torque is desired desired at the time of starting and high efficiency while runninrunning, the inverter switching strategies can be optimized to satsatisfy both conditions, by having one solution for starting and another for running. Another industrial application that can be investigated, based on the work in this dissertation, is the application of optimal PWM single phase inverters in fixed frequency, variable voltage (uninterruptible power supplies). power supplies supplies (uninterruptibl REFERENCES 1 A .Gersho, and V. Cuperman, Cuperman, “ Solving non linear equetions of harmonics elim elimination PWM in power control” a pattern matchin ching technique for speech coding', IEEE Commun. Mag.,Mag., 1983, 21, pp. 15-21. 2 Bin Wu , Shashi B. Dewan, Dewan, and Gordon R, “PWM – CSI inverter for Inductioion Motor Drives” IEEE Transactions on Industry Applications, vol.28, no.1, January/February 1992. 3 Li Li, Dariusz Czarkowskikowski, Yaguang Liu, and Pragasen Pillay, “Multillevel Selective Harmonic Elimination PWM Technique Technique in Series-Connected Voltage Inverters,” IEEE Transactions on Industry Applications, vol. 36, No.1, 2000. 4. S.R.Bowes, S.Grewal and D.Holliday, “Single-phase three-level regular-sampled selective harmonic elimination PWM,” IEEE Power Application vol.148, No.2, 2001. 5. Hussain Bierk, N. Benaifa, K. M. Abdel-latif, and E. Nowicki, “Elimination of Low order Harmonics in High Power Medium Voltage Inverter Applications Using a Modified SHE-PWM Technique,” IEEE Transactions on Industrial Applications, vol. IA-26, No. 2, pp. 302-316, March/April 2008. 6. Madhukar waware, and Pramod Agarwal, “Use of Multilevel Inverter for Elimination of Harmonics in High Voltage Systems,” IEEE Transactions on Industrial Applications, vol.2, 2010. 7. Bimal K Bose, Modern Power Electronics and AC Drives, Prentice Hall India, 2002 8. M H Rashid, Power Electronics: Circuits, Devices, and Applications, Pearson Education India, 2009. 9. Hassan Feshki Farahani, H. Sarabadani, " Modulation Index Effect on the 5-Level SHE-PWM Voltage Source Inverter", Engineering Journal Scientific Research, Vol. 3, 2011, pp. 187-194. 10. B. Ashok, A.Rajendran , ''Selective Harmonic Elimination of Multilevel Inverter Using SHEPWM Technique", International Journal of Soft Computing and Engineering (IJSCE), Volume-3, Issue-2, May 2013, pp. 79-82. 11. Asawari Kulkarni; Prof D.E. Upasani, "Implementation of SHEPWM in Single Phase Inverter", International Journal of Scientific and Research Publications, Volume 6, Issue 1, January 2016, pp. 431-435. . .......................................................