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EE8407 Power Converter Systems
Project 1
12-pulse Series-type Diode Rectifier

Objectives
To investigate the performance of series-type 12-pulse diode rectifier

Exercise (3%)
Verify the waveforms and THD of a six-pulse diode rectifier shown in Fig. 3.2-7.

System Parameters
Rated Supply Voltage:
Rated DC Output Power:
Diode Rectifiers:
DC Filter Capacitor:
Line Inductance:

Phase Shifting Transformer
Magnetising Inductance:
Winding Resistance:
Primary Leakage Inductance:
Leakage Inductance of Each
Secondary Winding:
4160V (rms, line-to-line)
1MW
Ideal (no power losses, no voltage drop)
C d   (dc voltage is ripple free)
0.05pu (Between the transformer and supply)
Very High ( Lm   )
Negligible
0.03pu
0.03pu (Hint: Use a per unit system for the secondary windings)

Project Requirements (12%)
1) Calculate the base values of the rectifier system, and the values of all inductances (in mH);
2) Find the line current THD of the rectifier with the fundamental line current I A1 (rms) from
0.1pu to 1.0pu (10 sets of data);
3) Represent your results obtained from 2) with a graph (similar to Fig. 3.3-5); and
4) Include a set of current waveforms ( id , ia , ia , ia~ and iA ) at I A1  0.5 pu and their harmonic
spectrum (0 – 2kHz).

1)
2)
3)
4)
5)
6)
7)
Project Report
Cover page (including course/lab title, your name, student ID, date)
Abstract (a paragraph of about 200 words)
Introduction
Theoretical analysis
Calculations, simulation results and discussions/explanations.
Conclusions (about 300 words)
Appendix: Simulink models
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Power Converter Systems
Project 2
Space Vector Modulation Schemes for Two-Level
Voltage Source Inverter

Objectives
1) To understand the principle of space vector modulation; and
2) To investigate the harmonic performance of the two-level voltage source inverter.

Suggested Simulation Software
Matlab/Simulink

System Specifications
Inverter Topology:
Rated Inverter Output Power:
Rated Inverter Output Voltage:
Rated Inverter Output Current:
Rated dc Input Voltage:
Load:
Switching Devices:

Two-level voltage source inverter as shown in Fig. 6.1-1
1MVA
4160V (fundamental line-to-line voltage, rms)
138.8A (fundamental, rms)
Constant dc (to be determined)
RL load with a per-phase resistance of 0.95pu and inductance of
0.31pu, which gives the load impedance of 1.0pu with a lagging
power factor of 0.95. Note that the RL load is fixed for the
inverter operating under various conditions.
Ideal switch (no power losses or forward voltage drops)
Project Requirements
Part A
A.1 Determine the dc input voltage V d that can produce a fundamental line-to-line voltage of
4160V (rms) at the modulation index of m a  1.0 .
A.2 Determine the value of load resistance (  ) and inductance (mH).
Part B
Develop a simulation program for the conventional SVM scheme using the seven-segment
switching sequence given in Table 6.3-4. Run your simulation program for the tasks given in the
Table 1.
B.1 For each of the above tasks, draw waveforms (two cycles each) for the inverter line-to-line
voltage v AB (V) and inverter output current i A (A).
B.2 Plot the harmonic spectrum (0 to 60th harmonics) of v AB normalized to the dc voltage V d and
i A normalized to its rated fundamental component I A1, RTD (138.8A). Find the THD of v AB and
i A , and complete Table 1.
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B.3 Analyze your simulation results and draw conclusions.
Table 1 Simulation tasks for the conventional SVM scheme
THD (%)
THD (%)
Simulation
ma
f1 (Hz)
v AB
iA
Task
T.1
30
0.4
146%
16%
T.2
30
0.8
77%
10%
T.3
60
0.4
152%
17%
T.4
60
0.8
81%
11%
Sampling Period: Ts  1 / 720 sec
Part C
Modify your simulation program developed in Part B such that even-order harmonics in v AB can be
eliminated. Use the switching sequence given in Table 6.3-5. Run your simulation program for the
tasks given in Table 2.
Table 2 Simulation tasks for the modified SVM scheme
with even-order harmonic elimination
THD (%)
THD (%)
Simulation
ma
f1 (Hz)
v AB
iA
Task
T.5
30
0.8
77%
10%
T.6
60
0.8
81%
11%
Sampling period: Ts  1 / 720 sec
C.1 For each of the above tasks, draw the waveforms for v AB and i A .
C.2 Calculate harmonic spectrum and THD of v AB and i A , and complete Table 2.
C.3
Find harmonic content of v AB versus ma for the inverter operating at f1  60Hz and
Ts  1 / 720 sec .
C.4 Analyze your simulation results and draw conclusions.

Project Report
See instructions given in Project 1.
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Power Converter Systems
Project 3
Control of Multilevel Cascaded H-Bridge Inverters

Objectives
To investigate carrier based PWM schemes for multilevel cascaded H-bridge inverters.

Inverter Specifications
Inverter Configuration:
Seven-level cascaded H-bridge inverter
Rated Inverter Output Voltage: 2300V (rms fundamental line-to-line voltage)
Rated Inverter Output Power:
2MVA (three phase)
Rated Inverter Output Frequency: 60Hz
DC link voltage of H-bridges:
Constant, ripple free. DC voltage: To be determined.
Inverter load:
Three-phase balanced RL load with a lagging power factor
of 0.9 at the rated frequency of 60Hz. Note: once the load
impedance is determined, it is fixed for the inverter
operating at various frequencies or modulation indices.
Project Requirements
1) Determine the value of dc link voltage E of each H-bridge such that the fundamental line-to-line
voltage (rms) of the seven-level cascaded inverter is 2300V at ma  1.0

2) Use phase-shifted PWM scheme for the seven-level CHB inverter under the following operating
conditions: f m  60 Hz , f cr  720 Hz and ma  0.99 .
Show voltage waveforms ( v H 1 , v H 2 , v H 3 , v AN and v AB ) and their harmonic spectrum. Refer to Fig.
7.4-2 in the textbook as an example for your plots.
3) Repeat Item 2) with m a  0.25 .
4) Use level-shifted PWM scheme (IPD) for the seven-level CHB inverter under the following
conditions: f m  60 Hz , f cr  4320 Hz and ma  0.99 .
Show voltage waveforms ( v H 1 , v H 2 , v H 3 , v AN and v AB ) and their harmonic spectrum. Refer to Fig.
7.4-6 in the textbook as an example for your plots.
5) Repeat Item 4) with m a  0.25 .
6) Compare the results by both modulation schemes and make your conclusions.

Project Report
See instructions given in Project 1.
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Power Converter Systems
Project 4
IPD and APOD Modulation Schemes for
Multilevel Diode Clamped Inverters

Objectives
To investigate the performance of multilevel diode clamped inverters with carrier based
modulation schemes.

Inverter Specifications
Inverter Configuration:
Three- and four-level diode clamped inverters
Rated Inverter Output Voltage: 6.6KV (rms fundamental line-to-line voltage)
Rated Inverter Output Power:
5MVA (three-phase)
Rated Inverter Output Frequency: 60Hz
dc link voltage:
Constant, ripple free.
Total dc link voltage: To be determined.
Use two identical dc voltage sources for the three-level
inverter and three identical dc voltage sources for
the four level inverter.
Inverter load:
Three-phase balanced RL load with a lagging power factor
of 0.9 at the rated frequency of 60Hz. Note: once the load
impedance is determined, it is fixed for the inverter
operating at various frequencies or modulation indices.
Project Requirements
1) Determine the value of total dc link voltage such that the fundamental line-to-line voltage (rms)
of the inverter is 6.6KV at ma  1.0

2) Design switching pattern for the three-level inverter
Use in-phase disposition (IPD) modulation scheme to control the inverter under the following
operating conditions:
2.1) f m  60 Hz , f cr  900 Hz and m a  1 .0
2.2) f m  20 Hz , f cr  900 Hz and ma  0.3
Show simulated waveforms ( v g 1 , v g 2 , v AN , v AB , and i A ) and the harmonic spectra of v AB and i A .
Arrange your waveforms and harmonic spectra in a same format as that of Fig. 8.6-2 in textbook.
3) Repeat 2) with alternative phase opposition disposition (APOD) modulation scheme. Compare
your simulation results and make conclusions.
4) Design switching pattern for the four-level inverter
Use IPD scheme to control the inverter operating at f m  60 Hz , f cr  900 Hz and ma  1 . Show
simulated waveforms ( v AB and i A ) and their harmonic spectra. Compare your simulation results
with those in 2.1) and make conclusions.

Project Report
See instructions given in Project 1.
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Power Converter Systems
Project 5
PWM Current Source Converters

Objectives
To investigate the operation and performance of current source inverter and rectifier modulated by
SHE schemes.
Part A Single-bridge Current Source Inverter (CSI)

Inverter Specifications
Inverter Configuration:
Single-bridge current source inverter (refer to Fig. 5-1).
Assumption: ideal inverter, no power loss.
I d  200 A
70Hz
66 F
Three-phase balanced RL load, Rload  15 with
Lload  6mH in series per phase.
Inverter dc Link Current:
Inverter Output Frequency:
Output Filter Capacitor:
Inverter load:
S1
g1
S3
g3
S5
g5
iw
A
io
Id
ic
O
B
C
S6
S4
g4
g6
Cf
S2
g2
Cf
Cf
LOAD
Z
Fig. 5-1 Single-bridge current source inverter.

Project Requirements
1) Build Simulink model for the single-bridge CSI.
2) Develop SHE switching pattern with 5th, 7th and 11th harmonic elimination (no bypass pulses).
3) Show waveforms of i w (A) , io ( A) and v AB (V ) .
4) Determine harmonic content by 1) completing Table 5-1 and plotting the spectrum of I wn / I w1
and I on / I o1 up to the 47th harmonic. Make your conclusions.
Table 5-1 Fundamental and dominant harmonics in I w , I o and V AO
Fundamental
(rms)
13th
(rms)
17th
(rms)
19th
(rms)
23rd
(rms)
THD
(%)
Iw
Io
VAB
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Part B Dual-Bridge Current Source Rectifier (CSR)
 Rectifier Specifications
Rectifier Configuration:
Dual-bridge current source rectifier as shown in Fig. 5-2.
Assumption: Ideal rectifier, no power loss.
Rated DC Output Power:
1.5MW (total power of the two single-bridge rectifiers)
Rated Utility Voltage:
3000V (rms, line-to-line), 60Hz
Phase-shifting Transformer:
Represented by leakage inductances, no power loss.
Rated Secondary Voltage:
1500V (rms, line-to-line)
Total Leakage Inductance Llk : 0.07pu (primary and secondary leakages, both referred
to the secondary side)
Filter Capacitor C f :
0.4pu
Base Values for Llk and C f :
Use the rated values of each secondary winding for
the calculation of Llk and C f .
Line (source) inductance Ls :
DC Choke Ld :
DC Load Resistance:
0.8mH (0.05pu)
48mH (3pu. In practice, Ld is in the range of 0.5 to 1pu. The
high value of 3pu is used here to reduce the dc current ripple,
which will increase the accuracy of the line/PWM current THD
analysis.
16
Ld
Llk
Ls
vA
is
id
iw
i A  is  i~s
  30 
Cf
L
O
A
D
vB
vC
Llk
  0
Phase-Shifting
Transformer
i~s
i w~
Cf
Fig. 5-2 Dual-bridge current source rectifier.

Project Requirements
1)
Build Simulink model for the dual-bridge CSR.
2)
Develop SHE switching pattern with 11th and 13th harmonic elimination at ma  1.0 (refer
to Table 2 on Page 248 of the textbook).
3)
Use delay angle of   0 (with respect to the transformer secondary voltage instead of
capacitor voltage).
4)
Show waveforms of i w (A) , is (A) and i A (A) .
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5)
Determine harmonic content by 1) completing Table 5-2 and plotting the spectrum of
I wn / I w1 , I sn / I s1 and I An / I A1 up to the 47th harmonic. Make your conclusions.
Table 5-2 Fundamental and dominant harmonics in I w , I s and I A
Fundamental
(rms)
5th
(rms)
7th
(rms)
11th
(rms)
13th
(rms)
17th
(rms)
19th
(rms)
THD
(%)
Iw
Is
IA
Note: In case of LC resonances, add a three-phase damping resistance in parallel with C f . You
should select your damping resistance such that the LC resonance can be effectively damped out
and in the meantime the power loss on the damping resistor is minimized. Give the value of the
damping resistance.

Project Report
See instructions given in Project 1.
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Power Converter Systems