Download 9 – The Power MOSFET 3

The Power MOSFET
Part 3
MOSFET Switching Characteristics
Since the MOSFET is a majority carrier transport device, it is inherently capable of a
high frequency operation. But still the MOSFET has two limitations:
1. High input gate capacitances.
2. Transient/delay due to carrier transport through the drift region.
As stated earlier the input capacitance consists of two components: the gate-to-source and gateto-drain capacitances. The input capacitances can be expressed in terms of the device junction
capacitances by applying Miller theorem to Fig. 4.15a. Using Miller theorem, the total input
capacitance, Cin, seen between the gate-to-source is given by,
Cin = Cgs + (1 + gm RL )Cgd
(4.12)
FIGURE 4.15 (a) Small-signal model including parasitic capacitances and (b) equivalent circuit
using Miller theorem.
The frequency response of the MOSFET circuit is limited by the charging and discharging times
of Cin. Miller effect is inherent in any feedback transistor circuit with resistive load that exhibits
a feedback capacitance from the input and output. The objective is to reduce the feedback gateto-drain resistance. The output capacitance between the drain and source, Cds , does not affect the
turn-on and turn-off MOSFET switching characteristics. Figure 4.16 shows how Cgd and Cgs vary
under increased drain-source, vDS, voltage.
In power electronics applications, power MOSFETs are operated at high frequencies in
order to reduce the size of the magnetic components. In order to reduce the switching losses,
the power MOSFETs are maintained in either the on-state (conduction state) or the off-state
(forward blocking) state.
It is important we understand the internal device behavior; therefore, the parameters that
govern the device transition from the on-state and off-states. To investigate the on and off
switching characteristics, we consider the simple power electronic circuit shown in Fig. 4.17a
under inductive load. The fly back diode D is used to pick up the load current when the switch is
off. To simplify the analysis we will assume the load inductance L0 is large enough so that the
current through it is constant as shown in Fig. 4.17b
FIGURE 4.17 (a) Simplified equivalent circuit used to study turn-on
and turn-off characteristics of the MOSFET and (b) simplified equivalent circuit.
A. Turn-on Analysis Let us assume initially the device is off, the load current, I0, flows through
D as shown in the Fig. 4.18a vGG = 0. The voltage vDS = VDD and iG = iD.
At t = t0, the voltage vGG is applied as shown in Fig. 4.19a. The voltage across CGS starts
charging through RG. The gate–source voltage, vGS, controls the flow of the drain-to-source
current iD. Let us assume that for t0 ≤ t < t1, vGS < VTh , i.e. the MOSFET remains in the cut-off
region with iD = 0, regardless of vDS . The time interval (t1, t0) represents the delay turn-on time
needed to change CGS from zero to VTh . As long as vGS < VTh , iD remains zero.
At t = t1, vGS reaches VTh causing the MOSFET to start conducting. Waveforms for iG and vGS
are shown in Fig. 4.19.
For t > t1 with vGS > VTh, the device starts conducting and its drain current is given as a function
of vGS and VTh. In fact iD starts flowing exponentially from zero as shown in Fig. 4.19d. As long
as iD(t)<I0, D remains on and vDS = VDD as shown in Fig. 4.18c. The gate current continues to
decrease exponentially as shown in Fig. 4.19c.
At t = t2, iD reaches its maximum value of I0, turning D off. For t > t2, the diode turns off and iD ≈
I0 as shown in Fig. 4.18d. Since the drain current is nearly a constant, then the gate–source
voltage is also constant according to the input transfer characteristic of the MOSFET, i.e.
iD = gm (vGS − VTh ) ≈ I0.
For t2 ≤ t < t3, the diode turns off the load current I0 (drain current iD), which starts discharging
the drain-to-source capacitance.
For t > t3, the gate current continues to charge CGD and since vDS is constant, vGS starts charging
at the same rate as in interval t0 ≤ t < t1.
The total delay in turning on the MOSFET is given by
Notice the MOSFET sustains high voltage and current simultaneously during intervals t2-t1 and
t3-t2. This results in large power dissipation during turn on, that contributes to the overall
switching losses. The smaller the RG, the smaller t2 - t1 and t3-t2 become.