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Download EE 321 Analog Electronics, Fall 2013 Homework #9 solution
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EE 321 Analog Electronics, Fall 2013 Homework #9 solution 5.135. The amplifier of Fig. P5.135 consists of two identical common-emitter amplifiers connected in cascade. Observe that the input resistance of the second stage, Rin2 , constitutes the load resistance to the first stage. (a) For VCC = 15 V, R1 = 100 kΩ, R2 = 47 kΩ, RE = 3.9 kΩ, RC = 6.8 kΩ, and β = 100, determine the dc collector current and dc collector voltage of each transistor. (b) Draw the small-signal equivalent circuit of the entire amplifier and give the values of all its components. Neglect ro1 and ro2 . (c) Find Rin1 and vb1 /vsig for Rsig = 5 kΩ. (d) Find Rin2 and vb2 /vb1 . (e) For RL = 2 kΩ, find vo /vb2 . (f) Find the overall voltage gain vo /vsig . (a) The base voltage is determined from VCC − VB VB VB − VBE = + R1 R2 (β + 1) RE VB 1 1 1 + + R1 R2 (β + 1) RE 1 = VCC VBE + R1 (β + 1) RE VBE VCC + R1 ||R2 || (β + 1) RE VB = R1 (β + 1) RE 15 0.7 = × 100||47|| (101 × 3.9) + 100 101 × 3.9 =4.5 V Then VE = VB − VBE = 4.5 − 0.7 = 3.8 V. Then IE = RVEE = 0.97 mA. Then IC = αIE = 100 × 0.97 = 0.96 mA, and VC = VCC − IC RC = 15 − 0.96 × 6.8 = 8.5 V. We note that 101 this means the transistors are in active mode. (b) Small-signal model beta ib RC beta ib RC R1 re R2 Rsig RE vsig R1 R2 re RE gm = IC 0.96 = = 0.038 Ω−1 VT 25 × 10−3 β 100 α β+1 re = = = 101 = 26 Ω gm gm 0.038 (c) Input resistance is Rin1 =R1 ||R2 || (β + 1) (re + RE ) =100||47|| 101 × 26 × 10−3 + 3.9 =3.50 kΩ 2 RL vb1 Rin1 3.5 = = = 0.41 vsig Rsig + Rin1 5 + 3.5 (d) The input resistance on the second stage is the same as the input resistance on the first stage, Rin2 = Rin1 = 3.5 kΩ The voltage on the second stage is vb2 = −gm vb1 RC ||Rin2 vb2 = −gm RC ||Rin2 = −0.038 × (6.8||3.5) × 103 = −88 vb1 (e) At the output we have vo = −gm vb2 RC ||RL vo = −gm RC ||RL = −0.038 × (6.8||2) × 103 = −59 vb2 (f) Overall voltage gain vb1 vb2 vo vo = = 0.41 × 88 × 59 = 2129 vsig vsig vb1 vb2 7.24. Consider the differential amplifier of Fig. 7.12 and let the BJT β be very large: (a) What is the largest input common-mode signal that can be applied while the BJTs remain comfortably in the active region with vCB = 0? (b) If an input difference signal is applied that is large enough to steer the current entirely to one side of the pair, what is the change in voltage at each collector (from the condition for which vid = 0)? (c) If the available power supply VCC = 5 V, what value of IRC should you choose in order to allow a common-mode input signal of ±3 V? (d) for the value of IRC found in (c), select values for I and RC . Use the largest possible value for I subject to the constraints that the base current of each transistor (when I divides equally) should not exceed 2 µA. Let β = 100. 3 (a) vCB = 0 means vC = vB . vC = VCC − IRC 2 Thus the largest common-mode input is vic,max = VCC − (b) On one side the voltage will increase by IRC . 2 IRC , 2 IRC 2 and on the other side it will decrease by (c) Inn that case we should make VC = 3 V (assuming we will only go to vCB = 0 V as in question (a), and thus IRC = 2 (VCC − VC ) = 2 × (5 − 3) = 4 V (d) The relationship between I and IB is 2βIB = I and thus the largest possible value of I is I = 2βIB = 2 × 100 × 2 × 10−6 = 0.4 mA and then the value for RC is RC = IRC 4 = = 10 kΩ I 0.4 × 10−3 7.31. A BJT differential amplifier uses a 300 µA bias current. What is the value of gm of each device? If β is 150, what is the differential input resistance? gm is defined as 4 αI αIE I 0.3 IC = = 2 ≈ = = 0.006 Ω−1 VT VT VT 2VT 2 × 25 The differential input resistance is gm = Rid = 2rπ = 2 β 150 =2× = 50 kΩ gm 0.006 7.35. Design a BJT differential amplifier to amplify a differential input signal of 0.2 V and provide a differential output signal of 4 V. To ensure adequate linearity, it is required to limit the signal amplitude across each base-emitter junction to a maximum of 5 mV. Another design requirement is that the differential input resistance be at least 80 kΩ. The BJTs available are specified to have β ≥ 200. Give the circuit configuration and specify the values of all its components. To achieve this we need to add emitter resistors, Re . We want the differential gain to be AD = 4 = 20 0.2 and we know that it is RC re + Re should be at most 5 mV. That constrains the voltage division AD = We are also told that vbe between re and Re , re vid,max re + Re 2 Finally we are told that the differential input resistance should be at least 80 kΩ, vbe,max = Rid = 80 kΩ where Rid = 2 [(βmin + 1) re + Re ] We should now be able to compute Re , RC , and re , the last of which gives us the bias current I. Use the last two equations to get re and Re . First the second-last equation: re + Re = re vid,max 0.2 = re = 20 re 2vbe,max 2 × 5 × 10−3 Re = 19 re Insert that into the last equation: Rid = 2 (βmin + 1) + 2Re = 2 [(βmin + 1) + 19] re 5 re = 80 × 103 Rid = = 182 Ω 2 [(βmin + 1) + 19] 2 [(200 + 1) + 19] Compute Re Re = 19 re = 19 × 182 = 3.46 kΩ Compute RC from RC = AD (re + Re ) = 20 × 182 + 3.46 × 103 = 72.8 kΩ Finally we should determine the current bias needed. We get that from re = α α α = IC = I gm 2V V T T and thus I= 2 × 25 × 10−3 2αVT = = 0.27 mA re 182 6