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Overcoming No Fault Founds For a casual observer, the term “No Fault Found” would seem to be a positive statement and surely would mean a board has passed test and therefore this is a good result. However for those in the test environment it rings warning bells that another board is likely to be added to a growing quarantine stock, or “bone pile” as it is sometimes known, and inventory may take another hit. NFF (No Fault Found) situations occur when the test method(s) being used cannot detect a failure in the unit under test; however the unit then fails when placed back in the host equipment. This failure may be a hard or intermittent fault. Without the ability to detect and identify the failure with a test system the user is left with little choice but to assign the board to a pile of others that are also waiting for engineering assistance – if it is available. Test techniques generally are suited to finding certain types of faults but not others. For instance, functional test from an edge connector will not identify an out of tolerance resistor but in-circuit test will. Similarly, boundary scan will not provide a test of a circuit’s function but will be able to identify short and opens in parts of a circuit where there is no physical access for a Bed-of-Nails. To help overcome the problem of NFFs it is therefore necessary to have a test system that supports multiple different test techniques so that maximum fault detection, or test coverage, in a circuit can be achieved through the use of complementary test methods. These multiple test techniques need to be structured as part of a single test program flow in order to detect and then accurately identify the cause of a failure. Although a crucial feature, multiple techniques are not necessarily the complete answer as each separate test method must also provide an accurate in-depth test capability and several factors need to considered: Digital performance One crucial factor in achieving an in-depth test of a circuit is the digital performance of the tester. High quality pin electronics are essential to ensure the correct drive levels can be applied regardless of the logic family being tested and the current being demanded from the circuit. This is particularly true for the in-circuit test of a component where connected devices need to be backdriven, or the node forced to the correct test state. To apply the test signal safely it must be controlled so as to minimise overshoot and undershoot of the signals while at the same time restricting the length of time a test can take. Obviously if the test time is restricted then it is essential to be able to apply a maximum number of test patterns in this period and therefore a high test pattern data rate is required. Again to ensure the safety of the circuit and to detect failures reliably it is essential to have a known and consistent data rate. The Diagnosys PinPoint test systems have precision high quality pin electronics, hardware backdrive timers and consistent defined high data rates. In addition a cool-down period is automatically applied by default to ensure connected devices are not stressed during any in- Doc ref: Ov Obs/01 Page 1 of 3 www.diagnosys.com circuit test. All of these factors ensure that an in-depth test of a components or a circuit is performed so that maximum digital fault detection is achieved. Functional test Functional test of a circuit can be digital, analog or mixture of both types of signal applied at an edge connector or natural boundary in the circuit. To deliver maximum test coverage and accurate fault identification a test system must have the ability to apply and measure all of these types of signal requirements. With extensive experience in this type of testing the PinPoint range of systems from Diagnosys offer: dedicated Digital channels; Universal hybrid channels; integrated separate and configurable instruments; Matrix switching. All of this functionality can be applied to a circuit at an edge connector or to an individual device or group of devices allowing the programmer to test, detect and accurately identify any failure in the circuit. Vectorless test Vectorless test is a term used to describe a power-off test method that does not use test patterns. Some of the implementations require the use of a capacitive plate or inductive sensor placed accurately above the device under test. Although this has found some good applications in production test environments where test fixtures are used and the precise positioning of the sensors can be repeated, it is generally not practical for a repair environment. Impedance signatures do however offer an effective Vectorless technique that is eminently suitable for a repair environment. It is often referred to as VI testing as it uses the separate voltage and current components to determine an impedance signature for nodes on the circuit. The signatures are learnt from a known good circuit and then stored as a test program. There are often in depth discussions on the frequency, voltage and other programmable parameters for these tests, however the important feature is how well a particular test system can find a fault using the method. The Diagnosys PinPoint systems automatically learn a signature for a circuit node using optimum system settings and produce discernible differences of 7pF, 7uH, 0.5Ω. In addition several alternative signatures can be learnt for any node to automatically allow for variations in a signature when a different device manufacturer is encountered in the circuit. Impedance signatures are a very valuable and effective way to complement other test methods and can detect: short circuits; open circuits; resistive faults and out of tolerance components; capacitive faults and out of tolerance components; inductive faults and tolerance issues; static damage to protection diodes. Used as part of the test program they give automatic fault detection and as an interactive tool in the hands of an experienced operator, will indicate the type of fault on the network. Accurate and repeatable impedance signatures are available on all the Diagnosys PinPoint systems. For circuits with a high content of small passive components it can be a time consuming and error prone process to manually probe the required nodes. The Diagnosys AutoPoint DT system is specifically designed for a support or repair environment and can be either used Doc ref: Ov Obs/01 Page 2 of 3 www.diagnosys.com stand-alone or integrated with a PinPoint system to remove the need for manually probing these types of boards. By using a multi test strategy approach and employing appropriate test methods the Test Programmer can help address the issue of NFF circuits. By having access to a test system that supports these strategies and test methods, for example the Diagnosys PinPoint range, the test Programmer can rapidly produce effective test programs that help overcome NFF situations efficiently and effectively. Doc ref: Ov Obs/01 Page 3 of 3 www.diagnosys.com