Download unit 1 – construction of logic gates

1.0 INTRODUCTION
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Characteristics of the active electronic components
that determine the internal construction and
operation of electronic circuitry of a logic gate.
+5V
1k
Y=0
10k
A=1
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1.1 Types of logic gates
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NOT
AND
OR
XOR
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1.1 Types of logic gates (cont.)
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NAND
NOR
XOR
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1.2 Diode as a voltage controlled switch
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p-n junction component
Two type material: p-type & n-type
Operation: forward biased & reverse biased
Knee voltage: 0.7V (Si) n 0.3V (Ge)
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1.2 Diode as a voltage
controlled switch
(cont.)
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Operation
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0V – knee voltage
 Small current’s flow
Beyond knee voltage
Negative voltage
 Leakage current
More negative voltage
 Zener voltage
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1.2 Diode as a voltage controlled switch (cont.)
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Forward biased vs. reverse biased
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1.2 Diode as a voltage controlled switch (cont.)
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Diode works as a logic ON/OFF switch
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1.2 Diode as a voltage controlled switch (cont.)
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Voltage range of logic level for TTL digital IC
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1.2 Diode as a voltage controlled switch (cont.)
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Simple 2-input OR gate
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1.3 Transistor as a voltage controlled switch
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p-n junction component
Two type: PNP & NPN
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1.3 Transistor as a voltage controlled switch (cont.)
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B-E junction
as switch
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1.3 Transistor as a voltage controlled switch (cont.)
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Not gate
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1.4 Diode controls switching speed
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Speed limitation when switching diode from ON to OFF
and vice versa
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Minority-carrier density
Reverse biased (OFF)
Forward biased (ON)
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1.5 Switching time
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Rise and fall time
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Time taken for a signal to go from LOW to HIGH and vice versa.
Tr and Tf
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1.5 Switching time (cont.)
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Storage time
(c)
(a) Circuit
(b) Input waveform
(c) Diode current
(d) Diode voltage
(e) Minority carrier
(d)
(e)
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1.5 Switching time (cont.)
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Propagation delay
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Time interval between the application of an input pulse and
the occurrence of the resulting output pulse.
Cumulative time delay when gates are cascaded.
Limits the max freq at which a gate can operate.
 For propagation delay of 40ns; max freq operation is 25MHz
 For propagation delay of 25ns; max freq operation is ???
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1.5 Switching time (cont.)
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Propagation delay (cont.)
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Two types:
 TPLH - delay time from
logic 0 to logic 1.
 TPHL - delay time from
logic 1 to logic 0.
 Measured at 50% on rising
and falling edges of
the input and output.
 Total propagation delay?
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1.6 TTL family
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TTL Series:
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74 Series – First line of standard TTL ICs
74L Series – low-power version
74H Series - high-speed version
74S Series – Schottky TTL, reduce storage time delay
74LS Series – Low-Power Schottky TTL
74AS Series – Advanced Schottky TTL
74ALS Series – Advanced Low-Power Schottky TTL
74F Series – Fast TTL
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1.6 TTL family (cont.)
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TTL NAND Gate Operation
Schottky TTL 74S
Low-Power Schottky TTL
Advanced Schottky TTL,
74AS Series (AS-TTL)
Current-Sourcing and
Current-Sinking Action
Totem Pole TTL
Tristate (Three-state) TTL
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1.7 CMOS family
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CMOS INVERTER GATE
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1.7 CMOS family
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CMOS NAND GATE
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1.7 CMOS family
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CMOS TRANSMISSION GATE
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Pass signal in both direction.
Useful for digital and analog application.
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1.8 Comparison of CMOS and TTL
TTL
CMOS
Noise Margin
0.4V (standard)
1.5V (30% of VDD)
Typically 45%
Power
dissipation
mW
nW
Propagation
delay
TPLH is 11ns – 22ns
TPHL is 7ns – 15 ns
30 - 50ns
Fan-in
Depends on number of
unit loads it can handle.
Usually 3.
Depends on number of
unit loads it can handle
Fan-out
Typically 10
Typically 50
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1.9 Interfacing TTL and CMOS ICs
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Connecting the output(s) of one circuit of system to the
input(s) of another circuit that has different electrical
characteristics.
Why?
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Two things to consider:
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Utilize strong points of different logic families.
Ex: 74AS used in parts need for highest frequency
741 used in slower parts
NMOS for LSI parts of the system.
Voltage
Current
Where? – device data sheets
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1.9 Interfacing TTL and CMOS ICs (cont.)
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CMOS driving TTL
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Input current for CMOS are
low compared to output
current TTL  no prob.
Input voltage for CMOS are
higher than output voltage
TTL  pull-up resistor.
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