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ECM583 Special Topics in Computer Systems Lecture 1. General-Purpose Computer Systems Prof. Taeweon Suh Computer Science Education Korea University A Computer System (till 2008) CPU Main Memory (DDR2) FSB (Front-Side Bus) North Bridge Graphics card Peripheral devices DMI (Direct Media I/F) Hard disk USB South Bridge PCIe card But, don’t forget the big picture! 2 Korea Univ Present, Near Future and More… • • Core 2 Duo – based Systems CPU CPU FSB (Front-Side Bus) Main Memory (DDR2) Main Memory (DDR3) Quickpath (Intel) or Hypertransport (AMD) North Bridge North Bridge DMI (Direct Media I/F) Core i7– based Systems South Bridge DMI (Direct Media I/F) South Bridge Keep in mind that CPU and computer systems are evolving at a fast pace 3 Korea Univ x86 History (as of 2008) 4 Korea Univ x86 History (Cont.) 4-bit 32-bit (i586) 8-bit 32-bit (i386) 16-bit 32-bit (i686) 64-bit (x86_64) 2009 Core i7 5 Korea Univ x86? • What is x86? Generic term referring to processors from Intel, AMD and VIA Derived from the model numbers of the first few generations of processors: • 8086, 80286, 80386, 80486 x86 Now it generally refers to processors from Intel, AMD, and VIA • x86-16: 16-bit processor • x86-32 (aka IA32): 32-bit processor • x86-64: 64-bit processor * IA: Intel Architecture • Intel takes about 80% of the PC market and AMD takes about 20% Apple also have been introducing Intel-based Mac from Nov. 2006 6 Korea Univ Example: Intel’s Core 2 Duo L1 32 KB, 8-Way, 64 Byte/Line, LRU, WB 3 Cycle Latency L2 4.0 MB, 16-Way, 64 Byte/Line, LRU, WB 14 Cycle Latency Core0 DL1 DL1 Core1 IL1 IL1 L2 Cache Source: http://www.sandpile.org 7 Korea Univ Example: Intel’s Core i7 • 4 cores on one chip • Three levels of caches (L1, L2, L3) on chip • L1: 32KB, 8-way • L2: 256KB, 8-way • L3: 8MB, 16-way • 731 million transistors in 263 mm2 with 45nm technology 8 Korea Univ Example: AMD’s Opteron - Barcelona • • • • 4 cores on one chip 1.9GHz clock 65nm technology Three levels of caches (L1, L2, L3) on chip • L1: 64KB, L2: 512KB, L3: 2MB • Integrated North Bridge 9 Korea Univ Chipset • We call North and South Bridges as Chipset • Chipset has many PCIe devices inside • North Bridge • Memory controller PCI express ports to connect Graphics card http://www.intel.com/Assets/PDF/datasheet/316966.pdf South Bridge HDD (Hard-disk) controller USB controller Various peripherals connected • Keyboard, mouse, timer etc • PCI express ports http://www.intel.com/Assets/PDF/datasheet/316972.pdf Note that the landscape is being changed! For example, memory controller is integrated into CPU 10 Korea Univ PCI, PCI Express Devices • PCI (Peripheral Component Interconnect) • PCIe (PCI Express) Computer bus connecting all the peripheral devices to the computer motherboard Replaced PCI in 2004 Point-to-point connection PCI express slots PCI slot PCI express slot x16 http://www.pcisig.com/specifications/pciexpress/ 11 Korea Univ An Old GP Computer System Example 12 Korea Univ PCI Express Slots in GP Systems PCI express slot 13 Korea Univ GP Computer System in terms of PCIe North Bridge South Bridge 14 Korea Univ Core i7-based Systems • Core i7 860 (Lynnfield) – based system • Core i7 920 (Bloomfield) – based system 15 Korea Univ Hardware/Software Stack in Computer Applications • Application software Written in high-level language (MS-office, Google Earth…) API (Application Program I/F) • System software Compiler • Translates code written in high-level language to machine code Operating System (Linux, Vista, Mac OS …) BIOS provides common I/Fs BIOS (AMI, Phoenix Technologies …) Instruction Set Architecture (ISA) Computer Hardware (CPU, Chipset, PCIe cards ...) Operating System • Handling input/output • Managing memory and storage • Scheduling tasks & sharing resources BIOS (Basic Input/Output System) • ISA Interface between hardware and low-level software • Hardware Processor, memory, I/O controllers 16 Korea Univ How the GP Computer System Works? • x86-based system starts to execute from the reset address 0xFFFF_FFF0 The first instruction is “jmp xxx” off from BIOS ROM • BIOS (Basic Input/Output System) Detect and initialize all the devices (including PCI devices via PCI enumeration) on the system Provide common interfaces to OS Hand over the control to OS • OS Manage the system resources including main memory • Control and coordinate the use of the hardware among various application programs for the various users Provide APIs for system and application programming 17 Korea Univ GP Systems’ Differences from Other Computer Systems • How is it different from other computers systems such as embedded systems? General-purpose computer systems provide programmability to end-users • You can do any kinds of programming on your PC C, C++, C#, Java etc General-purpose systems should provide backward compatibility • A new system should be able to run legacy software, which could be in the form of binaries with no source codes written 30 years ago So, general purpose computer system becomes messy and complicated, still containing all legacy hardware functionalities 18 Korea Univ Abstraction • Abstraction helps us deal with complexity Hide lower-level detail • Instruction set architecture (ISA) An abstract interface between the hardware and the low-level software interface 19 Korea Univ Abstraction Analogies Driver Customer Abstraction layer Abstraction layer Machine Details Machine Details Combustion Engine in a car Break system in a car 20 Hardware board in a vending machine Korea Univ Abstraction in Computer Users Application programming using APIs Abstraction layer Operating Systems Abstraction layer Instruction Set Architecture (ISA) Hardware implementation Core0 Provides APIs (Application Programming Interface) Machine language Assembly language Core1 L2 Cache 21 Korea Univ A Typical Memory Hierarchy • Take advantage of the principle of locality to present the user with as much memory as is available in the cheapest technology at the speed offered by the fastest technology lower level higher level On-Chip Components L1I (Instr Cache) DTLB Reg File ITLB CPU Core L1D (Data Cache) Speed (cycles): ½’s 1’s Size (bytes): 100’s 10K’s Cost: L2 (Second Level) Cache Main Memory (DRAM) Secondary Storage (Disk) 10’s 100’s 10,000’s M’s G’s T’s highest lowest 22 Korea Univ Typical and Essential Instructions • Instruction categories Arithmetic and Logical (Integer) Memory Access Instructions • Load and Store Registers in x86 EAX, EBX, ECX, EDX .. CS, DS, SS, ES… Branch Floating Point 23 Korea Univ Levels of Program Code • High-level language Level of abstraction closer to problem domain Provides for productivity and portability • Assembly language Textual and symbolic representation of instructions • Hardware representation Binary digits (bits) Encoded instructions and data 24 Korea Univ Instructions and Instruction Set • If you want to talk to foreigners, you should be able to speak their languages Likewise, to talk to a computer, you must speak its language • The words of a computer’s language are called instructions • The collection of instructions is called instruction set • Different CPUs have different instruction sets x86 has its own instruction set ARM has its own instruction set But, they have many aspects in common 25 Korea Univ x86 Instruction Examples • For more information on the complete instruction sets of x86, refer to the following links http://www.intel.com/products/p rocessor/manuals/ 26 Korea Univ High Level Code to Assembly to Executable • What steps do you take to run your program after writing your code “hello.c” on your Linux machine? #include <stdio.h> int main(void) { printf("Hello World!\n"); return 0; } %gcc hello.c -o hello” %./hello % Hello World! %objdump –D hello // hello is a machine code (binary or executable) // it shows human-readable code 27 Korea Univ Reality check: High Level Code to Assembly to Executable C program preprocessor cpp (C-preprocessor) in Linux GNU C Expanded C program compiler gcc in Linux GNU C assembly code as in Linux GNU assembler Human-readable assembly code object code library routines linker Machine code ld in Linux GNU executable Linux kernel loads the executable into memory 28 loader memory Korea Univ Reality check: High Level Code to Assembly to Executable (Cont) • The command “gcc” hides all the details • Try to compile hello.c with “gcc –v hello.c –o hello” You will see all the details of what gcc does for compilation • Compilation goes through several steps to generate machine code #include <stdio.h> Preprocessor Compilation Assembler Linker int main(void) { printf("Hello World!\n"); return 0; } 29 Korea Univ Reality check: High Level Code to Assembly to Executable (Cont) • Preprocessing Use to expand macros and header files included %cpp hello.c > hello.i • open “hello.i” to see what you got • Compilation Actual compilation of the preprocessed code to assembly language for a specific processor %gcc -Wall -S hello.i • Result will be stored in hello.s • Open hello.s to see what you got • Assembler Convert assembly language into machine code and generate an object file %as hello.s -o hello.o • The resulting file ‘hello.o’ contains the machine instructions for the Hello World program, with an undefined reference to printf 30 Korea Univ Reality check: High Level Code to Assembly to Executable (Cont) • Linker Final stage of compilation Linking object files to create an executable In practice, an executable requires many external functions from system and C run-time (crt) libraries Consequently, the actual link commands used internally by GCC are complicated. Example • %ld -dynamic-linker /lib/ld-linux.so.2 /usr/lib/crt1.o /usr/lib/crti.o /usr/lib/gcc/i386-redhat-linux/4.3.0/crtbegin.o -L/usr/lib/gcc/i386redhat-linux/4.3.0 hello.o -lgcc -lgcc_eh -lc -lgcc -lgcc_eh /usr/lib/gcc/i386-redhat-linux/4.3.0/crtend.o /usr/lib/crtn.o -o hello • Note that “i386-redhat-linux/4.3.0/” is dependent on your Linux version • Now run your program %./hello // Linux kernel loads the program into memory %Hello World! // output 31 Korea Univ Stored Program Concept Memory (DDR) CPU FSB (Front-Side Bus) Main Memory (DDR) Address Bus North Bridge DMI (Direct Media I/F) South Bridge CPU Data Bus • • • • Instructions are represented in binary, just like data Instructions and data are stored in memory CPU fetches instructions and data to execute Programs can operate on programs • Binary compatibility allows compiled programs to work on different computers e.g., compilers, linkers, … Standardized ISAs 32 Hello World Binary (machine code) 01101000 11100111 10100000 11110011 01100000 00110011 00110000 01010101 00011111 11100111 11000011 00110011 11100101 11000011 00011110 01010101 C compiler (machine code) “Hello World” Source code in C Korea Univ CPU Operation Registers 32 bits CPU (MIPS) PC 0x0000 0x0004 0x0008 $zero $at 0x00110011 $v0 Address Bus 0x0014 0x0018 $v1 0x00220022 … Memory 0x00220022 0x00110011 0x0018 0x0014 add lw lw 0x0008 0x0004 0x0000 R3 + 0x00330033 Data Bus $fp $ra 33 v0,v1,v0 v1, 8(s8) v0, 4(s8) Korea Univ