Download Active Power Filter Control Strategy With Implicit

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
2721
Active Power Filter Control Strategy With Implicit
Closed-Loop Current Control and
Resonant Controller
Mauricio Angulo, Domingo A. Ruiz-Caballero, Jackson Lago, Student Member, IEEE,
Marcelo Lobo Heldwein, Member, IEEE, and Samir Ahmad Mussa, Member, IEEE
Abstract—Novel simple indirect control concepts for an active
power filter (APF) application are proposed here. The concepts
are exemplarily presented to control a modified APF structure.
The main advantage over other control strategies is the achieved
excellent simplicity-to-performance ratio. The proposed control
strategies are based on the concept of virtual impedance emulation
to provide high power factor in a system. To validate the operating
principle, a single-phase low-power prototype has been built and
experimentally tested. This prototype operates at a remarkably
low switching frequency of 5 kHz and is digitally controlled by
a digital signal processor.
Index Terms—Active power filter (APF), dc–ac converters, implicit control, sensorless control techniques.
I. I NTRODUCTION
N
ONLINEAR loads connected to electric energy distribution networks generate harmonic pollution. Such nonlinear loads drain currents with varying degree of harmonic
contents. The harmonic current components do not represent
useful active power due to the frequency mismatch with the grid
voltage. However, the circulation of harmonic currents through
feeders and protective network elements produces Joule losses
and electromagnetic emissions that might interfere with other
devices connected to the distribution network. This affects the
electrical performance of control and communication systems
involved with the protective elements. Several other harmful
effects are observed as presented in [1] and [2].
A remedy to the harmonic current injection problem is to
connect passive, active [3], [4], or hybrid [5] filters in parallel
with the loads. These are named shunt active power filters
(APFs) [6], [7]. APFs are circuits based on switched power
semiconductors (typically employing voltage-source inverters)
that inject opposed phase harmonic currents at the point of
common coupling (PCC). This results in the whole nonlinearload-plus-APF system emulating a nearly resistive load behav-
Manuscript received July 19, 2011; revised October 26, 2011, February 14,
2012, and March 22, 2012; accepted March 30, 2012. Date of publication
April 27, 2012; date of current version February 28, 2013.
M. Angulo and D. A. Ruiz-Caballero are with the Power Electronics Laboratory (LEP), Pontificia Universidad Católica de Valparaíso, Valparaíso 4059,
Chile (e-mail: [email protected]; [email protected]).
J. Lago, M. L. Heldwein, and S. A. Mussa are with the Power Electronics
Institute (INEP), Federal University of Santa Catarina (UFSC), Florianópolis 88040-970, Brazil (e-mail: [email protected]; [email protected];
[email protected]).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2012.2196898
Fig. 1. APF connected in parallel with the loads—shunt-type APF. The filter
current iF supplies the load harmonic current contents.
ior at the PCC terminals. Power transmission in the network is,
thus, optimized, and all nonlinear load low-frequency-harmonic
electromagnetic compatibility issues are diminished.
Two tasks are crucial to an APF to perform well its function, namely, the generation of appropriate current references
and the ability to rapidly follow the reference current signals.
Thus, typical shunt APFs use the error signal generated by
the comparison of measured currents with the references. The
main control objective is to minimize such error. Finally, the
employed controllers generate the modulation signals to the inverter power section. Generally, error minimization is achieved
through two different types of methods, the direct control
methods or the indirect ones. In the direct control methods,
the required compensation inverter current reference is the one
generated within the control algorithm. On the other hand, the
indirect control methods generate the APF current reference
indirectly, i.e., by causing that the APF-plus-nonlinear-load
currents follow sinusoidal reference current signals in phase
with the PCC voltages. Therefore, using the scheme shown
in Fig. 1
Nh,max
i∗F
=
i∗s
− io =
i∗s,nonactive
−
io(h)
(1)
h=1
where i∗F and i∗s are the APF and the PCC reference currents,
respectively, i∗s,nonactive is the nonactive current component
of the mains current is , and io(h) represents the load-side
current harmonics of order h. This condition guarantees that
the correct inverter compensation current is injected even if
the mains voltage presents harmonic distortion. The indirect
control methods are typically easier to implement since only
the input variables (currents and voltages) are measured. On the
other hand, the direct methods require sophisticated reference
generation mechanisms.
0278-0046/$31.00 © 2012 IEEE
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
Fig. 2. (a) Typical single-phase APF system architecture. (b) APF architecture
used in this work.
Fig. 2(a) shows a conventional APF system architecture
where the smoothing inductor LF is series connected to the
voltage-source inverter. The compensation opposite phase load
harmonic currents flow through the inductor, generating the
according harmonic voltages across the inductor in this architecture. Assuming a purely sinusoidal mains voltage vs results
in that the voltage drop across the inductor is generated by the
inverter output voltage. Thus, the bandwidth of the modulation
signal must be compatible with the voltage harmonics that
are to be generated since the modulation signal is directly
proportional to such voltage. In practice, considering that up
to the 50th-order harmonic component must be compensated in
specifications such as that given in the IEEE 519 standard and
the IEC 61000-3 series, i.e., 2.5 kHz in a 50-Hz network, leads
to the need to employ high switching frequency fc . Carrier
frequencies above fc > 25 kHz would be desirable, and the
local averaging method would provide proper results to model
the system.
A solution to this challenge is to consider the APF system architecture shown in Fig. 2(b) [8]–[11]. The smoothing inductor
LF is now placed in series with the network and not with the
inverter as usual. The dc-link capacitor CF requirements are
approximately the same as in the standard APF configuration.
The disadvantages of this architecture are that the inductor
carries the full load current, except the harmonics, the PCC
voltage vo is now switched (it requires a low-pass filter prior
to the load), and the load voltage can be distorted due to
load current harmonic components. Another aspect is that the
presence of LF limits the rate of change of the load current.
However, this APF structure implies an advantage from the
APF control strategy viewpoint. The inductor current reference
is now sinusoidal and in phase with the mains voltage as is the
APF modulating signal m(t). Therefore, the inductor current
becomes independent from the harmonic currents of the load. It
follows that
v̄o = v̄F = V̂ · sin(ω1 · t + ϕ)
(2)
where x̄ represents the local average value of x during a carrier
period, V̂ is the peak value of the mains voltage, and ω1
is the mains voltage angular frequency. In this context, the
present work proposes novel indirect APF control methods
to be applied in the modified shunt APF structure shown in
Fig. 2(b).
The proposed control strategy is much simpler to implement than conventional strategies, such as the ones listed in
the following. Perhaps, the most widespread method is the
average current mode control [12], which presents an outer
voltage control loop and an internal current control loop. Large
control bandwidths are typically required with this approach.
Hysteresis current control is also employed and demands a
single outer voltage control loop to generate the current references. This scheme leads to very fast dynamics but brings
all disadvantages inherent to variable switching frequency.
Examples of digital control strategies using intern model principles are the adaptive [13] and the dead-beat control. One
of the main control challenges faced in all these strategies is
the generation of current references. Among the theories to
compute the compensation reference current are the p–q theory
[14], [15], the synchronic reference frame [16], the discrete
Fourier transform [17], adaptive neural networks [1], [13], and
Lyapunov-function-based control [18], [6]. These techniques,
while having an acceptable performance for achieving input
unity power factor, are relatively complex to implement. In the
case of digital programming, powerful digital signal processors
(DSPs) are required in addition to analog-to-digital converters,
phase-locked loops, and other demanding software tasks.
Novel APF control indirect strategies are proposed here as
alternative to the cited techniques. These novel indirect methods are based on the concept of virtual impedance emulation
through inverters to achieve unity input power factor. A key
feature is that either mains-side current or voltage sensor is
used, leading to sensorless strategies. The APF implicit current
reference does not contain high-order harmonic components to
ensure unity power factor at the mains, and thus, the control
function is greatly simplified, leading to the control methods
derived in Section II. The system is theoretically analyzed
in Section III. The strategies can be implemented with both
analog and digital electronics, demanding minimum hardware
and data processing capabilities. The achieved performance is
similar or superior to that attained with conventional strategies
as shown through the simulation and experimental results given
in Sections IV and V. The main contribution of this work lies
on the use of very simple implicit current controllers to control
an APF.
II. APF I NDIRECT C ONTROL S TRATEGY C ONCEPTS
A. Current Sensorless Strategy
Applying Kirchhoff’s second law to the circuit in Fig. 1 gives
v s − LF ·
dis
− (sp − sn ) ·vc = 0
dt
(3)
=sF
where sp and sn are the switching functions for switches Sp
and Sn , respectively. These are defined as +1 if a switch is
ANGULO et al.: APF CONTROL STRATEGY WITH CLOSED-LOOP CURRENT CONTROL AND RESONANT CONTROLLER
closed and 0 when it is off. The resulting switching function
for the filter comprehends both of these into sF = sp − sn . The
switching signals are generated by a proper modulation scheme.
For the case at hand, phase-shifted pulsewidth modulation
(PWM) is adopted. The high-frequency (HF) harmonics are
typically eliminated with filters, and the following analysis
considers only the low-frequency behavior of the circuit. This is
achieved with the definition of the local average value x̄ of the
quantities within a switching period Ts . Applying this definition
to the APF switching function leads to
s̄F =
t
1
Ts
sF dt = dF
(4)
t−T s
where dF is the resulting APF duty cycle. This is to be generated by the control strategy. Applying (4) to (3) results in
v̄s − LF
dīs
− dF v̄c = 0.
dt
v̄s
Re∗
(6)
where Re∗ is the desired resistance value.
The APF dc-link voltage is controlled with a variable vm
defined as
vm =
kVc∗
Re∗
Fig. 3. Block diagram for the current sensorless control strategy based
on (12).
PWM leads to the output of the inverter generating a voltage
with twice the carrier frequency and with reduced current
ripple. The procedure to determine the duty cycle described
earlier is input current sensorless and has the advantage of only
measuring the input and the dc-link voltages to generate the
control signal.
B. Voltage Sensorless Strategy
(5)
Assuming that a unity input power factor is to be achieved,
the system should emulate a resistive behavior. Thus
īs =
(7)
Similar to the input current sensorless strategy, an input
voltage sensorless strategy is derived in the following.
Replacing vs from (6) in (5) gives
Re∗ īs − LF
where k is a gain and
is the dc-link voltage reference.
Isolating Re∗ in (7) and using it in (5) give
d v̄s vm
(8)
− dF v̄c = 0.
v̄s − LF
dt kVc∗
(9)
where ω is the sinus angular frequency.
The control signal vm is assumed constant at steady state.
Thus, (8) is rewritten as
ω 2 LF
v̄s +
(10)
(v̄s vm ) dt − dF v̄c = 0.
kVc∗
Defining
2
k1 =
ω LF
kVc∗
and replacing it in (9) result in
v̄s
k1
+
dF =
v̄c
v̄c
(11)
(v̄s vm ) dt.
(12)
The resulting control block diagram is shown in Fig. 3. This
control strategy is simple and does not require complex computations for the generation of references. The phase-shifted
dīs
− dF v̄c = 0.
dt
During sinusoidal steady state
d
(īs ) = −ω 2
dt
(13)
īs dt.
(14)
Defining the dc-link voltage control signal as
vm =
Vc∗
Assuming a purely sinusoidal v̄s leads to
d
2
(v̄s ) = −ω
v̄s dt
dt
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Rs Vc∗
Re∗
(15)
where Rs is the current measurement gain, and substituting the
aforementioned relations into (13) lead to
īs
Vc∗ Rs
+ ω 2 LF īs dt − dF v̄c = 0.
(16)
vm
Defining gain k2 as
k2 =
LF ω 2
Rs Vc∗
and dividing (16) by Vc∗ Rs finally give the duty cycle
dF
īs
k2
īs dt.
=
+
Rs Vc∗
vm v̄c
v̄c
(17)
(18)
The voltage sensorless control strategy based on (18) is
implemented with the block diagram shown in Fig. 4. The
strategy is straightforward and similar from the practical implementation aspects to the current sensorless one. The advantage
of this approach over the current sensorless one is that overcurrent protection techniques are easier to implement with the
current measurement. However, the semiconductor currents are
not directly measured in neither approaches. Suitable current
protection for insulated-gate bipolar transistors can be implemented through high-performance gate drivers, low-precision
current sensors, and the measurement of the dc-side current.
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
Fig. 6. Block diagram for a control strategy based on the emulation of a virtual
negative inductance to cancel the effects of LF and guarantee close-to-unity
power factor.
Fig. 4. Block diagram for the voltage sensorless control based on (18).
Fig. 5. Equivalent circuit for the control strategy to emulate virtual capacitance Ceq .
III. T HEORETICAL A NALYSIS OF THE P ROPOSED I NDIRECT
C ONTROL S ENSORLESS S TRATEGIES
This section presents theoretical analyses regarding the
equivalent circuit observed from the mains and the equivalence
between the proposed control technique and a control strategy
that uses conventional feedback control theory with a resonant
controller to obtain close-to-unity power factor. Furthermore, a
general stability analysis is presented.
A. Equivalent-Circuit-Based Analysis
Considering the low-frequency behavior of the proposed
APF configuration and a constant dc-link voltage vc = Vc∗ =
Vc leads to
dis
dīs
v s = LF
+ sF vc ∼
+ dF V c .
= LF
dt
dt
(19)
Replacing the duty-cycle calculation function defined in (18)
into (19) gives
R s Vc
dīs
+
vs ∼
(20)
īs + ω 2 LF īs dt
= LF
dt
vm
1
=Leq
=
=Re
Ceq
where the parameters Leq , Re , and Ceq are the equivalent
circuit elements that model the controlled system. The equivalent circuit is shown in Fig. 5. This expression shows that the
equivalent input impedance of the active filter with the proposed
control strategy includes a series connection of a resistance Re
and a capacitance Ceq . The resistance is responsible for the
active power transference to the load, whereas the series capacitance compensates for the filter inductance LF . A frequencydomain analysis is applied to the equivalent circuit. The first
step is to define the reactive impedances
jXL = jωLeq and
√
−jXC = −j/(ωCeq ), with j = −1. Computing the total
equivalent series impedance gives
jω 2 LF
=0
jXL − jXC = jωLF −
ω
(21)
from where it is clear that the generated virtual capacitance does
cancel the effects of the filter inductance regarding the lowfrequency behavior of the system. Therefore, theoretical unity
power factor is achieved.
The capability of bidirectional inverters to emulate virtual
negative inductances has been proved in other applications [19],
[20]. Therefore, another implementation possibility for the proposed APF control is to replace the virtual capacitance with a
virtual negative inductance. This is derived from the idea given
by the mains-side equivalent circuit analysis producing a series
capacitance. The according control diagram implementation is
shown in Fig. 6, where
k3 =
−LF
.
Vc∗ Rs
(22)
Such a control method is equivalent in many aspects to the
virtual capacitance method. However, since it employs a differentiation block, it tends to present faster dynamics and is more
prone to electromagnetic noise interference. Furthermore, the
stability aspects are different as presented in Section III-C. The
duty-cycle equation is then
dF =
Rs Vc∗
Lf dīs
.
īs −
vm v̄c
v̄c dt
(23)
The generation of virtual impedances can be used to insert
reactive power to the grid. This is done by deliberately changing
parameters k1 , k2 , or k3 at each of the control strategies. The
effect is the emulation of a larger or smaller virtual impedance.
B. Equivalent-Feedback-Control-Based Analysis
The proposed control methods do not present an explicit
current loop control. The current control is actually implicit
in the control laws (12), (18), and (23) that determine the
APF duty cycle. This is understood in the following. A classic
feedback control loop is shown in Fig. 7, where C(s) represents
a current controller, G(s) is the system model, and H(s) is
the transfer function of the measurement chain. The derivation
in the following shows the equivalence between the proposed
control methods and a conventional feedback control loop
assuming that both are in steady state with a constant dc-link
voltage vc = Vc∗ . Finally, the large-signal models are linearized
around an operation point.
Analyzing Fig. 7 results in the current controller being
C(s) = ˜∗
Is
I˜s
1
− 1 · G(s)
(24)
ANGULO et al.: APF CONTROL STRATEGY WITH CLOSED-LOOP CURRENT CONTROL AND RESONANT CONTROLLER
Fig. 7.
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Current control closed loop.
and the transfer functions Is∗ /I˜s and G(s) must be found for the
proposed APF control strategies.
The loop equation of the circuit in Fig. 2 is
v̄s − LF
dīs
− RL īs = dF v̄C
dt
where RL represents the inductor parasitic resistance.
The current reference is given by
vs
i∗s =
Re
(25)
(26)
where Re is the actual emulated resistance.
Assuming that vs is sinusoidal and considering that is is
proportional to it, it follows that
dīs
= −ω12 īs dt.
(27)
dt
To obtain a single equation that represents the control system, (26) and (27) are replaced in (25), neglecting RL and
resulting in
(28)
Re īs + LF ω12 īs dt = dF v̄C .
Subtracting (25) from (28) gives
v̄s − LF
dīs
= Re īs + LF ω12
dt
īs dt.
(29)
Linearizing (29) produces
LF I˜s = R̃e Is,0 + Re,0 I˜s +
ω12 LF I˜s
s
(30)
where ˜· represents the linearized variable and subscript 0 denotes the operating point. The linearization of (26) leads to
Re,0
R̃e = −I˜s
.
Is,0
(31)
Replacing (31) in (30) gives the linearized transfer function
from the measured current to the reference current
s2 +
I˜s∗
=
I˜s
s
τe
s
τe
+ ω1
(32)
with τe = LF /Re,0 .
The next step is to find the plant function G(s). This is
obtained with the linearization of (25). Thus
G(s) =
with τL = LF /RL .
I˜s
1
V∗
= c
R L 1 + τL s
d˜F
(33)
Fig. 8. Equivalent circuit for the control strategy to emulate both virtual
capacitance Cv and negative inductance Lv .
Finally, substituting (32) and (33) in (24) gives the equivalent
implicit current controller Cimplicit (s) transfer function
Re s s + τ1
·
(34)
Cimplicit (s) =
Vo s2 + ω12
which shows the transfer function of a resonant controller tuned
at ω1 . Resonant controllers in current control give excellent
results with purely sinusoidal references [21]. The high gain
at the tuned frequencies guarantees the reference follow-up and
the rejection of components in other frequencies. In the proposed methods, the implicit resonant controller is implemented
in a much simpler way than with the conventional control
methods. Moreover, it follows from (34) that the bandwidth of
the controller varies with the fundamental frequency w1 and the
values of the circuit parameters Re and LF . Similar results are
found for the equivalent input current sensorless case.
C. Stability Analysis
The proposed control strategies given by (18) and (23) can be
combined to analyze both options simultaneously and, in an implementation, to gain advantage from both sides. This strategy
includes the integral (virtual capacitance) and derivative (virtual
inductance) portions. This strategy gives
1
dīs
dF v̄c = īs Re + (Ls + Lv )
+
(35)
īs dt
dt
Cv
where Cv and Lv are the emulated (virtual) capacitance and
inductance, respectively. These are computed to result in
jXL − jXC = jω(LF − Lv ) − j
1
= 0.
ωCv
(36)
Thus, it guarantees zero mains current phase displacement. This
system generates the equivalent circuit shown in Fig. 8, which
is used in the following stability analysis.
The transfer function from the mains voltage to the current
in Fig. 8 is found as
I˜s (s)
s
.
= 2
s (LF + Lv ) + sRe + 1/Cv
Ṽs (s)
The poles from the system modeled with (37) are
−Re ± Re2 − 4(LF + Lv )/Cv
psystem =
.
2(LF + Lv )
(37)
(38)
Assuming positive Re , i.e., power flow from the mains
toward the load, and positive Cv , i.e., a capacitance to cancel
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
Fig. 9. APF power stage setup used both in the simulations and in the
experimental results.
the effects of the APF inductance LF , the system poles are in
the right half-plane if
Leq = LF + Lv > 0.
(39)
Therefore, the first stability criterion is that the total series
equivalent inductance is positive. This prevents the emulation of
a pure negative inductance because, if Lv = −LF , the system
is oscillatory. A practical implementation would require either
a pure virtual capacitance or a combination with a negative
inductance so that (39) is met.
Still, from (38), the system presents damped oscillatory
responses if
LF + Lv
Re
<
4
Cv
(40)
where Re = Vs2 /Po depends on the load power.
IV. S IMULATION R ESULTS
The power stage configuration used in the simulation-based
analysis of the proposed APF system is shown in Fig. 9. A
remarkably low APF switching frequency of fc = 5 kHz is
used to highlight the performance of the proposed concepts.
Other experimental parameters are as follows: The input ac
voltage is set to Vs,rms = 110 V, mains frequency fs = 60 Hz,
APF inductance LF = 12.83 mF, HF filter inductance L1 =
1.4 mH, HF filter resistance RL = 2 Ω, HF filter capacitance
CL = 8 μF, and HF filter capacitance C1 = 0 μF (not used in
this implementation). These setup parameters were chosen to
approach the experimental setup in Section V. The nonlinear
load is a single-phase diode bridge rectifier with the following
parameters: Ro = 40 Ω, Co = 940 μF, and L2 = 1 mH.
The simulation results are shown in Fig. 10 for the voltage
sensorless control strategy. Fig. 10(a) shows the nonlinear load
currents at the PCC (io ) and after the HF filter (ir ). The currents
are similar except from the HF harmonics and present a high
total harmonic distortion (THD) even considering only the first
50 harmonic components. The APF capacitor voltage vC , the
APF output voltage vo , and the mains voltage vs are shown in
Fig. 10(b). The dc-link control variable vm shown in Fig. 10(c)
is approximately constant as expected during steady state. The
mains current is shown in Fig. 10(d) in phase with the mains
voltage despite the large filter inductance of LF = 12.83 mH.
Thus, it proves the capability of the novel APF concept to
emulate a resistive behavior when observed from the mains.
Finally, Fig. 10(e) shows the APF duty cycle.
Fig. 10. Simulation result waveforms for the voltage sensorless indirect
control strategy. (a) Load-side PCC current io and rectifier current ir . (b) APF
capacitor voltage vC , APF output voltage vo , and mains voltage vs . (c) DClink control variable vm . (d) Mains current is . (e) APF control variable dF .
(f) Load voltage.
Similar results are found for the current sensorless control
strategy as seen in the respective graphs shown in Fig. 11. Both
Figs. 10(f) and 11(f) show the load voltage at the terminals
of the CL −RL branch with the respective THD values. It can
be seen that harmonic distortion appears as the load current
causes a distorted voltage across inductor L1 , which is partially
filtered with the parallel branch RL −CL . This effect should be
analyzed on a case-based approach in order to evaluate the load
voltage. Reducing inductor L1 , increasing CL , and/or including
capacitance C1 reduces the load voltage distortion as presented
in the filter design guidelines provided in the Appendix.
In order to compare the transient performances of the voltage
sensorless control strategies, a simulation with the same conditions including an input voltage step at t = 1.1 s from 100% to
120% of rated voltage and a load step from 75% to 100% of
rated power at t = 1.75 s was carried out. The results for the
purely capacitive emulation (Cv + Re ) and the combination of
both virtual capacitance and negative inductance (Cv + Lv +
Re ) are shown in Fig. 12. As it is very difficult to observe the
differences in the mains current, a variable related to the power
factor is used. This local power factor variable is defined as
1
Tg
λTg = 1
Tg
t
t−Tg
t
t−Tg
vs2
dt
vo io dt
1
Tg
t
(41)
i2s
dt
t−Tg
where Tg is the mains fundamental period. It gives the correct power factor at steady state and an impression of the
ANGULO et al.: APF CONTROL STRATEGY WITH CLOSED-LOOP CURRENT CONTROL AND RESONANT CONTROLLER
2727
Fig. 12. Simulation result waveforms for the current sensorless indirect
control strategy. (a) Local power factor value according to (41). (b) Mains
current is and (c) APF capacitor voltage vC during an input voltage transient at
t = 1.1 s from 100% to 120% of rated voltage and a load transient from 75%
to 100% of rated power at t = 1.75 s for the two voltage sensorless control
strategies. The ratio from XLv to XCv is XLv /XCv = 4.
Fig. 11. Simulation result waveforms for the current sensorless indirect
control strategy. (a) Load-side PCC current io and rectifier current ir . (b) APF
capacitor voltage vC , APF output voltage vo , and mains voltage vs . (c) DClink control variable vm . (d) Mains current is . (e) APF control variable dF .
(f) Load voltage.
power deviations during transients. Fig. 12 shows that the
combined method gives shorter transients and that both methods achieve close-to-unity power factor at steady state for all
tested load conditions. Both control strategies have presented
similar results regarding the mains-side current is and the APF
dc-link voltage vC , which are exemplarily shown in Fig. 12.
The settling time was below 1 s for the given simulation
conditions and is mainly dictated by the APF dc-link voltage
control loop. This is designed, as in a single-phase power factor
correction (PFC) rectifier, with low control bandwidth in order
not to distort the mains-side current.
Fig. 13. Experimental waveforms for the single-phase APF system shown in
Fig. 9. Currents: Nonlinear load io , active filter inverter iF , and mains is .
V. E XPERIMENTAL R ESULTS
A low-power single-phase laboratory prototype of the proposed APF (cf. Fig. 9) has been built in order to validate the
theoretical analysis of the indirect control. The experimental
setup employs the same configuration and parameters as the
system used in the circuit simulations.
The implementation of the modulation algorithm is performed in a fixed-point DSP, model TMS320F2812—Texas
Instruments. The control software was implemented using
“C” language. Even though the voltage sensorless strategies
employing both capacitance and combined capacitance and
negative inductance have been implemented and tested, the
presented results are for the virtual capacitance control method
because the achieved results are similar.
Fig. 13 shows the waveforms of the mains is , load io , and
APF iF currents. The current drawn from the power grid is
close to a sine wave. The presented distortion appears due to the
distortion of the mains voltage. This verifies that the operation
of the APF is appropriate, i.e., the load emulates a resistance
from the viewpoint of the power grid. This can be clearly seen
in Fig. 14, where the mains current and voltage are in phase and
presenting similar harmonic contents except from the switching
noise observed at the voltage measurement due to noise coupled
to the voltage probe. The effect of the emulation of a virtual
capacitance in series with the APF inductor guarantees that the
mains current phase displacement is close to zero even with the
large value of the inductance LF .
The APF synthesized current and dc-link voltage are shown
in Fig. 15. The dc-link voltage is nearly constant at its set-point
value around 300 V, thus proving a good voltage regulation
across the dc bus.
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
Fig. 14. Experimental waveforms for the single-phase APF system shown in
Fig. 9. Mains current is and voltage vs .
Fig. 16. Experimentally obtained frequency spectra (peak values) for the
mains current is and the load current io . The THDs for the currents are
measured up to 3 kHz, i.e., h = 50th harmonic. Measured THDs: THDvs =
6.85%, THDis = 5.82%, and THDio = 79.02%.
Fig. 15. Experimental waveforms for the single-phase APF system shown in
Fig. 9. Filter current iF and dc-link voltage vC .
The frequency spectra of the mains is and load io currents
are shown in Fig. 16. The load has a very high THD of
THDio ∼
= 79.02%, while the current supplied by the power grid
presents a low harmonic distortion of THDis ∼
= 5.82% with a
mains voltage THD of approximately THDvs ∼
= 6.85%. The
main causes for the presented current distortion are, thus, the
input voltage distortion and the overlock and delay times in the
prototype. All harmonic components observed in Fig. 16(a) are
clearly below the IEC 61000-3-2 standard limits for both Class
A and Class D equipment. The harmonic components beyond
23 up to 50 present a maximum rms current value of 57 mA.
Thus, the implemented prototype is able to fulfill the harmonic
limits given in IEC 61000-3-2. This shows the effectiveness of
the proposed control strategy.
VI. C ONCLUSION
Novel control strategies for a modified shunt APF architecture have been proposed here. The proposed strategies were
able to guarantee close-to-unity power factor. Both current
and voltage sensorless versions have been presented, where
the voltage sensorless control has been analyzed in detail
regarding its performance, equivalent circuits, and stability.
The main feature of the strategies is their extreme simplicity
since no complex current reference computations are required.
The implicit control loop is another innovative characteristic.
In this sense, it was proven that the proposed strategies are
equivalent to explicit current control strategies employing a
resonant-type controller. This explains the excellent sinusoidal
tracking performance. In addition to the resistive behavior, the
APF emulates virtual capacitance and/or negative inductance.
Thus, zero mains-side current phase displacement is achieved.
These characteristics were verified through circuit simulation
and in an experimental setup including a nonlinear rectifier
load, with the APF being switched at 5 kHz. This is a very
low switching and highlights the achievable performance. The
concepts can be easily extended to the control of PFC rectifiers
and three-phase systems.
A PPENDIX
The passive component parameters employed in the prototype were not optimized in any sense. Design guidelines
are presented in the following to improve the filter overall
performance.
The first parameter to be chosen is the dc-link voltage. In
the configuration shown in Fig. 9, the APF dc-link voltage vc
must be higher than the mains maximum peak voltage (V̂s,max )
added to the maximum Lf inductor voltage drop (vLf ,max )
at any instant. In addition, there should be enough margin to
guarantee that the APF dynamic is capable to handle transients.
A 25% margin is suggested. Thus
5
(42)
V̂s,max + vLf ,max .
Vc ≥
4
The inductance value of Lf is designed to limit the HF
current ripple toward the mains (ΔIs ). This depends on the
APF switching frequency and dc-link voltage, leading to
Lf ≥
Vc
.
4ΔIs fc
(43)
ANGULO et al.: APF CONTROL STRATEGY WITH CLOSED-LOOP CURRENT CONTROL AND RESONANT CONTROLLER
Inductor L2 is typically part of the load and is not considered
here as a part of the APF.
The APF output filter must be designed to attenuate the HF
components of the voltage vo , which is switched, so to limit
the output voltage (vl ) ripple. Considering the phase-shifted
modulation used in this paper, the most significant of these HF
components occurs at 2fc ± fs .
The function of this passive HF filter is to attenuate the
HF harmonic components generated by the switching of the
semiconductors. It is not a filter for low-frequency current
harmonics since these harmonic components are handled by the
active filter. The inductance L1 must be as small as possible to
present a large impedance to the load current. This would generate voltage distortion in the presence of current harmonics.
However, it must be large enough to limit the current ripple at
io (ΔIo ) similar to the design of Lf . Thus, the maximum and
minimum values for L1 can be approximately computed with
L1 ≥
L1 <
Vc
4ΔIo fs
∞
1
2 k2
n
n
n=3,5,7,...
k9 = 0.0072, and k11 = 0.0065. The THDv desired was chosen
as 4%, and the m factor was imposed as one.
Applying the procedure and rounding the results of capacitances for commercial values, the filter parameters are C1 =
CL = 33 μF, L1 = 630 μH, and RL = 6.8 Ω. The computed
load voltage THD was THDvl = 4.75%.
R EFERENCES
(45)
where Pl is the load active power, THDv is the maximum
allowed THD at the load voltage generated by the load current, and kn is the relative amplitude of the nth load current
harmonic.
The HF filter attenuation asymptote is mainly defined by L1
and C1 . Parameters RL and CL are used for passive damping
and influence only around the resonance frequency. Thus, once
L1 is determined, capacitance C1 is designed to provide the
required attenuation for the voltage components at frequencies
2fc ± fs . It is suggested to set the natural frequency of this filter
around 2fc /10 to achieve an attenuation around 40 dB
C1 =
Fig. 17. Simulation result waveforms for the voltage sensorless indirect
control strategy. (a) Load current ir and mains current is . (b) Load voltage
vl and mains voltage vs .
(44)
THDv V̂s2 πfs Pl
2729
1
4π 2 fo2 L1
.
(46)
The RL −CL branch is designed to provide damping. An
optimal value for these components to provide a minimal output
impedance for the filter can be chosen with [22]
CL = mC1
L1 (2 + m)(4 + 3m)
RL =
·
C1
2m2 (4 + m)
(47)
(48)
where m must be imposed.
Fig. 17 shows the simulation results obtained from a new set
of parameters for the HF filter to validate the design guidelines
presented earlier. The load was the same as that used in Fig. 10.
The load power is approximately Pl = 560 W being supplied
with a sinusoidal voltage (110 V). The load current presents a
crest factor of 2.4. The coefficients of the harmonic currents
required to determine L1 can be obtained from a simulation
of this load being supplied by a sinusoidal voltage supply. The
coefficients used here are k3 = 0.774, k5 = 0.438, k7 = 0.160,
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Jackson Lago (S’11) received the B.S. degree in
electrical engineering from the University Center of
Jaraguá do Sul (UNERJ), Jaraguá do Sul, Brazil,
in 2009 and the M.S. degree from the Federal University of Santa Catarina (UFSC), Florianópolis,
Brazil, in 2011, where he is currently working toward
the Ph.D. degree in the Power Electronics Institute
(INEP).
Mauricio Angulo was born in Osorno, Chile, in
1973. He received the B.Sc. degree in electrical engineering from Universidad Técnica Federico Santa
María (UTFSM), Valparaíso, Chile.
In 2006, he collaborated as Research Assistant with the Electronics Engineering Department,
UTFSM. He is currently with the Power Electronics
Laboratory (LEP), Pontificia Universidad Católica
de Valparaíso, Valparaíso. His fields of interest include power converter control techniques, particularly multilevel converters and active filters.
Marcelo Lobo Heldwein (S’99–M’08) received the
B.S. and M.S. degrees in electrical engineering from
the Federal University of Santa Catarina (UFSC),
Florianópolis, Brazil, in 1997 and 1999, respectively,
and the Ph.D. degree from the Swiss Federal Institute
of Technology (ETH) Zurich, Zurich, Switzerland,
in 2007.
From 1999 to 2001, he was a Research Assistant
with the Power Electronics Institute (INEP), UFSC.
From 2001 to 2003, he was an Electrical Design Engineer with Emerson Energy Systems, in Brazil and
Sweden. From 2008 to 2009, he was a Postdoctoral Fellow with INEP, UFSC,
under the Programa De Apoio a Projetos Institucionais Com a Participação De
Recém-Doutores (PRODOC)/Coordenação De Aperfeiçoamento De Pessoal
De Nível Superior (CAPES) program. He is currently an Adjunct Professor with
the Electrical Engineering Department, UFSC. His research interests include
power factor correction techniques, power conversion for energy distribution,
multilevel converters, and electromagnetic compatibility.
Dr. Heldwein is a member of the Brazilian Power Electronics Society
(SOBRAEP).
Domingo A. Ruiz-Caballero was born in Santiago,
Chile, in 1963. He received the B.Sc. degree in
electrical engineering from Pontificia Universidad
Católica de Valparaíso, Valparaíso, Chile, in 1989
and the M.Eng. and Dr.Eng. degrees from the Power
Electronics Institute (INEP), Federal University of
Santa Catarina (UFSC), Florianópolis, Brazil, in
1992 and 1999, respectively.
Since 2000, he has been with the Department
of Electrical Engineering, Pontificia Universidad
Católica de Valparaíso, where he is currently an
Adjunct Professor. His fields of interest include high-frequency switching
converters, power quality, multilevel inverters, and soft-switching techniques.
Dr. Ruiz-Caballero is currently a member of the Brazilian Power Electronics
Society (SOBRAEP).
Samir Ahmad Mussa (M’06) was born in Jaguari,
Brazil, in 1964. He received the B.S. degree in
electrical engineering from the Federal University of
Santa Maria, Santa Maria, Brazil, in 1988, the B.S.
degree in mathematics/physics from the University
of Philosophy and Sciences, Santa Maria, Brazil, in
1986, and the M.Eng. and Ph.D. degrees in electrical
engineering from the Federal University of Santa
Catarina (UFSC), Florianópolis, Brazil, in 1994 and
2003, respectively.
He is currently an Adjunct Professor with the
Power Electronics Institute (INEP), UFSC. His research interests include digital
control applied to power electronics, power factor correction techniques, and
digital signal processor/Field Programmable Gate Array applications.
Dr. Mussa is currently a member of the Brazilian Power Electronics Society
(SOBRAEP).