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Project Title: Active Power Filter Students: Alon Shamay Dudu Yaakobi Director: Prof. Shmuel Ben-Yaacov Abstract The rapid increase in use of electronic equipment in recent years imposes nonlinear loads on the ac main that draws a reactive and harmonic current in addition to the active current. The reactive and harmonic current lead to low efficiency, harmful electromagnetic interference to neighboring appliances (Fig. 1), as well as heating the transformers. Vast numbers of power factor correction techniques have been proposed, most of which use a current shaper to shape the input current to sinusoidal waveform. There are several problems with that technique. Firstly, since the current shaper is in the cascade path of the power, it processes all the power and thus requires high current and high voltage semiconductor devices and involves significant power losses. Secondly, it is not convenient to insert a current shaper in existing electronic equipment, since significant redesign would be required. An alternative parallel harmonic correction technique – a shunt active power filter (APF) – has been investigated by many researchers. An active power filter is a device that is connected in parallel (Fig. 4) to cancel the reactive and harmonic currents from a group of nonlinear loads so that the resulting total current drawn from the ac main is sinusoidal (Fig. 3). Ideally, the APF needs to generate just enough reactive and harmonic current to compensate for the nonlinear loads in the line (Fig. 2), thus it handles only a fraction of the total power to the load. The performance of the active power largely depends on the inverter topologies and PWM control method. Our application (implementation of the project) is based on a switched converter of the Full-Bridge type. The control module is based on a microchip microcontroller. The stage is capable handling transition power of up to 500W. Figure 1. Non-linear load current. Figure 2. Controller current. Figure 3. Total current. Figure 4. Parallel active power filter. Figure 5. Layout. Figure 6. The circuit.