Download High-performance differential VCO based on armstrong oscillator

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 1, JANUARY 2001
139
High-Performance Differential VCO Based on Armstrong Oscillator Topology
Nikolay T. Tchamov, Tero Niemi, and Niko Mikkola
Abstract—A symmetric topology based on the classical Armstrong’s oscillator was developed and implemented as a fully
monolithic voltage-controlled oscillator using ST Microelec= 35 GHz). It oscillates
tronics’ 0.35- m BiCMOS process (
at a center frequency of 4.4 GHz, has a tuning range of 1.0 GHz,
delivers a single-ended output power of 6.5 dBm, and the
minimum current consumption is less than 4 mA from a 2.5-V
power supply. The phase noise is 125 dBc/Hz, measured at
3-MHz offset.
Index Terms—BiCMOS technology, multi-GHz VCO, wide
tuning range.
I. INTRODUCTION
T
HE HUGE growth in the production volumes of high-performance and low-cost wireless and optical communication units (mobile phones, W-LAN, O-LAN, etc.) has led to
strong demand for fully monolithic solutions in low-cost integrated technologies [1]–[5]. The major difficulties with full integration concern mainly the voltage-controlled oscillator (VCO)
and power amplifier (PA). It seems that the VCO is much nearer
to full integration using the present achievements in silicon technologies.
II. CIRCUIT TOPOLOGY
In this work, the classical Armstrong oscillator [6], [13] is
modified in order to achieve fully monolithic and differential
realization, here referred to as the symmetrical Armstrong
voltage-controlled oscillator (SA-VCO), which is presented
in Fig. 1. A similar basic idea but with a different topology
was used in [7]. In our work, taking the oscillation signal from
the core of the VCO in a different manner further enhances
the pulling figure. We also connect an inductor between the
emitter branches of the differential pair and the output node of
the simple current mirror formed by Q3 and Q4 to improve the
differential-pair common-mode rejection ratio (CMRR). The
idea of the emitter inductor was introduced in an earlier work of
ours [8]. The benefits of integrated inductors and transformers
over resistors certainly are:
1) high gain in the vicinity of the resonance frequency
while frequencies not of interest (noise) are much less
amplified;
Manuscript received May 17, 2000; revised August 18, 2000. This work was
supported in part by the Academy of Finland as part of the project Analog and
Digital Signal Processing Techniques for Highly Integrated Transceivers.
N. T. Tchamov is with the Telecommunications Laboratory, Tampere University of Technology, 33720 Tampere, Finland (e-mail: [email protected]).
T. Niemi is with Elektrobit Ltd., 33720 Tampere, Finland (e-mail:
[email protected]).
N. Mikkola is with Nokia Mobile Phones, 33720 Tampere, Finland (e-mail:
[email protected]).
Publisher Item Identifier S 0018-9200(01)00443-7.
Fig. 1. Schematic of the SA-VCO.
2) lowered power supply still produces higher swing of
the voltage output;
3) an emitter coil enhances the output impedance of the
current mirror and thus the CMRR of the differential
stage;
4) in symmetric stages due to the mutual inductance, the
decrease in current in one branch of the transformer will
stimulate an increase in current in the other branch making
the stage faster;
5) mutual inductance leads to a smaller physical size
for the transformer with the same inductance thus contributing to an improvement in the -factor;
6) a differentially driven inductor has both the -factor
and the self-resonance frequency nearly doubled compared to a single-ended driven inductor [9].
III. OPERATION AND DESIGN OF THE SA-VCO
The operational principle of the circuit is based on the classic
Barkhausen criterion where the cross-connected differential pair
provides the negative resistance. The bias of transistors Q1 and
Q2 is fed from the center-tap of a secondary coil of the transformer. The power supply is coupled to the center-tap of a primary coil of the transformer, which together with the pn-junction varactors form the collector loads of Q1 and Q2. For low
phase noise, a high -factor of the resonator and high oscillation amplitude is required [10]. The amplitude can be further increased by increasing the bias current, but at the expense
at the center
of greater power consumption. The voltage
tap of the TF can be adjusted to avoid the increase in phase
noise caused by the forward bias of the base–collector junction.
The main losses and reduction in -factor are primarily due to
0018–9200/01$10.00 © 2001 IEEE
140
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 1, JANUARY 2001
parasitic capacitance between the inductor and substrate, metal
losses of the inductor windings at lower frequencies, skin effect
at high frequencies, eddy currents, and substrate losses due to a
relatively highly doped substrate [11]. To overcome these problems at high frequencies, smaller inductor areas were favored,
the inner turns of the coils were omitted, and only the uppermost
metal was used for inductors.
The scaling of transistors was done keeping in mind noise
issues, parasitic capacitances, and current gain and density. Denoise, which
vice noise sources include thermal, shot, and
dominates at lower frequencies. The phase noise of the VCO is
noise, which is upconverted into the operpartly due to this
noise corner was simulated for
ating frequency band. The
and
several types of transistors, concurrently checking the
current gain curves of the transistors in order to find the optimum size and shape. Low thermal noise due to the base resistance requires a larger transistor at the expense of higher current
consumption. Large transistors may also suffer from the degradation in noise performance at gigahertz frequencies because
the transistor current gain begins to decrease.
The output is taken from the emitter resistors and fed to a
buffer stage. The use of emitter degeneration resistors enhances
the pulling figure by about a factor of two. However, the phase
noise increases due to additional noise generated by the resistors. The simulations showed that the phase noise was increased
by 4 dB at 3-MHz offset. This could be avoided by using inductors instead of resistors. The output impedance of the CM
can be modeled as a large resistor in parallel with a small capacitor, which causes the common-mode gain to rise by 6 dB/octave at high frequencies [12]. The emitter inductor cancels out
the transfer-function zero caused by the parasitic capacitors at
the collector node of the CM output transistor and thus also cancels out the increase in the common-mode gain. The output transistor of the CM should be kept as small as possible in order
to minimize those parasitic capacitors and to maintain the high
output impedance.
IV. A SYNCHRONOUSLY TUNED BUFFER APPROACH
The buffer is needed to drive off-chip 50- loads and could
be omitted if the transceiver is fully integrated. In addition, it
isolates the core of the SA-VCO from the load, thus enhancing
a load-pulling figure. The realized buffer is a differential amplifier that works with a reduced bandwidth and is controlled
together with the VCO. Since the transformer is not ideal, it has
a relatively poor coupling. Thus, the output power suffers but
the load has less influence on the oscillation frequency, i.e., the
pulling figure of the VCO is improved.
V. SIMULATION RESULTS
After the initial values were designed, the SA-VCO circuit
was simulated with CADENCE Spectre RF. The inductors
and transformers were designed using the tool ASITIC.1 The
nominal power consumption of the SA-VCO from a 2.5-V
power supply is less than 10 mW (without the buffer and
control blocks) when the circuit produces a differential output
1ASITIC: Analysis of Si inductors and transformers for ICs. [Online.] Available: http://www.eecs.berkeley.edu/~nikjenad
Fig. 2. Chip microphotograph (0.95 mm
2 1.2 mm).
Fig. 3. Measured tuning range is 1000 MHz with a total slope of 355 MHz/V.
signal of 600 mV
at 4.9 GHz. The tuning range is 1.0
GHz with a supply of 2.5 V. The pulling figure is 5.4 MHz,
which is more than two times better than the pulling figure of
12 MHz obtained when the output of the VCO is taken from
the bases of Q1 and Q2 without emitter degeneration resistors
2). The single-ended
(voltage standing wave ratio, VSWR
output power to a 50- load equals 6.5 dBm and is relatively
constant over the whole frequency range. The simulations were
done with a total supply current of 18 mA. If the SA-VCO is
used in a fully integrated transceiver, it consumes only 4 mA
(i.e., the core of the VCO consumes only 4 mA).
VI. MEASUREMENTS
Measurements of the SA-VCO (Fig. 2) were made on a
Cascade Summit-9000 probe station. The tuning curve and
output power were measured using a Rohde & Schwartz
FSEM30 spectrum analyzer. Other measurements were carried out using a HP4352B VCO/PLL signal analyzer with a
HP70427 microwave downconverter. The measured results
indicated with a solid line and the simulated curves with a
dash–dot line are very close to each other. The measured
tuning range is 1000 MHz with a total slope of 355 MHz/V
(Fig. 3). The single-ended output power to the 50- load
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 1, JANUARY 2001
141
noise of 102.5 dBc/Hz at 600-kHz offset and 125 dBc/Hz
at 3-MHz offset at a frequency of 4.7 GHz (Fig. 5). There is
a substantial difference between phase-noise simulations and
measurements since the simulations were carried out using the
standard bipolar model instead of the high-precision models.
VII. ANALYSIS OF THE RESULTS AND CONCLUSION
The simulated and measured frequency ranges match very
closely. The phase noise of the SA-VCO can be improved, and
still maintain the enhancement of the pulling figure by using
emitter inductors instead of resistors.
REFERENCES
Fig. 4. Measured single-ended output power is
0
08 dBm.
Fig. 5. Phase noise is 102.5 dBc/Hz at 600-kHz offset and
3-MHz offset at 4.7 GHz.
0125 dBc/Hz at
equals 8 dBm and is presented together with the simulated
values in Fig. 4. When the insertion losses of the output cable
(1.16 dB between 3.6 and 5.4 GHz) and the HP11742 blocking
capacitor (0.3 dB) are taken into account, the real output power
equals 6.5 dBm as was simulated. The SA-VCO has a phase
[1] P. Orsatti, F. Piazza, Q. Huang, and T. Morimoto, “A 20-mA-receive
55-mA-transmit GSM transceiver in 0.25-m CMOS,” in IEEE Int.
Solid-State Circuits Conf., 1999, pp. 232–233.
[2] K. Irie, H. Matsui, T. Endo, K. Watanabe, T. Yamawaki, M. Kokubo, and
J. Hildersley, “A 2.7-V GSM RF transceiver IC,” in IEEE Int. Solid-State
Circuits Conf., 1997, pp. 302–303, 475.
[3] R. G. Meyer, W. D. Mack, and J. J. E. M. Hageraats, “A 2.5-GHz
BiCMOS transceiver for wireless LAN,” in IEEE Int. Solid-State
Circuits Conf., 1997, pp. 310–311, 477.
[4] M. Bopp, M. Alles, M. Arens, D. Eichel, S. Gerlach, R. Götzfried, F.
Gruson, M. Kocks, G. Krimmer, R. Reimann, B. Roos, M. Siegle, and
J. Zieschang, “A DECT transceiver chip set using SiGe technology,” in
IEEE Int. Solid-State Circuits Conf., vol. 1999, pp. 68–69.
[5] B. Razavi, “A 900-MHz/1.8-GHz CMOS transmitter for dual-band applications,” IEEE J. Solid-State Circuits, vol. 34, pp. 573–579, May
1999.
[6] E. H. Armstrong, “Some recent developments in the audion receiver,”
Proc. IRE, vol. 3, no. 9, pp. 215–247, Sept. 1915.
[7] M. Zannoth, B. Kolb, J. Fenk, and R. Weigel, “A fully integrated VCO
at 2 GHz,” in IEEE Int. Solid-State Circuits Conf., 1998, pp. 224–225.
[8] N. Tchamov and P. Jarske, “New low-power GHz-range resonance-ring
IVO/VCO,” in Proc. 3rd IEEE Int. Conf. Electronics, Circuits and Systems, vol. 1, Oct. 1996, pp. 358–361.
[9] A. M. Niknejad, J. L. Tham, and R. G. Meyer, “Fully-integrated lowphase-noise bipolar differential VCOs at 2.9 and 4.4 GHz,” in Proc. 25th
Eur. Solid-State Circuits Conf., 1999, pp. 198–201.
[10] D. B. Leeson, “A simple model of feedback oscillator noise spectrum,”
Proc. IEEE, vol. 54, no. 2, pp. 329–330, Feb. 1966.
[11] J. Craninckx and M. S. J. Steyaert, “A 1.8-GHz low-phase-noise CMOS
VCO using optimized hollow spiral inductors,” IEEE J. Solid-State Circuits, vol. 32, pp. 736–744, May 1997.
[12] P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated
Circuits, 3rd ed. New York: Wiley, 1993.
[13] E. H. Armstrong, “Some recent developments in the audion receiver,”
Proc. IEEE, vol. 85, pp. 685–697, Apr. 1997.