Download Chapter 02 - UNT College of Engineering

Chapter 2
Logic Functions and Gates
Basic Logic Functions
• The three basic logic functions are:
– AND
– OR
– NOT
2
Logic Function Representation
• Logic functions can be represented:
–algebraically
–using truth tables
–using electronic circuits.
3
Algebraic Representation
• Uses Boolean algebra.
• Boolean variables have two states
(binary).
• Boolean operators include AND, OR,
and NOT.
4
Truth Table Representation
• Defines the output of a function for
every possible combination of inputs.
• A system with n inputs has 2n possible
combinations.
5
Electronic Circuit Representation
• Uses logic gates to perform Boolean
algebraic functions.
• Gates can be represented by schematic
symbols.
• Symbols can be either distinctive-shape
or rectangular-outline.
6
Distinctive Shape Schematic
Symbols
• Uses different graphic representations
for different logic functions.
• Uses a bubble (a small circle) to
indicate a logical inversion.
7
Rectangular-Outline Schematic
Symbols
• All functions are shown in rectangular
form with the logic function indicated by
standard notation inside the rectangle.
• The notation specifying the logic
function is called the qualifying symbol.
• Inversion is indicated by a 1/2
arrowhead.
8
NOT Function
• One input and one output.
• The output is the opposite logic level of
the input.
• The output is the complement of the
input.
9
NOT Function Boolean
Representation
• Inversion is indicated by a bar over the
signal to be inverted.
YA
10
NOT Function Electronic Circuit
• Called a NOT gate or, more usually, an
INVERTER.
• Distinctive-shape symbol is a triangle
with inversion bubble.
• Rectangular-shape symbol uses “1” and
the inversion 1/2 arrowhead.
11
NOT Function Electronic Circuit
12
AND Function
• Two or more inputs, one output.
• Output is HIGH only when all of the
inputs are HIGH.
• Output is LOW whenever any input is
LOW.
13
AND Function
A
B
Y
0
0
0
0
1
1
1
0
1
0
0
1
14
AND Boolean Representation
• AND symbol is “•” or nothing at all.
Y  A B
Y  AB
15
AND Function Electronic Circuit
• Called an AND gate.
• Distinctive-shape symbol uses AND
designation.
• Rectangular-shape symbol use “&” as
designator.
16
AND Function Electronic Circuit
17
AND Function Electronic Circuit
18
AND Function Electronic Circuit
A
B
C
Y
0
0
0
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
0
0
0
0
0
1
19
OR Function
• Two or more inputs, one output.
• Output is HIGH whenever one or more
input is HIGH.
• Output is LOW only when all of the
inputs are LOW.
20
OR Function
A
B
Y
0
0
0
0
1
0
1
0
1
1
1
1
21
OR Boolean Representation
• OR symbol is “+”.
• Y=A+B
22
OR Function Electronic Circuit
• Called an OR gate.
• Distinctive-shape symbol uses OR
designation.
• Rectangular-shape symbol uses “” as
designator.
23
OR Function Electronic Circuit
24
Active Level
• The logic level defined as “ON” for a
circuit.
• When a logic HIGH is “ON”, the signal is
active-HIGH.
• When a logic LOW is “ON”, the signal is
active-LOW.
25
NAND Function
• Generated by inverting the output of the
AND function.
• Output is HIGH whenever any input is
LOW.
• Output is LOW only when all inputs are
HIGH.
26
NAND Function
A
B
Y
0
0
1
0
1
1
1
0
1
1
1
0
27
NAND Boolean Representation
• Uses AND with an inversion overbar.
Y  A B
28
NAND Function Electronic Circuit
• Called a NAND gate.
• Uses the AND symbol with inversion on.
29
NAND Function Electronic Circuit
30
NOR Function
• Generated by inverting the output of the
OR function.
• Output is HIGH only when all inputs are
LOW.
• Outputs is LOW whenever any input is
HIGH.
31
NOR Function
A
B
Y
0
0
1
0
1
0
1
0
0
1
1
0
32
NOR Boolean Representation
• Uses OR with an inversion overbar.
Y  A B
33
NOR Function Electronic Circuit
• Called a NOR gate.
• Uses OR symbol with inversion on the
output.
34
NOR Function Electronic Circuit
35
3 Input NOR and NAND Function
Truth Tables
• 3 Input NAND: Y  A  B  C
• 3 Input NOR: Y  A  B  C
36
3 Input NOR and NAND Function
Truth Tables
A B C
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
A BC
A BC
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
37
Exclusive OR Gate
• Two inputs, one output.
• Output is HIGH when one, and only
one, input is HIGH.
• Output is LOW when both inputs are
equal – both HIGH or both LOW.
38
Exclusive OR Gate
39
Exclusive OR Gate
A
B
Y
0
0
0
0
1
1
1
0
1
1
1
0
40
Exclusive NOR Gate
• Two inputs, one output.
• Output is HIGH when both inputs are
equal – both HIGH or both LOW.
• Output is LOW when one, and only one,
input is HIGH.
41
Exclusive NOR Gate
42
Exclusive NOR Gate
A
B
Y
0
0
1
0
1
0
1
0
0
1
1
1
43
Gate Equivalence – NAND
• A NAND gate can be represented by an
AND gate with inverted output.
• A NAND gate can be represented by an
OR gate with inverted inputs.
44
Gate Equivalence – NAND
45
Gate Equivalence – NOR
• A NOR gate can be represented by an
OR gate with inverted output.
• A NOR gate can be represented by an
AND gate with inverted inputs.
46
Gate Equivalence – DeMorgan
Forms
• Change an AND function to an OR
function and an OR function to an AND
function.
• Invert the inputs.
• Invert the outputs.
47
DeMorgan’s Theorem - 1
A B  A  B
•
A B  A  B
•
• Break the line and change the sign
48
DeMorgan’s Theorem - 2
• The following are two common errors
associated with DeMorgan’s Theorem:
• A B  A  B
• A B  A  B
49
Active Logic Levels
• Any INPUT or OUTPUT that has a
BUBBLE is considered as active LOW.
• Any INPUT or OUTPUT that has no
BUBBLE is considered as active HIGH.
50
Active Logic Levels - NOR
• Y  A B
• At least one input HIGH makes the
output LOW.
• Y  AB
• All inputs LOW make the output HIGH.
51
Active Logic Levels - NOR
52
Logic Switches
• Provides a logic HIGH or LOW
depending on switch position.
• Commonly used types include normallyopen pushbutton, normally-closed
pushbutton, single-pole single-throw,
and single-pole double-throw.
53
Logic Switches
54
Logic Switches
55
Two-Pole Push Button
• Two-pole push button allows for
normally HIGH and normally LOW
levels from the same switch.
56
Two-Pole Push Button
57
Light Emitting Diodes (LED’s)
• Used to indicate the status of a digital
output.
• Has two terminals the anode and the
cathode.
• If the anode is approximately 1.5 V
greater than the cathode, current flows
and the LED illuminates.
58
Light Emitting Diodes (LED’s)
59
Light Emitting Diodes (LED’s)
60
Light Emitting Diodes
• Used to provide a visual indication of a
logic state.
• Can be wired to display active-HIGH or
active-LOW.
61
Light Emitting Diodes
62
Light Emitting Diodes
63
Logic Gate Enable
• The input to a gate that allows the
output to respond to other inputs.
• A logic LOW for an OR or NOR gate, a
logic HIGH for an AND or NAND gate.
64
Logic Gate Inhibit
• The input to a gate that forces the
output to ignore any other input.
• A logic HIGH for an OR or NOR gate, a
logic LOW for an AND or NAND gate.
65
Logic Gate Inhibit
66
Logic Gate Inhibit
67
Logic Gate Inhibit
68
Logic Gate Inhibit
69
Logic Gate Inhibit
70
Logic Gate Inhibit
71
Logic Gate Inhibit
Control
AND
OR
NAND
NOR
XOR
XNOR
A=0
Y=0
Y=B
Y=1
Y B
Y=B
Y B
A=1
Y=B
Y=1
Y B
Y=0
Y B
Y=B
72
Tristate Buffer
• Three output states, HIGH, LOW and
high-impedance.
• Requires a separate input to control
which output state is selected.
73
Tristate Buffer
74
Tristate Buffer
75
Tristate Buffer Utilization
• Used to connect multiple outputs
together.
• Used in controlling the operation of
buses.
76
Tristate Buffer Utilization
77
The 74LS244 Octal Tri-State
Buffer
• Contains two groups of four noninverting tri-state buffers.
• Each group is controlled by a separate
enable input.
G
78
The 74LS244 Octal Tri-State
Buffer
79
Integrated Circuit Package
• Integrated Circuits (ICs) contain many
components in a single package.
• Several packaging options are
available.
• One common package is called dual-inline (DIP).
80
Integrated Circuit Package
81
Integrated Circuit Technology
• One common form is transistortransistor logic, called TTL.
• The other common form is
Complementary Metal-Oxide
Semiconductor, called CMOS.
82
Integrated Circuit Technology
Part Number
Logic Family
74LS00
Low-power Schottky TTL
74ALS00
Advanced low-power Schottky TTL
74F00
FAST TTL
74HC00
High-speed CMOS
74CT00
High-speed CMOS (TTL-compatible inputs)
74LVX00
74ABT00
Low-voltage CMOS
Advanced BiCMOS (TTL/CMOS hybrid)
83
Integrated Circuit Designation
• Standard form is 74XXFF, where 74 is
the logic family identifier, XX is the logic
family member and FF identifies the
specific logic function.
• SN74ALS00N
84
IC Package Options
• PLCC - plastic lead chip carrier
• SOIC - small outline integrated circuit
• TSSOP – thin shrink small outline
package
• QFP – quad flat pack
• DIP – dual inline package
• BGA – ball grid array
85
IC Package Options
86
PLCC 84 Pin Packages
• Can be mounted on the surface of a
circuit board or mounted in a socket.
• Pins are equally distributed on four sides.
• Pin 1 placed on the center of one of the
rows, as indicated by a dot.
• Pins number counterclockwise from this
point.
87
PLCC 84 Pin Packages
88