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Koc University
Elec 204: Digital System Design Laboratory
Experiment 2
ELEC 204
Digital System Design
LABORATORY MANUAL
Experiment 2:
Introduction to Logic Circuits
College of Engineering
Koç University
Important Note: In order to effectively utilize the laboratory sessions, you should
read the manual and prepare the experiments before the sessions.
Koc University
1.
Elec 204: Digital System Design Laboratory
Experiment 2
Objectives:
The purpose of this experiment is to have you get familiar with the elementary logic gates and use
of them for implementing logic circuits. While doing this, you will implement combinational logic design
methodologies. You will use Field Programmable Gate Arrays (FPGA), where you will create your design
using the Foundation series software program that you used in the first experiment. Then you will
download your design to Pegasus FPGA board and will test your design on this board.
2.
Equipments:


3.
Pegasus Board
Pentium PC
Procedure:
i.
ii.
iii.
iv.
4.
Read the Background
Do your preliminary work before hand
Do your experimental work in the lab
Present your lab report before leaving the lab
Background
In a binary digital system, any information signal can represent one of two possible values, ZERO
or ONE. In an electronic switching network, two non-overlapping ranges of voltages typically represent
the two signal levels. One range is located around a more positive voltage level; the other is located around
a more negative voltage level. If the more positive level (H) is associated with binary "1" and the other
with binary "0", the system is called positive logic. Otherwise, it is called negative logic.
In a gate, the signal at the output is ONE or ZERO according to some prescribed logic function
(e.g. AND, OR, NAND, NOR, EX-OR, etc.) of the signals at the inputs. The logic function is determined
by the internal structure of the gate and the convention used to define the logic levels (positive or negative
logic). In a gate, the output is a function of the present inputs only.
5.
Preliminary Work:
5.1. The following H-L truth table is given. Which logical functions does this gate implement
when:
i. Positive logic is used?
ii. Negative logic is used?
Inputs
L
L
H
H
L
H
L
H
Output
H
L
L
L
Table 1. H-L truth table.
Koc University
Elec 204: Digital System Design Laboratory
Experiment 2
Note that the conventional logic is the positive logic, i.e., unless it is specified explicitly, you may
assume that the logic is the positive logic.
5.2 Give the truth table of the gate whose logic symbol is shown below, using positive logic. Also,
note that the small circles represent inversion.
A
B
C
Which logical function does this gate implement? Show that logic OR, NOR, AND functions can
be performed with NAND gates only.
5.3 Design a combinational circuit with four inputs and one output to detect the numbers that are
divisible by 3 or 4. The output should be "1" when the 4-bit binary number at the input is divisible by 3 or
4 and it should be "0" otherwise. Arrange the final Boolean function such that it can be implemented using
only minimum number of NOR gates. Use positive logic.
5.4 Design a combinational circuit with four inputs and one output to implement the logic
function G, which is derived from your student ID. The minterm indices of G will include all hexadecimal
digits in your student ID. For example, if your student ID is 20060222 = 0x132183e, then
G(W,X,Y,Z)=Σm(1,2,3,8,14). Arrange the final Boolean function such that it can be implemented using
only minimum number of NAND gates. Do not forget to use your own student ID in the design. Use
positive logic.
6. Experimental Work
 Re-design the function in 5.4 combining all the minterms of the hexadecimal ID digits from all
experiment partners. For example, if experiment partners have student IDs is 20060222 =
0x132183e and 20070555 = 0x132409b, then G(W,X,Y,Z)=Σm(0,1,2,3,4,8,9,13,14).
 Create a new ‘ID’ schematic. Implement your new G(W,X,Y,Z) design and simulate the
functionality of your design for a few different inputs from the range of 4-bit numbers. Then
download your design to Pegasus FPGA board for further testing.
o Use P89, P88, P87 and P86 for input switches, and P42, P43, P44, P45 and P46 for
output leds.
o While testing your circuit, use the logic switches of the Pegasus board as input. Your
input will be a 4-bit number. You should display the 4-bit input on 4 leds binary and the
1-bit function output on one led.
 Repeat the same implementation using VHDL.
7. Assessment and Lab Report
1. Brief description of the lab experiment including the goals and discussion on the theory of
operation.
2. Design and schematics of your experiment circuit.
3. Present simulation waveforms.
4. Review of the results indicating that the circuit functions properly. You can for instance give a
truth table and indicate that for each entry the logic simulator give the right results. Feel free to
label the waveforms to indicate the proper operation.
5. Conclusions and discussions.