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ECE 4006 Design Project:
Gigabit Ethernet Card Design
Group 3:
Ashley Lee
Shaun Rosemond
10/30/2001
Introduction
With the advancement of technology, the need for increased performance and
speed has been driven with the arrival of multimedia, VoIP (Voice over Internet
Protocol), and other business applications such as databases, applications, and data
warehousing. With the advancement of Ethernet, to Fast Ethernet, and with the advent of
Gigabit Ethernet in 1998, the ability to achieve faster speeds while maintaining cost
effectiveness is still possible. The focus of this design is to provide a fully functioning
Gigabit Ethernet card, incorporation of our new module, to the group for next semester so
that they can build a more cost-effective card. Since the most expensive part of this
design revolves around the optomodule, this is where our design is focused.
In order to reduce the cost of the card, a less expensive optomodule is needed. In
order to be able to test other optomodules, a design needs to be built that incorporates the
current optomodule, but can also be used to test replacement optomodules. The optical
module that is used on the Intel card, and we will be using for our design, is the HFBR53D5 optomodule from Agilent Technologies. This optomodule is compliant with IEEE
802.3z 1000 BASE-SX. According to this standard, a short-wave laser, at 850 nm, is
used with a multimode fiber with an inner core of 50 μm. The optomodule is a VCSEL
(Vertical Cavity Surface Emitting Laser) mounted in an Optical Subassembly (OSA).
The schematic for this circuit is located in Figure 1. This schematic forms the basis of
our design.
Figure 1. Schematic of Optomodule and Connections.
The Design
There are various changes in our design versus the design incorporated in the
previous groups. Our main design change incorporates differential signals rather than
single ended signals coming from the coaxial inputs. Even though the previous groups
achieved operating boards, thoughts were that differential signals would provide stronger
results. In a single ended circuit, noise is gained during transmission of the signal,
thereby attenuating the signal.
The same is true for differential mode circuits, but for
every signal generated on both the transmit and receive ports, an inverted signal of that
exact same signal is also generated. Therefore, if the original signal A is altered by some
random noise , then the inverted signal -A will also be adjusted by that same noise value
. When the two signals are subtracted the resulting signal is one where the noise has
been, in essence, removed via the subtraction, and inherently the signal will be magnified
by two which makes the necessary components of the signal easier to be interpreted by
the internal circuitry of the transceiver. This is shown in Figure 2.
In addition, the new design uses SMA connectors rather than BNC connectors.
SMA connectors offer higher durability due to the fact that they are threaded, which
provides a better connection.
This connection allows SMA connectors to achieve
frequencies up to 18 GHz, while BNC connectors operate up to 4 GHz. Even though we
will not be using frequencies higher than 4 GHz, there are other reasons for choosing the
SMA connector. The SMA connectors are smaller than the BNC connectors, therefore
making it easier to put them onto the board. Also, the oscilloscope that will be used to
test this module comes fitted with SMA connectors as well. Therefore, standard SMA to
SMA cables can be ordered instead of special SMA to BNC cables.
Figure 2. Diagram of Differential Operation.
As mentioned previously, the improved functionality of the new versus old
evaluation board is due to the implementation of the differential inputs/outputs. As a
result, new evaluation boards had to be constructed. These new boards, much like those
fabricated for single-ended implementation, consist of two thin layers of metal, separated
by an insulating material with grooves cut into the insulating material to represent nonconducting surfaces. The new boards are also similar to their predecessors in that they
contain small pinholes necessary to mount the Gigabit Ethernet module and the surfacemount components; the main difference is these new boards have been designed to
incorporate differential capabilities with pin cut-outs for two sets of connectors for the
receive and transmit ports. Figure 3 displays the layout of the new differentially enabled
evaluation board.
Figure 3. Layout Picture of Differential Circuit Board.
Figure 4. Differential GBIC Module Layout
The circuit layout, shown in Figure 4, is that of the transceiver module used in
constructing the evaluation board for differential implementation minus the driver
circuitry employed by the Intel Pro/1000F Gigabit Ethernet Card. In addition, Figure 5
shows the predicted implementation of this design. It has been proven from single-ended
implementation that this design, which only focuses on the transceiver itself, will work as
long as the 50 ohm data inputs are maintained. On the transmit lines, this is explicitly
employed with the use of a 191 ohm resistor in parallel with a 68 ohm resistor.
Preliminary observation shows that these two resistors in parallel result in an equivalent
resistance of 50.15 ohms on each of these lines. The equivalent resistance of 50 ohms on
the receive lines from the module however, is not so obvious. Each of these lines
employs the use of a 267 ohm resistor; these resistors provide the biasing necessary to
drive the transmission lines on the reception side. In addition, these lines are more than
likely terminated within the Intel board with 50 ohm resistors to achieve impedance
matching as well.
Receive
Optomodule Pins:
9
8
7
6
5
4
3
2
1
Vcc1
Vcc2
Part
.01 μF
267 Ω
191 Ω
68 Ω
Color
Yellow
Blue
Red
Green
Transmit
Figure 5. Picture of Planned Implementation of Differential Circuit Design.
The issue of matching the data inputs on the evaluation board with those that
existed on the network card is a fundamental concept behind transmission line theory.
Transmission lines exist in high-performance digital circuits where the operating
frequencies approach a Gigahertz. At high frequencies, traditional circuit approaches do
not apply because they do not assume a finite signal velocity, and on materials such as
printed circuit boards high-frequency signals generate an inherent capacitance,
inductance, and resistance of the equivalent circuit. These possible delays in signal
propagation must be taken into account to maintain proper functionality of the clocks and
switches within the circuit.
Capacitors are also used in the circuit design. The capacitors connected between
the power supply and ground function as coupling capacitors. These coupling capacitors
compensate for the small to medium amount of inductance inherent in the wire to the
power supply, the board, and the bonding of the parts to the board. At high frequencies,
the small inductances model an open circuit resulting in no current flow and cutting off
the amplifier. On the other hand, capacitors model a short circuit at high frequencies. By
placing a capacitor close to the pins connected to the power supply and connecting it to
ground, the capacitor provides the current needed to operate the amplifier, while at the
same time recharge over time from the initial power supply. The .01 μF capacitors, used
in the design, compensate for frequencies between 10-100 MHz.
For frequencies
between 1-10 MHz, a capacitor of .1 μF is needed. For our circuit, there are not any parts
that function at this band of frequencies so the .01 μF will solve the inductance problems.
Taking into account that the transceiver had already been designed for optimal
performance and because that was not the focus of this project, that issue could be
ignored but another issue concerning transmission lines could not be disregarded, and
that is impedance matching. Impedance matching is significant in signal termination.
Every transmission media has a characteristic impedance which is standard for the
transmission of the signal at a desired frequency. When terminating the signal however,
it is imperative that the load placed on the end of the transmission medium be equal to
that of the characteristic impedance such that there is no signal reflection.
Signal
reflection resulting from impedance mismatching induces signal loss that prevents proper
functionality. In regards to this project, 50 ohm terminations have to be maintained on
the evaluation board as well as in the transmission media to ensure optimal performance.
Because RG174 cable which has an operating capacity up to 3GHz and is 50-ohm
terminated, not only will be able to satisfy the high frequency requirement of 1GHz
transmission, but it also matches the 50 ohm terminations present on the board to
minimize signal loss due to signal reflection between connections of various media.
Components to Implement Design
In order to implement the design of this Gigabit Ethernet Card, several parts are
needed. Primarily, an Intel Pro/1000F Gigabit Ethernet Card is needed in order to
interface with the GBIC (Gigabit Interface Card) module, and another Gigabit Ethernet
card in order to establish a network connection. Multimode fiber optic cables with
lengths of 20, 50, and 100 meters will be ordered to test the longest length without high
bit error rates. The Intel Pro/1000F comes with internal testing functions such as internal
loopbacks and end-to-end connectivity to verify the card is sending and receiving a
correct signal.
The following parts are needed in order to build the GBIC: an Agilent HFBR53D5 Optomodule, four SMA connectors, resistors (68 Ω, 191 Ω, 267 Ω), and capacitors
(.01 μF). To connect the card to the Intel board, coaxial cables with an impedance of 50
Ω and an upper frequency of 2.5 GHz is required. By taking the 5th harmonic of a 500
MHz wave, the frequency of signal transmission, the rise and fall times of the edge are
maximized; the 5th harmonic of this frequency is 2.5 GHz. The coaxial cable selected
that meets these requirements is the RG174 cable. Also, two 5V power supplies are
needed to power the GBIC module. If these power supplies cannot be found, the power
supplies of Zip drives provide the proper voltage and connector size to operate our
circuit.
Potential Problems
After assembling and testing the GBIC module, it will be incorporated into the
Intel Pro/1000F board. Pins 2, 3, 7, and 8 will be connected to the Intel board. These
pins as well as other aspect of the Intel board are shown in Figure 6. These four pins are
the transmission and receiving lines of the coaxial. The coaxial cable will have to be
stripped and soldered to the Intel board to provide a good contact.
To prevent the
stripped coaxial cable to be “seen” by the circuit, less than a 1/10 of a wavelength can be
exposed.
As the length increases from 1/10 to ¼ wavelength, phase changes are
introduced that can significantly impact circuit performance. At the 5th harmonic, 2.5
GHz, the length of a wavelength is equal to just less than .1 meters. At 1/10 of a
wavelength, the exposed coaxial cable can be no more than .01 meters. With a short
length of exposed with which to work, soldering becomes increasingly difficult.
Interfacing with Intel Pro/1000F Board
Blue
Yellow
Red
Signal Detect
Resistors
Capacitors
Figure 6. Part of the Intel Board with Connections to the GBIC Module.
Another difficulty is the unknown operation of the signal detect on the
optomodule, which is Pin 4. Even though the previous design team neglected this
connection on their design, its function might determine whether the GBIC module will
work with the card. It is thought that this signal might provide the initial synchronization
of two network cards. If connected, the length of this cable is also required to be less
than .01 meters.
With the removal of the Agilent optomodule from the Intel board, the circuit that
biases the coaxial lines remains intact on the Intel board. Since these resistors and
capacitors are incorporated into the design of the GBIC module, some parts may need to
be removed from the Intel board. It is clear that the resistors will be removed and their
removal should pose no problem, but it is also thought that the capacitors should stay. If
these capacitors were removed, the paths would have to be jumped on the board, and this
would be very difficult if possible at all. In addition, these capacitors more than likely
will not affect the operation of the Gigabit Ethernet card if removed.
There are other potential problems not related to the Intel board. One issue is the
problem is soldering the parts onto the board. Since the space between paths is very
limited and small, there is a possibility of jumping a gap and shorting two leads together.
Also, a cold solder could result if the solder is not fully heated up when a component is
added to the board. This could provide a bad connection resulting in poor performance.
Using good soldering techniques, these issues will be minimized. Another issue is the
potential problem of an inoperative optomodule or other part. The optomodules were
removed from the single-ended boards before being added to our new evaluation boards.
During this process, if the pins on the optomodules were heated enough, the internal
components of the module might not work. The results of this problem cannot be
determined until testing.
Conclusion
The goal of this project is to improve upon a previously designed single-ended
design for a transceiver module with an apparatus with enabled differential outputs while
maintaining an inexpensive cost needed for implementation. Useful information key to
the comprehension and implementation of the new module includes the layout of the
opto-modules within the network card and knowledge of transmission lines when
transferring the opto-module from the Intel network card to the specially designed
evaluation board. While it appears implementation will be a success, implementation
issues such as the use of the signal detect pin, the soldering of the components on the
evaluation board, and the functionality of some of the circuit components on the network
card and whether they will have to be removed or not should be considered and revisited
as a source of error in the event that proper functionality is not achieved.