Download Subthreshold Voltage Operation of Benchmark Circuit c6288

Very Low Voltage Operation
of Benchmark Circuit c6288
Presented By: Murali Dharan
1
Objectives

Reduce the power and power delay
product of c6288 benchmark circuit

To study the effect of voltage reduction on
the power dissipation and delay

To operate the circuit at subthreshold
voltage region and study its effect
2
Need for Voltage Reduction
 Ptotal
= Pstatic + Pdynamic
 Power
dissipation with technology
scaling
 High
Pstatic dissipation from 65nm
onwards
3
Circuit Operation

Above threshold voltage,
transition due to channel
current

Scaling down supply
voltage reduces Short
circuit power
Vdd ≤ |Vtp| + Vtn
4
Why Subthreshold operation?

Below threshold
voltage, transition
due to subthreshold
current
Isub= μ0 Cox(W/L)Vt2 exp {(VGS –VTH + ηVDS)/nVt}
VDS = drain to source voltage
η: a proportionality factor
n = sub threshold slope factor (1 + Cd/Cox)
5
c6288 Circuit Design
The circuit was designed in Verilog
 It was synthesized in 0.18 micron
technology using LeonardoSpectrum
 The synthesized netlist was imported into
Design Architect
 Timing and power analysis was done
using ELDO

6
Model of 16 Bit Multiplier (c6288)
7
Simulation Results
Voltage
(V)
Power (μW)
Delay
(ns)
Power x
Delay (fJ)
3
304.9
0.122
37.296
2
92.3
0.129
11.83
1.5
32.8
0.148
4.8399
1.1
14.7
0.290
4.244
0.85
8.34
0.527
4.392
8
Subthreshold Operation
Voltage
(V)
0.6
Power
(μW)
Power x
Delay (fJ)
1.50
Delay
(ns)
1.50
0.4
4.06 x 10-3
49.5
0.2006
0.3
2.78 x 10-3
461.3
1.2824
0.2
1.41 x 10-3
4017
5.63
0.1
0.64 x 10-3
33450
21.39
2.239
9
Timing Plot
10
Power Delay Product Graphs
Power Delay Plots
Power Delay Product (fJ)
40
35
30
25
Normal Operation
20
Subthreshold Operation
15
10
5
0
0
0.5
1
1.5
2
2.5
3
3.5
Voltage (V)
11
Conclusion




From the graphs, we can infer that the optimum
low voltage operating point is 0.4V which is just
above the threshold voltage.
Circuit still functions properly in subthreshold
region and gives comparable energy savings to
normal operation mode.
More circuits need to be tested to check for
subthreshold voltage operations.
Check circuits in high leakage technologies like
65nm and below.
12
Future Research Work

Testing subthreshold operations of sequential
circuits to check if operations like feedback
causes circuits to malfunction.

Testing subthreshold operation of benchmark
circuits at high leakage technologies as more
leakage current can lead to faster switching with
less power overhead leading to more energy
savings.
13
References

Spring 2009 slides: ELEC6270 Low Power
Design of Electronic Circuits


Dr. Vishwani D. Agrawal
“Modeling and sizing for Minimum Energy
Operation in Subthreshold Circuits”
IEEE Journal of Solid-State Circuits, Vol.40, No.
9, September 2005

Benton H. Calhoun, Student member, IEEE, Alice
Wang, Member, IEEE, and Anantha Chandrakasan,
Fellow, IEEE
14