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Technical collection Capacitor Bank Switching with Vacuum Circuit Breakers 2008 - Conferences publications H. Schellekens Schneider Electric 2008 - Conferences publications 2008 China International Conference on Electricity Distribution (CICED 2008) 1 Capacitor Bank Switching with Vacuum Circuit Breakers Hans Schellekens Schneider Electric, Power SBU, Medium Voltage Development, Usine 38V, ZAC Champ Saint-Ange, Varces, France Abstract: After interruption of a capacitive current sometimes Non Sustained Disruptive Discharges (NSDDs) are observed when using vacuum circuit breakers. According to network calculations, NSDDs generate significant over-voltage on the terminal of the capacitor bank to ground and across the circuit breaker (CB) terminals. In a full scale experiment at 12kV on an 8Mvar capacitor bank artificial NSDDs are produced using a Triggered Vacuum Gap. The over-voltage depends on the momentary voltage difference across the breaker and, hence, varies with the phase angle. The over-voltage on the terminal of the capacitor bank to ground varies from 1.5 to 4.2 pu, and to maximum 5.2 pu. across the CB terminals. The effectiveness of surge arrestors on the limitation of the over-voltages is measured. The over-voltages are limited to 2.2 pu. on the terminals of the capacitor bank to ground and 3.2 pu. across the CB terminals. A single surge arrestor on the neutral point of the capacitor bank yields the same level of protection and, therefore, is a cost effective alternative. An application guide for switchgear and arrestors is presented. 1. INTRODUCTION which appear as NSDDs1. Breakdown frequencies of typically 3/1000 where found under the experimental conditions The capacitive current switching duty is characterised studied. The probability of breakdown depends on the by frequent, day to day or hour by hour, switching of low to dielectric conception or contact stroke of the vacuum moderate currents in industrial or public networks, and by a interrupter. So for the same voltage rating different designs low rate of rise of recovery voltage. Modern circuit breakers lead to different probabilities of occurrence of NSDD. Fig. 1 (CB’s) which claim a long mechanical but also electrical life shows the experimentally found relation between dielectric without maintenance seem to be best adapted to this conception, based on contact gap, and the probability of a switching duty [1,2,3]. Yet the behaviour of vacuum CB’s is NSDD during an operation. It shows that a minimum contact rather different from that of gas CB’s. distance of 16 mm is necessary to reduce this probability Today, the circuit breaker envisioned for capacitor bank below 1/500. switching is either a vacuum or SF6 circuit breaker or a The overvoltage produced by a NSDD differs notably vacuum or SF6 contactor. All these devices are known for from the overvoltage produced by a restrike. A restrike can their long service life. The circuit breaker offers a protection generate an overvoltage of 3 pu. between the terminals of against short circuit currents with an electrical life between the capacitor bank, whereas a NSDD causes a sudden voltage 10.000 and 30.000 operations at nominal current. Contactors shift of the neutral capacitor bank voltage, which leaves the offer an electrical life up to 1 million operations depending on voltage across the capacitor unchanged, but creates an load conditions. SF6 CB’s, in the past referred to as “restrike overvoltage between 1.5 and 5 pu. on the terminal of free” breakers, are according to the new IEC62271-100 class capacitor bank to ground and between 2.5 and 6 pu. across the C2 breakers with proven “very low restrike probability” [4]. CB terminals. Due to this high overvoltage a second NSDD in Field experience indicates that the restrike probability even the adjacent phases becomes more likely. When for the electrically very stressed 36 kV networks is lower than 1/50.000. For vacuum CB’s, the physical processes during the two NSDDs occur simultaneously, the phenomenon turns into a restrike. Typically, a vacuum CB with a contact gap of about 16 mm has a probability of about capacitive switching duty have been studied by [5]. They found that the pre-ignition at contact closing and the subsequent inrush current heavily eroded the contacts leading to detached particles. These particles cause late breakdowns 1 NSDD or non-sustained disruptive discharge [7] is a disruptive discharge associated with current interruption that does not result in the resumption of power frequency current or, in the case of capacitive current interruption does not result in current in the main load circuit. Schneider Electric 2008 - Conferences publications 2008 China International Conference on Electricity Distribution (CICED 2008)) 2 1/500 for producing a NSDD and belongs to the class C2 with The source side of the network is represented by: proven “very low restrike probability”. - a generator with a driving voltage of U - a short circuit impedance of value Ls - a TRV network as defined by IEC for short circuit conditions - a capacitor Cp to account for parallel feeders The load side of the network is represented by: - a 8Mvar capacitor bank with floating neutral - single phase cables between CB and the bank. The load and the source side of the network are connected to each other by the CB. The CB is treated as an Fig.1 : Experimentally found dependence between probability of a NSDD and nominal contact stroke of vacuum interrupter. Due to the rare occurrence and the random nature of the phenomenon, the relation between NSDD and overvoltage is not evident. Therefore in this paper this question is addressed in section II using a numerical network simulation. By this the worst case overvoltage for different voltage levels is determined. Then in section III an experiment designed to verify the simulation results is shown. Here the NSDD is created artificially, which permits to measure the influence of phase angle and network parameters. A good understanding of the origin of the overvoltage enables the definition of protective measures adapted to the switchgear and capacitor bank. In section IV protection schemes based on surge arrestors are tested and compared on their effectiveness. Finally in section V the results are discussed and an application guideline is presented for the choice of switchgear and arrestor. ideal breaker with a NSDD some time after current interruption. The moment of NSDD has been chosen in order to create the worst possible case. The CB is allowed to recover immediately at the first occurring current zero. At a NSDD, on the R phase for the case illustrated by Fig. 2, the voltage across the breaker moves as a travelling wave through the line impedance towards the capacitor bank. The capacitor bank being a high frequency short circuit allows the wave to pass on to the neutral point of the bank. At the neutral point the wave splits itself and continues its propagation in the neighbouring phases towards the healthy CB poles. These healthy poles are in fact open terminals for the incoming wave causing it to reflect by doubling the voltage. After reflection the wave travels back to the failing CB pole. Here it creates a current zero passage on which the breaker can interrupt. The frequency of this current is typically of the order of 100 kHz for cable connected capacitor banks. Fig. 3 shows the voltage swing on the bank terminals with respect to ground. Note that 2. ORIGIN OF OVERVOLTAGES 2.1 Numerical simulation The simplified electrical circuit, Fig. 2, will be used here to simulate the phenomena associated with a NSDD; the NSDD is simulated as a temporary loss of dielectric strength in the vacuum interrupter of a vacuum CB. Fig. 3 : The voltage on all 3 capacitor bank terminals during current interruption (at 0.1s) followed by a NSDD (at 0.13s) in R phase in a 12kV network. - For each of the three bank terminals the voltage jumps to a new value, which means that the neutral point of Fig. 2 : Electric circuit used to calculate overvoltage on capacitor bank during a NSDD. TVG see section III. the bank attains also a different value. - The voltage difference between terminals remains Schneider Electric 2008 - Conferences publications 2008 China International Conference on Electricity Distribution (CICED 2008) 3 unchanged. The capacitors themselves are not stressed by the frequency withstand voltage. For the CB the overvoltage breakdown. comes very close to the rated BIL voltage for 36 kV class - The maximum terminal voltage to earth attains a high value (see table I). This is a dc voltage, so all parts of the installation are stressed during a long period. - The CB is stressed by the composed voltage of network voltage and capacitor bank terminal voltage. - networks. 2. EXPERIMENTAL VERIFICATION 3.1 Test procedure The objective was to create in a reproducible way The capacity of the bank itself is of no significance for the phenomenon. NSDD type breakdowns in a capacitive current interruption test. This allowed to minimize the number of tests to obtain the desired NSDD. NSDDs do not occur frequently and are Table 1: Compilation of voltages associated with therefore difficult to reproduce. A triggered vacuum gap capacitor bank switching for nominal network voltages (TVG) parallel to the R-phase of the VCB is used to create an artificial NSDD in a controllable way. A separate experiment Um US U C-bank UVCB BIL Power frequency kVrms kVrms kV kV kV kVrms 12 10 47 55 75 28 currents of, for instance, 300A at 100kHz and 10 A at 900 confirmed that the TVG was able to interrupt high frequency 24 20 93 110 125 50 kHz at the first current zero. Hence, the duration of the 36 30 140 164 170 70 “artificial” NSDD is determined by the circuit topology and only one half cycle of high frequency current will pass 2.2. Identification of zones at risk through the TVG. Numerical modelling showed that this will In table I the maximum possible overvoltage produced by a NSDD is shown for three commonly used classes of network voltages. For each voltage class column 2 gives Us the nominal network voltage. Column 3 gives the maximum overvoltage on the capacitor bank terminal to ground and column 4 the maximum overvoltage across the CB terminals. For reference the BIL and power frequency withstand voltages of the equipment are given. For all three voltage classes both overvoltages exceed the peak value of the power Fig. 4 : 3.2 lead to the highest possible overvoltage. Using the TVG provided a measurement window with high frequency sampling centred at the time of breakdown allowing precise measurements to be made. Full scale tests are performed in a direct test circuit fed by a generator 2000 MVA at 12 kV with short circuit current limited at 14 kA. The capacitive load was a 8 Mvar capacitor bank; nominal current of 430 A. The detailed characteristics of the test circuit are given in Fig. 4 and table II. 3-phase test circuit with generator and 8 Mvar capacitor bank. Test results phase R at a maximum voltage difference across the CB. At Fig. 5a shows an oscillogram of a normal interruption this moment the voltages on all C-bank terminals change with NSDD. The first phase to interrupt, R, creates a dc suddenly and settle to a new constant value. The highest voltage on the capacitor bank terminal of 1.5 pu. Then 30 overvoltage is found in phase T. The instant of occurrence of milliseconds after current interruption a NSDD is generated in the NSDD was varied by firing the TVG at a predetermined Schneider Electric 2008 - Conferences publications 2008 China International Conference on Electricity Distribution (CICED 2008)) 4 moment to see the influence of the phase angle on the nature the most severe one, the experiment was repeated by keeping and the value of the over-voltage. The waveform of the the first phase to clear in phase R and generating the NSDD in overvoltage is a dc voltage and is the same for all tested phase phase T. The highest overvoltage is now found in phase R. angles. The instant of occurrence of the NSDD was varied by firing the TVG at a predetermined moment to see the influence of the phase angle on the nature and the value of the over-voltage. The waveform of the overvoltage is a dc voltage and is the same for all tested phase angles. Fig. 6b shows the measured voltage on the capacitor bank terminal in phase R to ground after the NSDD in phase T. Before the NSDD the voltage is about 1.5 pu. The voltage jump is between 0 and 2.5 pu. resulting into an over-voltage of maximum 4.0 pu. The height of the overvoltage varies harmonically with the phase angle. Fig.5a: Normal interruption of capacitive current followed by NSDD in R phase after 30 ms. Fig.5b: As Fig. 5a Surge arrestor in phase T limits the overvoltage. For each phase (R, S, T). Red : Source side voltage on CB. Green : Load side voltage on CB and capacitor bank terminal. Blue : Current through CB. Time scale: 1ms/div. Fig. 6a shows the measured voltage on the capacitor Fig. 6b : Variation of over-voltage in phase R expressed bank terminal in phase T to ground after the NSDD in phase in pu due to instant of occurrence (phase angle) R. Before the NSDD the voltage is about 0.89 pu. The voltage of the NSDD in 2nd phase T to interrupt. jump is between 0.6 and 3.2 pu. leading to an over-voltage of Note that the over-voltage is the addition of the original maximum 4.1 pu. The height of the overvoltage varies capacitor bank voltage after current interruption and a voltage harmonically with the phase angle. jump due to the NSDD. The amplitude of the voltage jump depends on two factors : ● the voltage across the breaker at the instant of breakdown, which varies with time or phase angle, and which is maximum 2.5 pu. (see Fig. 5a). ● an amplitude multiplication K-factor (section IIIC) The voltage difference at breakdown is transmitted integrally to the neighbouring phases as predicted by the numerical simulation. Except for a reduced amplitude factor the behaviour found is identical to the simulation. Moreover, the most severe overvoltage is produced by a NSDD in the first phase to interrupt at the moment of the largest voltage Fig. 6a : Variation of over-voltage in phase T expressed in pu due to instant of occurrence (phase angle) of the NSDD in 1st phase R to interrupt. In order to investigate whether the above condition is difference across the CB. 3.3 Influence of TRV circuit The influence of the TRV circuit on the high frequency behaviour of the breakdown has been studied with the following circuits: Schneider Electric 2008 - Conferences publications 2008 China International Conference on Electricity Distribution (CICED 2008) TRV-1 : The standard TRV circuit composed of 2 branches see Fig. 2. 5 TRV generated by the driving voltage of the generator and the TRV circuit. The load side voltage settles to a new dc voltage TRV-2 : No TRV circuit; only stray capacitance between Generator and CB. level. Numerical simulation suggests voltage doubling with a K-factor equal to 2. Therefore the reduced value of K-immediate is attributed to damping of the high frequency TABLE III : Influence TRV circuit on peak current at NSDD. value of overvoltage 4. PROTECTION BY SURGE ARRESTORS TRV-1 TRV-2 K-theoretical 2 2 K-Immediate 1.6 1.7 the capacitor bank against excessive overvoltages due to K-Late 1.3 1.6 restrikes [6]. In such a case the overvoltage rise-time is of the 16.5µs 13.5µs order of milliseconds. Yet in case of an NSDD the 150 kHz 28 kHz 28 A 6A Voltage jump Damping time Frequency NSDD current Current Results are shown in table III. The voltage jump after breakdown can be characterised by : ● A peak voltage immediately after the NSDD: with K factor : K-immediate. ● A dc voltage after a transition period: K-late. The transition is characterised by a time constant here called “damping time”. ● The frequency of the NSDD current. Fig. 7 shows an oscillogram of the voltage on both sides of Arrestors are commonly proposed as means to protect overvoltage rise-time is only several microseconds. In order to verify the effectiveness of the surge arrestor the following two cases are investigated. 4.1 Surge arrestors on all three phases to ground Test conditions are similar as under section IIIA but with surge arrestors on the load side of the CB to ground. On initiation of a NSDD in phase R, the highest overvoltage of 2.2 pu. was in phase T due to immediate limitation of the overvoltage by the surge arrestor in phase T; the associated oscillogram is shown in Fig. 5b. A significant current flows through the surge arrestor: 890 A during 1 ms; representing an energy of about 8 kJoule. This current is determined by : the CB during the NSDD for TRV-2 circuit. During the 1. The series impedance of two branches R and T of the NSDD, between 12 and 30 µsec, both voltages are identical as capacitor bank and the series inductance of phase R and the an arc in the CB allows for current to pass from the source resistance to ground of the generator. 2. The voltage difference across the capacitor prior to side to the load side. Due to the small TRV capacitance, the source side voltage collapses at 12 µsec and joins the load breakdown minus the voltage of the arrestor. side voltage. During the current flow the voltage makes an Notice, that during the limitation of an overvoltage due oscillation around the driving voltage (the source voltage to a NSDD only one surge arrestor is conductive and before the NSDD). When this reaches a new maximum at 30 dissipates the energy. Due to the random nature of current µsec the current passes through zero and interruption takes interruption the maximum overvoltage can be in any of the place. After interruption, the source voltage is subject to the three phases. Therefore, surge arrestors have to be installed on all three phases. 4.2 Surge arrestor on neutral to ground Test conditions are similar as under section IIIA but with a single surge arrestor on the neutral point of the capacitor bank. If a NSDD was initiated in phase R, the highest overvoltage of 2.1 pu. was in phase T due to immediate limitation of the overvoltage by the surge arrestor. A significant current flows through the surge arrestor: 575 A during 2.5 ms; representing an energy of about 13 kJoule. This current is determined by Fig. 7 Zoom at voltage behaviour at NSDD in R phase with TRV-2. Green (1) : Load side voltage on CB and capacitor bank terminal. Red (2) : Source side voltage on CB. Time scale 10µs/div. 1. The series impedance of one branch of the capacitor bank, the inductance of one phase of the circuit and the resistance to ground of the generator. Schneider Electric 2008 - Conferences publications 2008 China International Conference on Electricity Distribution (CICED 2008)) 6 2. The voltage difference across the capacitor prior to severe conditions determine the continuous operating voltage of the surge arrestor. breakdown minus the voltage of the arrestor. For arrestors on the circuit-breaker The energy dissipated in the arrestor is higher than terminals the nominal voltage can reach 1.5*Un/√3; the under IV-A due to the lower COV of the arrestor. Yet here the resulting level of protection is 3.3 pu. For a single arrestor on arrestor will function regardless the phase in which the the neutral of the bank the continuous voltage can reach maximum overvoltage will occur. This limits the number of Un/√3; the resulting level of protection is 3.2 pu. During surge arrestors to install to one. interruption of the capacitive current the voltage of the neutral can increase slightly more. Yet, the surge arrestor is capable Table IV : Choice of continuous operating voltage of the arrestor and the resulting overvoltage protection level depends on network operation conditions and arrestor location. Arrestor location Continuous Operating Voltage Overvoltage protection level [pu] or Un√(2/3) networks with highohmic insulated neutral system and automatic earth fault clearing CB terminals Un/ 3 2.2 Neutral point 0.5*Un/ 3 2.1 networks with earth fault compensation or with a high-ohmic insulated neutral system CB terminals 1.5*Un/ 3 3.3 Neutral point 1*Un/ 3 3.2 of dealing with this temporary overvoltage under this rare abnormal network condition. 5. DISCUSSION The main results of this study are summarized in table V. An important difference is found between the numerically and experimentally obtained overvoltage values. The measured overvoltage on the bank terminal to ground is significantly lower than calculated. This is due to natural damping of the high frequency phenomena by dissipative elements in the circuit and by the very small capacitance on the source side due to the absence of parallel feeders. The peak over-voltage Choice of the surge arrestor has a limited duration of about 10µs. Surge arrestors The surge arrestor limits effectively the overvoltage by effectively limit these overvoltages to values as low as 2.2 pu suppressing the high frequency (150 kHz) peak overvoltage. between terminal and ground. The capacitors themselves are The absolute value of the remaining overvoltage depends stressed neither by the NSDD nor by the action of the surge though on the choice of the surge arrestor. The voltage arrestors during limitation, as the discharge current is a single limitation is effective at a level of 3.1 times the rated phase current flowing towards ground. 4.3 continuous operating voltage of the surge arrestor. The choice TABLE V : Over-voltages in capacitor bank switching of the rated voltage of the surge arrestor must take into Situation account abnormal circuit conditions as well. In table IV two common situations are compared. ● For networks with high-ohmic insulated neutral Capacitor bank terminal Across CB 1 Normal Interruption 1.5 pu 2.5 pu 2 NSDD : Predicted 6.0 pu 7.0 pu 3a NSDD (K-Late = 1.3) 4.2 pu 5.2 pu 3b NSDD (K-Immediate = 1.7) 5.2 pu 6.2 pu of each phase is fixed at Un/√3 and the neutral point of the 4 Surge arrestors on all terminals 2.2 pu 3.2 pu capacitor bank has 0 (zero) voltage. The continuous operating 5 Surge arrestor on C-bank neutral 2.2 pu 3.2 pu system and automatic earth fault clearing the nominal voltage voltage of the surge arrestor can be chosen accordingly. The surge arrestor with associated continuous operating voltage In the introduction it was outlined that NSDDs are a (COV) gives a protection of 2.2 pu. During a normal breaking common phenomenon in vacuum interrupters and that the operation the neutral point attains a peak voltage of simultaneous occurrence of NSDDs in 2 phases give rise to a 0.5*Un√(2/3), which lasts until discharging of the capacitor restrike. The frequency of occurrence of a NSDD is related to bank; this corresponds to a COV of 0.5*Un/√3; the resulting design parameters like the contact opening stroke. Hence it is level of protection is 2.1 pu. possible to design a vacuum CB according to the For networks with earth fault compensation or with a requirements of either “low restrike probability” class C1 or high-ohmic insulated neutral system a possible persistent “very low restrike probability” class C2 of [7]. For 24 kV single phase earth failure increases the nominal voltage of the Class C2 vacuum CBs with “very low restriking probability” healthy phases a factor √3, and the voltage on the neutral this leads to a nominal contact gap of 16 mm, see Fig. 1. For point of the capacitor bank increases to 1 pu. These more voltages of 36 kV and above [8] proposes to use two vacuum ● Schneider Electric 2008 - Conferences publications 2008 China International Conference on Electricity Distribution (CICED 2008) interrupters in series. Although these measures are effective 7 Protection against NSDD from a normative point of view, they do not contribute to an economically conclusive and reliable solution as shown by Arrestor on CB terminals to ground 1 * Sk/ω Arrestor on C-bank neutral to ground 2 * Sk/ω the following numerical example. For instance, contactors which allow for frequent operations have a small contact opening stroke. Even with a NSDD frequency of only 1/500 they will produce over 2000 NSDDs in their entire lifespan. Therefore, only the application of surge arrestors is an I. CONCLUSION effective solution to suppress overvoltages and eliminate any This study focussed on the interaction of the vacuum risk for equipment: capacitor bank, circuit breaker and switch circuit breaker with a capacitor bank during switching board. The application guide in table VI summarises this operation. The occurrence of a NSDD leads to a shift of the recommendation relating the choice of switchgear to the voltage of the neutral point of the bank. Although the application duty. If the CB is used only occasionally for phenomenon in itself is rare, the over-voltages produced are energizing and de-energizing the capacitor bank a vacuum CB deterministic and depend on the recovery voltage of the phase with class C1 or C2 can be used. Yet for daily operation of the in which the NSDD occurs and on the moment of breakdown. capacitor bank a protection by surge arrestor is recommended, The experimental study shows that the overvoltage after and in this case a class C1 rating is sufficient, as the NSDD is limited to about 4.2 pu. on the capacitor bank suppression of overvoltage during a NSDD reduces terminals. significantly the probability of a second simultaneous NSDD, means to limit this overvoltage. As cost efficient solution it is and hence the risk of a restrike. For more than daily operation proposed to use a single surge arrestor on the neutral point of a vacuum contactor with surge arrestor is an economical the capacitor bank. Guidelines are presented to dimension viable solution in series with a vacuum CB for protection. these arrestors. Table VI : Surge arrestors are shown to be an effective Application guide REFERENCES Capacitive switching duty Protection and Occasional operation [1] T. Yokoyama, Y. Matsui, K. Ikemoto and M. Inoyama Daily operation Frequent operation Vacuum-C B Class C1 or C2 Class C1 + Surge arrestors — Vacuum-C ontactors — Surge arrestors Surge arrestors “ Technique on Overvoltage Phenomenon Analysis for Vacuum Switching Equipment ” by, Meiden Review Series No. 78,1986 [2] Y. Sunada,N.Ito, S. Yanabu, H. Awaji, H. Okumura and Y. Kanai, “ Research and Development on 13.8kV 100kA When applying surge arrestors, special attention must be given to the energy dissipation in the arrestor. It is Vacuum CB with Huge capacity and Frequent Operation ”, CIGRE, Paris, 1982 proposed to dimension the arrestor to be capable to carry out [3] P. Huhse and E. Zielke, “ 3AF Vacuum CBs for Switching in 3 consecutive protective actions without cooling down. Capacitor Banks ”, Siemens Power ENGENEERING III Furthermore the dimensioning is related to the reactive power of the capacitor bank, Sk. Guidelines are given by [6, 9] in the case of restriking CBs, in which case the arrestor has to be (1981) No 8-9 [4] D. Koch, “Control equipment for MV capacitor banks”, ECT142, Schneider-Electric, Grenoble, 1992 dimensioned for an energy of 6*Sk/ω, where ω : angular [5] T. Kamakawaji, T. Shioiri, T. Funahashi, Y. Satoh, E. frequency of the network. Transposing this approach to a Kaneko and I. Oshima, “ An Investigation into Major protection against NSDD the guidelines as presented in table Factors in Shunt Capacitor switching Performances By VII dimension the energy dissipation capability of the arrestor. Vacuum CBs With Copper Chromium Contacts ”, IEEE Hence, for the protection against NSDDs the arrestor can be Power Engeneering 1993 winter meeting Columbus designed 3 to 6 times smaller. OHIO [6] L. Gebhardt, B. Richter, ”Surge arrestor application of Table VII : the requested energy dissipation capability of the arrestor MV-capacitor banks to mitigate problems of switching restrikes”, paper 0639, 19th CIRED, 2007, Vienna. [7] International Standard IEC 62271-1, 2008, “High Voltage Schneider Electric 2008 - Conferences publications 2008 China International Conference on Electricity Distribution (CICED 2008)) 8 Switchgear and Controlgear – Part 1: Common specifications ” Eindhoven, The Netherlands, in 1983, with a specialization in [8] E. Dullni, W. Shang, D. Gentsch,I. Kleberg and K. plasma physics. He worked at the HOLEC Research Niayesh, “ Switching of Capacitive Currents and the Laboratory from 1978 to 1982 and at KEMA testing Correlation of Restrike and Pre-ignition Behavior” , IEEE laboratories from 1983 to 1985. From 1986 to 1993, he was trans. on dielectrics and electrical insulation, vol. 13, n 1, responsible for the development of vacuum interrupters and pp. 65-71, 2006 vacuum circuit breakers at HOLEC. Since 1994, he is [9] R. Rudolph and B. Richter, “Dimensioning, testing and involved in the development of vacuum interrupters for application of metal oxide surge arrestors in medium Schneider Electric Medium Voltage SBU (formerly voltage networks”, open document ABB, Wettingen, 1999 Merlin-Gerin) at Grenoble in France. He has been active in the Dutch Brazing Soc. as well as in the CIGRE Working About the author Hans Schellekens (54) received the Ph.D. degree in technical engineering from the Technical University of Group 13.01 from 1985 to 1993. Dr. Schellekens is a member of the Current Zero Club. E-mail of author: [email protected]