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EXECUTION OF AT89S52 MICROCONTROLLER BASED SINGLE-PHASE
SIMPLIFIED NINE-LEVEL INVERTER FED INDUCTION MOTOR
Dr.I.WILLIAM CHRISTOPHER
Professor, Department of Electrical and Electronics Engineering, Tagore Engineering College,
Chennai, India, +91-944 529 1948, [email protected]
Dr.R.RAMESH
Associate Professor, Department of Electrical and Electronics Engineering, College of Engineering Guindy,
Anna University Chennai, India, [email protected]
Abstract: This paper presents the hardware design and
implementation of a Microcontroller based single-phase
simplified nine- level inverter (SNLI) fed induction motor.
Multilevel inverters offer high power capability, associated
with lower output harmonics and lower turn-off losses. This
work informs a multilevel inverter fed induction motor using
an H-bridge output stage with bidirectional auxiliary
switches. The inverter is capable of producing nine levels of
output-voltage levels (Vdc, 3Vdc /4, 2Vdc /4, Vdc /4,0, - Vdc /4,
- 2Vdc /4, -3Vdc /4, -Vdc ) from the DC supply voltage. The
control circuit necessary for multilevel inverter operation is
implemented using an ATMEL AT89S52 Microcontroller,
reducing overall system cost and complexity. Theoretical
predictions are validated using simulation in MATLAB
SIMULINK, and satisfactory circuit operation is proved
with experimental tests performed on an experimental
model.
Key words: Simplified Nine-Level Inverter (SNLI); Hbridge; Microcontroller; Induction Motor (IM).
1. Introduction
They are extensively used for electric drive for low
power constant speed apparatus such as machine tools,
domestic apparatus and agricultural machinery in
circumstances where a three-phase supply is not readily
available. Advancement in the field of power
electronics and microelectronics facilitate the
application of induction motors for high-performance
drives. The induction motor can be controlled by using
an inverter output voltage to the motor stator windings.
The output voltage of the inverters may be a
square wave, quasi square wave or six stepped wave.
Due to non-sinusoidal nature, the inverter output
voltage will have fundamental and the associated
harmonics. Filters are used to reduce the harmonics,
since it produces additional heating when the inverter
output voltage is fed to the induction motor. The recent
development in power electronics has initiated to
develop the level of inverter instead increasing the size
of filter. The total harmonic distortion of the
conventional two-level inverter is very high. While
multilevel inverter provides better performance
compare to the conventional two-level inverters.
Multilevel inverters have less total harmonic distortion.
The author [1] analyzed the total harmonic distortion
between conventional two-level inverters and
multilevel inverters. A well-known topology of this
inverter is full-bridge three-level. Multilevel inverters
are promising; they have nearly sinusoidal outputvoltage waveforms, output current with better
harmonic profile, less stressing of electronic
components due to reduced voltages, switching losses
that are lower than those of conventional two-level
inverters, a smaller filter size, and lower EMI, all of
which make them cheaper, lighter, and more condensed
[2], [3].
A variety of topologies for multilevel inverters
have been proposed over the years. Familiar ones are
diode-clamped [4]–[9], flying capacitor or multicell
[10]–[16], cascaded H-bridge [17]–[23], and simplified
H-bridge multilevel [24]–[27].This paper describes the
development of a simplified H-bridge single-phase
multilevel inverter that has three diode embedded
bidirectional switches. The proposed microcontroller
based single-phase SNLI fed induction motor is shown
in figure.1.
1ɸ AC Supply
230V, 50Hz
DC
Rectifier
AC
Single-Phase
SNLI
1ɸ
IM
Gate Driving
Circuit
ATMEL
Microcontroller
Fig.1. Single-phase SNLI fed IM.
The single phase bridge rectifier converts AC
power to DC. The DC power is fed to SNLI. The SNLI
converts the DC power to controlled AC power. ATMEL
AT89S52 microcontroller is used to generate the gate pulses.
These gate pulses of microcontroller are fed to the switches
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of SNLI through the driver circuit to drive the induction
motor.The inverter used in the power stage offers a
significant enhancement in terms of lower component count
and condensed design complexity when compared with the
other existing nine-level converters. In the control circuit,
the ATMEL AT89S52 microcontroller can provide all
essential switching pulses for power switches, results
another significant drop in cost and circuit complexity.
This paper is organized as follows. First, the power
circuit advantages and its configuration presented in section
II. Then, the power circuit operation includes the modes of
operation in detail is discussed in section III. Section IV
describes the simulation results and functionality verification
of the single–phase SNLI fed IM. The experimental
validation is described in section V. Then, section VI
presents the experimental results validate the theoretical
operation of the simplified nine-level inverter fed induction
motor. Last section concludes and the scope for further work
is presented.
2. Power Circuit
2.1 Power Circuit Advantages
Fig.2. Simplified nine-level inverter (SNLI) power circuit.
The simplified inverter topology is obviously costeffective compare to other topologies, i.e., it requires less
number of power switches, power diodes, and less capacitor
for inverters of the same number of levels.
3. Power Circuit Operation
A single-phase simplified multilevel inverter has
the following merits over other existing multilevel inverter
topologies.
1)
It consists of single-phase conventional Hbridge inverter, bidirectional auxiliary switches (number
varies depending upon level) and a capacitor voltage divider
formed by capacitors.
2)
Improved output waveforms.
3)
Smaller filter size.
4)
Lower electromagnetic interference
(EMI) and total harmonic distortion
(THD).
5)
Reduced number of switches employed.
6)
Less complexity of the circuit as the
levels increase.
7)
Attains minimum 40% drop in the
number of main power switches required.
Moreover, since the capacitors are connected in
parallel with the main dc power supply, no significant
capacitor voltage swing is produced during normal
operation, avoiding a problem that can limit operating range
in some other multilevel configurations.
2.2 Power Circuit Description
The proposed single-phase simplified nine-level
inverter (SNLI) was developed from the five-level inverter
in [24]–[28]. It contains a single-phase traditional H-bridge
inverter, three auxiliary switches S5, S6, S7 and a capacitor
voltage divider formed by four capacitors namely C1, C2,
C3 and C4, as illustrated in figureig. 2. The auxiliary
switches, formed by the controlled switch S5, S6 and S7 and
with twelve diodes, D1 to D12. The single-phase simplified
nine-level inverter (SNLI) power circuit with auxiliary
switches is shown in figure.2. Proper switching of the SNLI
can produce nine output-voltage levels Vdc, 3Vdc /4, 2Vdc /4,
Vdc /4,0, - Vdc /4, - 2Vdc /4, -3Vdc /4, -Vdc from the dc
supply voltage Vdc.
The single-phase SNLI is capable of producing
nine different levels of output-voltage levels (Vdc, 3Vdc /4,
2Vdc /4, Vdc /4, 0, - Vdc /4, - 2Vdc /4, -3Vdc /4, -Vdc) from the
dc supply voltage Vdc, shown in figure.3.
Fig. 3. Single-phase SNLI output voltage waveform
The required nine levels of output voltage were
generated as follows and can be easily understand by the
table. I.
3.1 Mode I Operation
The switch S1 is ON, connecting the load positive
terminal to Vdc, and S4 is ON, connecting the load negative
terminal to ground. Remaining switches S2, S3, S5, S6 and
S7 are OFF; the voltage across the load terminals ab is Vdc.
3.2 Mode I Operation
The bidirectional switch S5 is ON, connecting the
load positive terminal, and S4 is ON, connecting the load
negative terminal to ground. Remaining switches S1, S2, S3,
S6 and S7 are OFF; the voltage across the load terminals ab
is 3Vdc/4.
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3.3 Mode III Operation
3.8 Mode VIII Operation
The bidirectional switch S6 is ON, connecting the
load positive terminal, and S4 is ON, connecting the load
negative terminal to ground. Remaining switches S1, S2, S3,
S5 and S7 are OFF; the voltage across the load terminals ab
is 2Vdc/4.
The switch S2 is ON, connecting the load negative
terminal, and bidirectional switch S7 is ON, connecting the
load positive terminal to ground. Remaining switches S1,
S3, S4, S5 and S6 are OFF; the voltage across the load
terminals ab is −3Vdc/4.
3.4 Mode IV Operation
3.9 Mode IX Operation
The bidirectional switch S7 is ON, connecting the
load positive terminal, and S4 is ON, connecting the load
negative terminal to ground. Remaining switches S1, S2, S3,
S5 and S6 are OFF; the voltage across the load terminals ab
is Vdc/4.
3.5 Mode V Operation
This mode of operation has two possible switching
combinations. Either switches S3 and S4 are ON, remaining
switches S1, S2, S5, S6 and S7 are OFF or S1 and S2 are
ON, remaining switches S3, S4, S5, S6 and S7 are OFF. In
both switching combinations terminal ab is short circuited,
hence the voltage across the load terminals ab is zero.
3.6 Mode VI Operation
The switch S2 is ON, connecting the load negative
terminal to Vdc, and S3 is ON, connecting the load positive
terminal to ground. Remaining switches S1, S4, S5, S6 and
S7 are OFF; the voltage across the load terminals ab is
−Vdc.
In the nine-level inverter circuit three capacitors in
the capacitive voltage divider are connected directly across
the dc supply voltage Vdc, and since all switching
combinations are activated in an output cycle, the dynamic
voltage balance between the three capacitors is
automatically restored.
4. Simulation Results
The MATLAB Simulink model of the single-phase
simplified nine-level inverter (SNLI) fed IM circuit is shown
in figure.4.
The switch S2 is ON, connecting the load negative
terminal, and bidirectional switch S5 is ON, connecting the
load positive terminal to ground. Remaining switches S1,
S3, S4, S6 and S7 are OFF; the voltage across the load
terminals ab is –Vdc/4.
Table 1
Switching Combinations required generating the Nine-Level
Output Voltage Waveform
Vo
Vdc
3Vdc/4
2Vdc/4
Vdc/4
0
S1
1
0
0
0
1
S2
0
0
0
0
1
S3
0
0
0
0
0
S4
1
1
1
1
0
S5
0
1
0
0
0
S6
0
0
1
0
0
S7
0
0
0
1
0
0*
0
0
1
1
0
0
0
-Vdc/4
0
1
0
0
1
0
0
-2Vdc/4
0
1
0
0
0
1
0
-3Vdc/4
0
1
0
0
0
0
1
Fig. 4. Single-phase SNLI fed IM simulation circuit
-Vdc
0
1
1
0
0
0
0
This model, developed using the Simulink power
system block set, comprises of components such as power
electronic devices (MOSFETs) and elements such as
capacitors and resistors.
The PWM signals for each of the switching devices
in the power circuit come from the PWM generator block.
This block includes all the PWM signals required for
switches are multiplexed on a single bus to the nine -level
inverter power circuit. The switching sequence required for
the simplified nine-level inverter (SNLI) circuit is shown in
figure. 5.
3.7 Mode VII Operation
The switch S2 is ON, connecting the load negative
terminal, and bidirectional switch S6 is ON, connecting the
load positive terminal to ground. Remaining switches S1,
S3, S4, S5 and S7 are OFF; the voltage across the load
terminals ab is −2Vdc/4.
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Main Switch S4: Amplitude (volts) vs Time (seconds)
bus voltage of 230V and the resistive load of 10KΩ for the
scale of vertical 50V/division and horizontal: 10ms/division.
The THD of the single-phase simplified nine-level inverter
(SNLI) is 18.27% and fundamental voltage is 186.7V(50Hz)
as illustrated in Figure 7. The simulated waveforms for a
single-phase SNLI fed capacitor start-run IM parameters are
shown in figure 8.
Auxiliary Switch S5: Ampiltude (volts) vs Time (seconds)
1-Phase capacitor start-run IM Parameters
Switching Sequence for Switches: S1-S7
Main Switch S1: Amplitude (volts) vs Time (seconds)
2
1
0
-1
Main Switch S2: Amplitude (volts) vs Time (seconds)
2
1
0
-1
Main Switch S3: Amplitude (volts) vs Time (seconds)
2
1
0
-1
2
1
0
-1
2
1
0
-1
Nine level output voltage (volts) vs Time (seconds)
200
Auxiliary Switch S6: Amplitude (volts) vs Time (seconds)
2
1
0
-1
0
Auxiliary Switch S7: Amplitude (volts) vs Time (seconds)
2
1
0
-1
-200
Main Winding Current (Amp) vs Time (seconds)
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
40
20
0
Fig.5. Switching sequence required for SNLI circuit.
-20
-40
Capacitor Voltage (volts) vs Time (seconds)
Figure 6 shows the simulated nine-level output
voltage waveform of the SNLI circuit.
200
0
-200
Rotor Speed (rpm) vs Time (seconds)
Nine-Level Output Voltage
1500
9 level output voltage
250
1000
500
200
0
Electromagnetic Torque (N-m) vs Time (seconds)
150
20
Amplitude (in volts)
100
0
50
-20
0
0
0.5
1
1.5
2
2.5
3
-50
Fig.8. Simulated SNLI fed capacitor start-run IM
parameters.
-100
-150
-200
-250
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
Time (in seconds)
Fig. 6. Simulated output voltage waveform of the
simplified nine-level inverter (SNLI) circuit.
(Vdc bus = 230V; vertical: 50V/d; Horizontal: 10ms/div)
Selected signal: 5 cycles. FFT window (in red): 1 cycles
200
0
-200
0
0.01
0.02
0.03
0.04
0.05 0.06
Time (s)
0.07
0.08
0.09
0.1
The simulation results shows nine-level output
voltage, and 1-phase capacitor start-run IM parameters that
includes main winding current, capacitor voltage, rotor
speed and electromagnetic torque. The speed of the singlephase IM increases linearly and at steady state it reaches the
rated speed of 1500 rpm.
4. Experimental Validation
After the simulation studies, an ATMEL AT89S52
microcontroller based single-phase simplified nine-level
inverter (SNLI) fed IM is fabricated and tested. The
experimental validation includes the control circuit, the
driver circuit and the power circuit.
Fundamental (50Hz) = 186.7 , THD= 18.27%
Mag (% of Fundamental)
12
4.1 Control Circuit
10
8
6
4
2
0
0
100
200
300
400
500
600
Frequency (Hz)
700
800
900
1000
Fig. 7. THD of SNLI.
It is clearly visible that the simulated output
waveform is very close to the ideal output defined for a
simplified nine-level inverter (SNLI) circuit. The nine-levels
of
voltages
are
Vdc=230V,
3Vdc/4=172.5V,
2Vdc /4 = 115V, Vdc /4 = 57.5V, 0V, - Vdc /4 = -57.5V,
-2Vdc /4 = -115V, -3Vdc /4 = -172.5V, -Vdc = -230V for Vdc
The control circuit was implemented using an
ATMEL AT89S52 8-bit microcontroller. Reasons for
choosing an ATMEL Microcontroller are as follows:
1)
2)
3)
4)
5)
Self-sufficient standalone device (IC)
Cost- effective & less power consumption
Reliability of the system
Software protection
Wide availability
The gate pulses are produced by the ATMEL
AT89S52 Microcontroller. These pulses are amplified using
the seven driver ICs 6N136
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4.2
Driver Circuit
The driver circuit describes about the isolation
between the power circuit and the control circuit and the
power supplied to the IGBTs.The circuit operates with the
two transistor logic, the supply given to the driver circuit is
12V with the help of a transformer. The 5V supplied by the
ATMEL AT89S52 microcontroller is sensed by the buffer IC
and proceeds to the IGBTs through the isolation IC 6N136
which is otherwise known as optocoupler.
4.3
Power Circuit
A single- phase simplified nine-level inverter
(SNLI) power circuit was fabricated using seven IGBT ICs
CT60. The IGBT has advantages of both MOSFET and
BJT, lesser power requirement and absence of secondary
breakdown phenomenon.
Fig.10. Experimental setup of the 1-phase SNLI fed
induction motor.
The whole experimental setup of the single-phase
simplified nine- level inverter (SNLI) fed capacitor start run
induction motor is shown in figure.10.
Fig.9. Fabricated single-phase SNLI circuit.
The fabricated single-phase simplified nine-level
inverter (SNLI) circuit is illustrated in Figure.9.
5. Experimental results
In the capacitor –start-and –run IM the starting
winding and capacitor are permanently connected in the
circuit. These motors are also known as permanent-spilt
capacitor motors. It has a comparatively low starting torque
which is about 50 to 100 percent of the rated torque. The
two-value capacitors run IM motor, which start with a high
value of capacitance but run with a low value of capacitance.
The simulation results are verified experimentally by
running a 1-phase capacitor start-run induction motor using
SNLI circuit. The motor has the following specification
shown in table II.
Table 2
Single-Phase Capacitor Start-Run IM Specifications
S.No
1.
2.
3.
4.
5.
Parameters
Power
Voltage
Frequency
Speed
Current
Ratings
0.25HP
230V
50Hz
1500rpm
2.8A
Fig.11. Experimental result of a 1-phase SNLI voltage
output.
Figure.11 presents experimental result of a 1-phase
SNLI output voltage waveform showing the desired nine
voltage levels. The fundamental output frequency is 50Hz.
The measured nine different voltage levels are Vdc = 168V,
3Vdc /4 = 126V, 2Vdc /4 = 84V, Vdc /4 = 42V, 0V, - Vdc /4 =
- 42V, -2Vdc /4 = - 84V, -3Vdc /4 = -126 V, -Vdc = - 168V.
The results were taken from the experimental circuit using a
two channel, 50 MHz, Digital Storage Oscilloscope (DSO)
from GW Instek. The output waveform measured in the
experimental setup may be close to the predicted simulation
results.
6.
Conclusions
The concurrence between the simulated results and
the experimental results show clearly that the single-phase
SNLI works as expected, generating the required nine-level
output voltage for the 1-phase capacitor start-run IM. The 1phase SNLI can be adapted to any number of voltage levels
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for many more applications.
Acknowledgment
The authors wish to thank the Management,
Principal and the Department of Electrical and Electronics
Engineering of Tagore Engineering College, Chennai for
their whole hearted support and providing the laboratory
facilities to carry out this work.
12.
13.
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Dr.I.William Christopher received his AMIE
degree in Electronics and Communication
Engineering from The Institution of Engineers
(India), Kolkata in 2001, M.E degree in Power
Electronics and Drives from Anna University,
Chennai, India in 2005. He received his Ph.D
degree in the area of Simulations and
Experimental Investigations on Modified HBridge Multilevel Inverter from the Department
of Electrical and Electronics Engineering,
College of Engineering Guindy, Anna
University, Chennai, India in 2014. He is currently working as a Professor in
the Department of Electrical and Electronics Engineering, Tagore
Engineering College, Chennai, India.
His research interests are Power Electronic Converters in Renewable
Energy Systems and Embedded control of Electric drives. He has published
27 research papers in reputed Journals, IEEE sponsored International and
National Conferences.
He is a Member of Institution of Electronics and Telecommunication
Engineers (India), Associate Member of Institution of Engineers (India),
Member of Institution of Engineering and Technology (UK) and Member of
IAENG, Hong Kong. In 2010, he received the IET YPSC Young Teacher
Award from IET (UK) YPS Chennai Network for his contributions to the
profession and IET.
Dr.R.Ramesh was received his B.E degree in
Electrical and Electronics Engineering from
University of Madras, Chennai, India in 1999.
He received his M.E degree in Power Systems
from Annamalai University, Chidambaram,
India in 2002. He received his Ph.D degree in
the area of Grid Service Model for Distributed
On-Line Load-flow Monitoring from the
Department of Electrical and Electronics
Engineering, College of Engineering Guindy,
Anna University, Chennai, India in 2008.
Presently he is working as an Associate Professor in the Department of
Electrical and Electronics Engineering, College of Engineering Guindy,
Anna University, Chennai, India.
His research areas are Multi-area Power Systems, Solar PV systems,
Power Electronic Converters, Web and Embedded based systems. He has
published 65 research papers in reputed International Journals and
Conferences. He is a Member of Institution of Engineers (India), Member of
Indian Society for Technical Education, and Member of IAENG, Hong
Kong.
In 2011, he received the IET YPSC Young Teacher Award from IET
(UK) YPS Chennai Network for his contributions to the profession and IET.
Also he received Young Engineer Award from The Institution of Engineers
(India) in 2012.
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