Download C086

Proceedings of ICMM2005
3rd International Conference on Microchannels and Minichannels
June 13-15, 2005, Toronto, Ontario, Canada
Paper No. ICMM2005-75104
REVIEW OF FABRICATION OF NANOCHANNELS FOR SINGLE PHASE LIQUID FLOW
Jeffrey L. Perry, [email protected]
Microsystems Engineering
Rochester Institute of Technology
Rochester, NY 14623
ABSTRACT
The topic of single phase liquid flow in submicron or
nanochannels is a nascent field. There have only been a couple
papers that have dealt with this area directly. The most
probable reason for this is that currently most research in fluid
mechanics or heat transfer is being focused on micron size
channels. To help facilitate researchers to focus on this
undeveloped area, this paper serves as a review for some of the
micro-fabrication processes that will make it possible for
engineers and scientists to study this field in greater detail.
INTRODUCTION
The nanometer length scale will allow discovery of a new
range of phenomena, where the channel height is on the order
of the size of atoms or molecules comprising the fluid or
dissolved/dispersed material in it. First, there is a need to study
flow in nanochannels because the tremendous potential of
nanofluidics is yet to be explored. Secondly, nanofluidics may
evolve to be a key technology just as microfluidics has come to
be a part of the many technological advances of the modern era.
Nanofabrication and nanometer-scale fluidic structures
have in recent years provided new tools for the study of
molecular behavior at the single-molecule level. Nanofluidics is
expected to find significant applications in biotechnology and
medicine [1]. Therefore, the study of fluid dynamics and
bimolecular transport on the nanometer-scale is relevant.
A major upcoming application of nanochannels is in the
analysis of DNA. Researchers in this field have found that the
degree of DNA stretching is inversely proportional to the
channel dimensions due to confinement effects. In biological
applications, the interaction of biopolymers, such as DNA
molecules in nanochannels with dimensions close to the
persistence length (length to which a molecule can be laid out
in a straight manner) allows for a whole new way of detecting,
analyzing and separating these biomolecules. Typically a DNA
molecule will form a compact arrangement in its natural state.
However, when a DNA molecule flows through a nanochannel
with a cross section comparable to the persistence length of the
Satish G. Kandlikar, [email protected]
Department of Mechanical Engineering
Rochester Institute of Technology
Rochester, NY 14623
molecule (≈ 50 nm), it will be thermodynamically more
favorable for the DNA molecule to be in a stretched state [2].
This DNA stretching can lead to important biological
applications such as: (a) quick mapping of restriction-cut
genomic DNA segments in very short times (minutes vs. hours
or days), (b) Reduction in required DNA sample to that of the
genomic material in a single cell, (c) To localize transcription
factors for protein synthesis to a specific gene or even a
specific binding site, (d) parallel analysis and (e) more sensitive
detection with high signal-to-noise ratios and minimized
multiple occupancies [3, 4, 5].
Another use of nanochannels is in the area of drug
delivery. There is presently a need for high precision
nanoengineered devices to yield long term zero-order release of
drugs for therapeutic applications. Previously, various
technologies have been developed to achieve this goal.
However, they have a number of shortcomings which are
related to (a) degradable polymer implants which have initial
burst effects prior to sustained release of a drug and poor
control of release rates of small molecules, and (b) osmotic
pumps which lack the capability of electronics integration for
achieving higher levels of functionality [6]. Nanochannels
fabricated in silicon can allow for the creation of drug delivery
that possesses a combination of structural and integrated
electronic features that may overcome these challenges.
Additional uses of nanochannels have been in scanning
nanolithography [7], chemical experiments on a quartz-chip
laboratory [8], capillary electrophoresis for chemical and
biochemical analysis [9], and use in chemical sensors [10].
With the many possibilities availed to this technology, the
objective of this paper is to introduce four fundamental
methods by which nanochannels may be fabricated. Each
method uses standard semiconductor processing techniques that
are very effective, reproducible, have high volume potential,
and have decades of processing technology to facilitate
employing them. These methods are: (i) bulk nanomachining
and wafer bonding, (ii) surface nanomachining, (iii) buried
channel technology, and (iv) nanoimprint lithography.
1
Copyright © 2005 by ASME
BULK NANOMACHINING AND WAFER BONDING
In bulk nanomachining and wafer bonding, features are
created out of the bulk of a silicon wafer. This can be done by
reactive ion etching (RIE) [11] or by a wet anisotropic etchant
with aqueous KOH or ethylenediamine based solutions [12,
13]. Creation of features with RIE normally roughens the
surface, and the sidewalls of the trench may be tapered. This is
especially the case when the width of the trench is on the same
order of magnitude as the depth [14]. Both the roughness and
the shape of the sidewall will have a major influence on the
flow characteristics of the nanochannels. However, if wet
anisotropic etching is performed with good crystal alignment
the side walls will have a mirror like finish and be vertical.
The next step in the process is to bond another wafer or
clear Pyrex cover plate on top of the nanochannels to allow for
fluid visualization. Substrate bonding techniques such as
thermal or anodic bonding have been popular for sealing
nanochannels. However, these techniques are sensitive to
particles which can disrupt bonding. However, if polymer
adhesives can be coated thin enough they too are excellent
alternatives for channel sealing.
Figure 1 depicts this process where wet anisotropic etching
of 1-dimensional nanochannels was performed by Haneveld et
al. [14]. A (110) silicon wafer is used which has a thin native
oxide. The wafer is then lithography patterned and the oxide
mask is etched with an HF solution. The silicon is then
anisotropically etched with a developer solution at an elevated
temperature which is essentially a water-dilute solution of
TMAH (Tetra Methyl Ammonium Hydroxide). Next, the oxide
mask is stripped and bonded to a borofloat glass wafer. Figure
2 shows a cross section of their structure.
Figure 2: Cross section of a silicon wafer with 50 nm deep
channels bonded to a borofloat wafer [14].
This technique, however, is subject to collapsing of
channels during wafer bonding. This occurrence can be
prevented by understanding that the collapse of the trenches is a
function of wafer thickness, stiffness, surface adhesion energy
and of the geometry of the channels. Figure 3 shows a
Figure 3: Two wafers bonded together forming a trench.
Figure 1: A fabrication process for bulk nanomachining
with wafer bonding. This process was used by Haneveld et
al. [14].
configuration of a trench formed from a bonded wafer pair.
Kim et al. [15] present criteria for channel collapse when two
substrates have the same thickness. When the channel width, R,
is greater than the wafer thickness, L, (R>2L), trench collapsing
occurs for
R
(1)
h<
1.2 EL3 / γ
where h is the trench height, γ is the surface energy which
typically has a value around 100 mJ/m2 for hydrophilic surfaces
and 20 mJ/m2 for hydrophobic surfaces and, E is the Young’s
modulus. When R<2L which is relevant for nanochannel
fabrication, the trenches between a wafer pair will collapse if
h < 2.6( Rγ / E )1 / 2
(2)
Kim et al. calculated the threshold for collapse as a function of
h vs. R using (2) for silicon substrates (E = 165 GPa, γ = 0.1
J/m2). Figure 4 plots the calculated values of channel height
(2h) vs. channel width (2R). Trenches collapse above the line
but are able to survive below it. Table 1 lists some specified
values which clearly show that as the trench width decreased so
2
Copyright © 2005 by ASME
does the allowable trench depth. For substrates of different
thickness and/or elastic properties analogous formulae are
available from Cha et al. [16].
furnace. The a-Si is patterned lithographically to define the
nanochannels. The nitride film below the a-Si is used as an etch
stop during chemical wet etching. The top channel dielectric
layers are then deposited over the patterned a-Si layer and
capped with a thick phosphosilicate glass to protect the
structure during channel etching. In addition, to the basic
structure, reservoir regions are created at the ends of the
channels. They form a large basin into which the channels open
and a wet etchant selective to a-Si can form conduits.
The removal of the sacrificial layer requires a long
immersion time in a chemical solution such as aqueous TMAH
and special irrigation etching holes may be required to dissolve
the sacrificial layer in a reasonable time. The experiments of
Stern et al. showed that this method has an upper limit of
channel lengths of about 3-5 mm. Moreover, it can take up to
80 hours of etching time for a 2-mm long, 10-µm wide and 50nm high channel. This data is shown in Figure 6. An example
of this type of channel formation is depicted in Figure 7.
Figure 4: Trench collapse threshold values using (2) for
silicon with γ = 0.1 J/m2 and E = 165 GPa.
Table 1: Specified values of allowable trench depth for
certain trench widths [15].
Trench width (2R),
Allowable trench depth (2h),
µm
nm
0
0
5
2.98
10
4.22
30
7.31
50
9.43
100
13.34
200
18.86
300
23.1
400
26.68
500
29.82
600
32.67
Figure 5: Schematic cross-section of an a-Si nanochannel
array [10].
SURFACE NANOMACHINING
Enclosed nanochannels can also be fabricated by surface
nanomachining. It consists of embedding the structures in a
layer of appropriate sacrificial material on the surface of the
substrate. The sacrificial material is dissolved which leaves a
complete nanochannel. The dimensions of these channels are
generally restricted by the maximum sacrificial layer thickness
that can be deposited within an acceptable time period (several
microns).
Figure 5 is a schematic cross section of an amorphous-Si
(a-Si) nanochannel array from Stern et al. [10]. First, a thick
layer of thermal oxide is grown for the electrical isolation of
electronic devices. 50 nm each of LPCVD TEOS (Tetra Ethyl
Ortho Silicate) and LPCVD Si3N4 are then put down to form
the lower channel dielectric layer. The alternating layers of
TEOS and Si3N4 help maintain the channel dimensions because
each imposes an opposite thin film stress. The TEOS layer is
compressive while the nitride layer is tensile. Afterwards a thin
a-Si film of nanometer thickness is grown in an LPCVD
Figure 6: Etched channel length vs. time for 1-,5- and 10µm wide channels. Heights are 50 nm with etch times up to
80 hours. Graph demonstrates that etch rates decrease with
time [10].
3
Copyright © 2005 by ASME
etching (step 3) and conformally coated with a material (step 4)
to prevent lateral etching of the sidewalls in the sixth step. The
coating is removed only at the bottom of the trench (step 5) and
the structure is etched in the bulk of the substrate again with an
isotropic etchant (step 6). After stripping the coating (step 7),
the structure is closed by filling the trench with a suitable
material (step 8).
1. Form initial pattern
5. Etch coating at bottom
of trench
2. First isotropic etch
6. Second isotropic etch
to round out bottom
3. Deep reactive ion etch
to form trench
7. Strip coating
4. Coat trench with
protective material
8. Close channel by
trench filling
Figure 7: Picture of surface nanomachined channels. (a) 0.5
µm wide, 100 nm high and (b) 1 µm wide, 100 nm high [10].
Channels are directly enclosed with silicon nitride and
TEOS.
BURIED CHANNEL TECHNOLOGY
As an alternative to conventional bulk and surface
nanomachining, a newer method called buried channel
technology is one of the more elegant methods. Figure 8 shows
an example of these channels that can be fabricated using this
method. Important features of this method are large freedom of
design and the absence of assembly of wafer-to-wafer
alignment steps because processing only occurs on one side of
the silicon wafer. Moreover, since the structures are formed
underneath the surface of the wafer, in principle, the surface is
available for integration of electronic circuits or fluidic devices.
This leads to a more efficient use of the substrate surface and to
further overall device miniaturization. Additionally, by varying
the etch processes of the channels different shapes can be made
such as pear-shaped, circular and v-grove [17].
Figure 9: Fabrication sequence for conduit using buried
channel technology [5].
NANOIMPRINT LITHOGRAPHY
Figure 8: Picture of channels formed with buried channel
technology [5]. Channels are closed with silicon nitride
which is buried underneath the silicon surface.
This technology which is published in more detail by de
Boer et al. [17] consists of eight basic steps which are depicted
in Figure 9. To start, a bare substrate is covered with a suitable
masking material and lithographically patterned (step 1). An
isotropic etchant is then used to make a rounded out feature
(step 2). A trench is etched in the substrate by deep reactive ion
Nanoimprint lithography (NIL) starts with a mold that is
formed usually with interferometric lithography (a low-cost
process) in conjunction with anisotropic etching of the
patterned features to form high density arrays of nanofluidic
channels [18, 19]. Once a mold is formed the process of NIL
has two basic steps as shown in Figure 10. The first step is the
imprint step in which a mold with nanostructures on its surface
is pressed into a thin polymer on a substrate. This step
duplicates the nanostructures on the mold in the polymer film.
The second step is the pattern transfer where an anisotropic
etching process, such as RIE is used to remove the residual
polymer in the compressed area. This step transfers the
thickness contrast pattern into the entire polymer.
During the imprint step, the polymer is heated to a
temperature above its glass transition temperature. At this
temperature the material will become a viscous liquid and flow.
This allows for it to deform into the shape of the mold. NIL is
a physical process more than a chemical one. Typically a
silicon mold is used in this process and used in conjunction
with poly-methyl-methacrylate (PMMA) which is a common
polymer used in NIL. PMMA is favored because it has
excellent properties for imprint lithography with a small
thermal expansion and pressure shrinkage coefficients of 5x10-5
1/oC and of 5.5x10-8 1/kPa respectively [20]. Chou et al. [21]
have reported that when using PMMA which has a glass
4
Copyright © 2005 by ASME
transition temperature of 105oC the imprint temperature used in
their experiments was between 140 and 180oC, and the pressure
varied from 4.14 to 6.21 MPa (600 to 1900 psi). Additionally,
the imprint process should be done in vacuum to reduce the
formation of air bubbles and mold release agents used to reduce
the polymer adhesion to the mold.
Figure 11: A schematic illustration of the sputtering
deposition process that relies on local shadowing of the NIL
features to enclose the channels [23].
Figure 10: Schematic of nanoimprint lithography process:
(1) imprinting using a mold to create a thickness contrast in
a polymer, (2) mold removal, and (3) pattern transfer using
anisotropic etching to remove residue polymer in the
compressed areas [21].
NIL is a parallel high throughput technique that makes it
possible to create nanometric-scale features over large substrate
surface areas at low cost [22]. The process is capable of
creating smooth, vertical sidewalls with nearly 90o corners.
Cao et al. [23] have used this technique to create millions of
enclosed nanofluidic channels with dimensions smaller than 10
nm on a 100 mm wafer. In addition, if larger features are
desired, optical lithography can be used in conjunction with
interferometric lithography to print bigger features. This will
allow feature sizes to range from nanometers to millimeters.
The last important aspect necessary to fabricate a working
nanofluidics system is to enclose the channels. The sealing
technique to close up nanochannels is not as easy as one would
first believe. Cao et al. [23] have used a shadowing technique
by sputtering silicon dioxide over the nanochannels at a wide
distribution of angles. This leads to a non-uniform deposition
that can reduce the original size of the channels and seal them
off on the top as shown in Figure 11. Sealed nanochannels
using this process are depicted in Figure 12.
Guo et al. [2] have developed a more practical solution to
address this issue of enclosing the nanochannels.
The
technique is to simply imprint a channel template into a thin
polymer film while on a glass substrate in a single step. Using
their technique it is easy to control the nanochannel dimensions
by a simple relationship involving the initial polymer layer
thickness and the mold pattern configuration. The modified
NIL process can be compared and contrasted with the typical
process by looking at Figure 13. As shown in Figure 13b, if a
very thin polymer layer is used during imprinting, the displaced
polymer will not be able to completely fill the trenches on the
mold. This results in creating enclosed nanochannel features.
In this process, the mold serves a channel template, which itself
is fabricated by using NIL and RIE.
Figure 12: Nanofluidic channels with trench widths of 85
nm were sealed with SiO2 sputtering. The sealed PMMA
channels widths were reduced to nearly 55 nm after the
sealing process [23]. The scale bar is 500 nm.
Figure 13: Schematics of (a) the conventional NIL process
of using a mold with surface protrusion patterns to imprint
into a polymer layer and (b) the nanofluidic channel
fabrication by using a template mold to imprint into a thin
polymer layer to leave unfilled and self-enclosed channels
[2].
5
Copyright © 2005 by ASME
Table 2: Comparison of nanochannel fabrication methods.
Method
•
•
Bulk nanomachining and
wafer bonding
•
•
•
Surface nanomachining
•
•
•
Buried channel technology
•
•
•
Nanoimprint lithography
•
•
Advantages
Simple concept
Allows for easy fluid visualization when using
an optically clear cover plate or substrate
Possible to achieve stacked structures with one
or more bonded substrates
•
•
•
Disadvantages
Trench depth is limited by its width
to prevent trench collapsing
Requires bonding to realize device
(need an additional substrate to
enclose channels)
Difficulties with bonding
Simple concept
Fluid visualization is possible with transparent
surface layers
•
•
Large freedom of design
Absence of assembly of wafer-to-wafer
alignment steps or bonding
Surface is available for integration of
electronic circuits or fluidic devices which
leads to more efficient use of the substrate
surface and to further overall device
miniaturization
Channel shapes may be varied (pear-shaped,
circular and v-grove)
Channels are nanosized in 2-dimensions
•
•
Fluid visualization is not possible
Need to develop processing
technology to exploit ability to build
sensors/electronics on top of
nanochannels for overall device
miniaturization
Low-cost process which is capable of high
throughput
Mold can easily be adjusted to make large and
small lateral features (nm to mm size)
Channels with 2-dimensions on the nanometer
scale are possible
•
Fluid visualization is possible if
mold is fabricated from glass
Difficulty in accommodating wide
ranges of feature sizes into a single
mold
Lifetime of mold may be an issue
This fabrication process can be well controlled to give
predictable channel heights. Figure 14a shows a layout of a
periodic array of channel templates. A simple geometrical
argument shows that the height of an enclosed nanochannel can
be determined by the depth of the etched channel template as
well as the initial thickness of the polymer layer, which follows
a simple linear relationship (Figure 14b). As shown in Figure
14b, the height of the channels can also be controlled by
adjusting the ratio of the ridge width to the trench width on the
channel template.
Figure 14a illustrates the key dimensional parameters for
an arrayed channel template: a, trench width; b, ridge width; d,
trench depth; t, initial thickness of the polymer layer; and h,
nanochannel height after NIL. Figure 14b shows the simple
relationship of the height of the enclosed nanochannels with the
initial polymer thickness and the mold pattern sizes,
h = d – (1 + b/a)t (obtained by considering the polymer
displacement during the imprint process, assuming the polymer
material to be incompressible). Figure 15 shows the channels
made by this method.
•
•
•
Long etch times of sacrificial layer
Upper limit of channel lengths is
about 3-5 mm
Need to consider thin film stresses
when fabricating channels
Figure 14: Nanochannel dimension control by varying
initial polymer layer thickness and mold pattern
configuration [2].
6
Copyright © 2005 by ASME
REFERENCES
1.
2.
3.
4.
5.
6.
7.
8.
Figure 15: Pictures of nanoimprinted fluidic channels with
template used to enclose the nanochannels [2]. Template is
made of a thermal oxide layer on a silicon substrate.
9.
CONCLUSIONS
The fabrication methods reviewed for making
nanochannels for use in single phase liquid flow will aid
researchers to break open this field. Little work has been
published in this area and it is ready to be explored. Since the
manufacturing of nanochannels in principle is no more difficult
that creating microchannels there should be no major technical
hurdles preventing this research to go forward. Table 2
summarizes the advantages and disadvantages of each method.
This will give researchers working in fluid mechanics or heat
transfer to determine which method is best suited for their
individual needs and available resources.
10.
11.
12.
13.
ACKNOWLEDGMENTS
The authors are thankful for the support of the
microsystems program and Thermal Analysis and Microfluidics
Laboratory at the Rochester Institute of Technology.
14.
NOMENCLATURE
15.
h
R
E
L
γ
d
a
b
t
trench or channel height, m
channel width, m
Young’s modulus, Pa
wafer thickness, m
surface energy, J/m2
trench depth of NIL mold, m
trench width of NIL mold, m
ridge width of NIL mold, m
initial thickness of polymer layer, m
16.
7
K. Petersen et al., Promise of miniaturized clinical
diagnostic systems, IVD Technology, vol. 4, 43-49, 1998.
L.J. Guo, X. Cheng and C. Chou, Fabrication of sizecontrollable nanofluidics channels by nanoimprinting and
its applications for DNA stretching, Nano letters, vol. 4,
pp. 69-73, 2004.
W. Li et al., Sacrificial polymers for nanofluidic channels
in biological applications, Nanotechnology, vol. 14, pp.
578-583, 2003.
M. Foquet et al., DNA fragment sizing by single molecule
detection in submicrometer-sized closed fluidic channels,
Analytical Chemistry, vol., 74, pp. 1415-1422, 2002.
J. Tegenfeldt et al., Micro- and nanofluidics for DNA
analysis, Anal. Bioanal. Chem., vol. 378, pp. 1678-1692,
2004.
P. Sinha et al., Nanoengineered device for drug delivery
application, Nanotechnology, vol. 15, pp. S585-S589, 2004.
M. Hong, K.H. Kim, J. Bae, and W. Jhe, Scanning
nanolithography using a material-filled nanopipette,
Applied Physics Letters, vol. 77, pp. 2604-2606, 2000.
K. Matsumoto et al., Nano-channel on quartz-chip
laboratory using single molecular detectable thermal lens
microscope, Proc. of the IEEE Micro Electro Mechanical
Systems, pp. 127-130, 1998.
H. Becker, K. Lowack and A. Manz, Planar quartz chips
with submicron channels for two-dimensional capillary
electrophoresis applications, J. Micromech. Microeng., vol.
8, pp. 24-28, 1998.
M.B. Stern, M.W. Geis and J.E. Curtin, Nanochannel
fabrication for chemical sensors, J. Vac. Sci, Technol. B,
vol. 15, pp. 2887-2891, 1997.
K.R. Williams and R. S. Muller, Etch rates for
micromachining
processing,
Journal
of
Microelectromechanical Systems, vol. 5, pp. 256-269,
1996.
H. Seidel et al., Anisotropic etching of crystalline silicon in
alkaline solutions, J. Electrochem. Soc., vol, 137, pp. 36123629, 1990.
D.L. Kendall and G.R. de Guel, Orientations of the third
kind: the coming of age of (110) silicon, Studies in
Electrical and Electronic Engineering, vol. 20, pp. 107124, 1985.
J. Haneveld, H. Jansen, E. Berenschot, N. Tas and M.
Elwenspoek, Wet anisotropic etching for fluidic 1D
nanochannels,
Journal
of
Micromechanics
and
Microengineering, vol. 13, pp. S62-S66, 2003.
W.S. Kim, J. Lee and R. Ruoff, Nanofludic channel
fabrication and characterization by micromachining,
Proceedings of IMECE’03, Washington D.C., Nov. 15-21,
2003, pp. 1-6.
G. Cha, R. Gafiteanu, Q.Y. Tong and U. Gösele, Design
considerations for wafer bonding of dissimilar materials,
Second Int. Symp. Semiconductor Wafer Bonding: Science,
Technology and Applications, Electrochem. Soc. Proc.,
vol. 93-29, Electrochem. Soc., Pennington, 1993, pp. 257266.
Copyright © 2005 by ASME
17. Meint J. de Boer et al., Micromachining of buried micro
channels in silicon, Journal of Microelectromechanical
systems, vol. 9, pp. 94-103, 2000.
18. S.H. Zaidi and S.R.J. Brueck, Interferometric lithography
for nanoscale fabrication, Proceedings of SPIE, San Jose,
CA, Jan. 1999, vol. 3618, pp. 2-8.
19. M.J. O’Brien II et al., Fabrication of an integrated
nanofluidic chip using interferometric lithography, J. Vac.
Sci, Technol. B, vol. 21, pp. 2941-2945, 2003.
20. I. Rubin, Injection molding: theory and practice, John
Wiley & Sons, 1973.
21. S.Y Chou et al., Nanoimprint lithography, J. Vac. Sci,
Technol. B, vol. 14, pp. 4129-4133, 1996.
22. S.Y. Chou et al., Imprint lithography with 25-nanometer
resolution, Science, 272, vol. 272, pp. 85-87, 1996.
23. H. Cao et al., Fabrication of 10 nm enclosed nanofluidic
channels, Applied physics letters, vol., 81, pp. 174-176,
2002.
8
Copyright © 2005 by ASME