* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
Download - Krest Technology
Audio power wikipedia , lookup
Chirp spectrum wikipedia , lookup
Electric power system wikipedia , lookup
Induction motor wikipedia , lookup
Electrical ballast wikipedia , lookup
Spark-gap transmitter wikipedia , lookup
Stepper motor wikipedia , lookup
Power engineering wikipedia , lookup
History of electric power transmission wikipedia , lookup
Utility frequency wikipedia , lookup
Stray voltage wikipedia , lookup
Surge protector wikipedia , lookup
Voltage regulator wikipedia , lookup
Power over Ethernet wikipedia , lookup
Three-phase electric power wikipedia , lookup
Voltage optimisation wikipedia , lookup
Amtrak's 25 Hz traction power system wikipedia , lookup
Power inverter wikipedia , lookup
Resistive opto-isolator wikipedia , lookup
Electrical substation wikipedia , lookup
Alternating current wikipedia , lookup
Opto-isolator wikipedia , lookup
Mains electricity wikipedia , lookup
Pulse-width modulation wikipedia , lookup
Variable-frequency drive wikipedia , lookup
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2016.2536585, IEEE Transactions on Industry Applications 1 Optimal Pulsewidth Modulation of Medium-Voltage Modular Multilevel Converter Amarendra Edpuganti, Member, IEEE and Akshay K. Rathore, Senior Member, IEEE Abstract—Modular multilevel converter (MMC) is now the state-of-the-art converter topology for high-voltage dc transmission (HVDC) systems. Another potential application for MMC is medium-voltage (MV) high power industrial AC drives. In high power applications, thermal constraints of power semiconductor devices limit device switching frequency to a few hundred Hertz. However, there exists a trade-off between device switching frequency and harmonic distortion of converter output currents. Synchronous optimal pulsewidth modulation (SOP) is an emerging low device switching frequency modulation technique for high power converters, which maintains the quality of converter output currents. SOP technique has been successfully demonstrated for classical multilevel topologies and it has been proved that maximum device switching frequency can be limited to rated fundamental frequency for seven or higher-level inverters without compromising on the quality of output currents. However, implementation of SOP technique for MMC topology is still pending. One of the main challenges for control of MMC is to maintain floating capacitor voltages around their nominal value. The goal of our study is to propose, analyze and implement enhanced SOP technique for MMCs to achieve low device switching frequency operation, better quality of converter output currents and maintain capacitor voltages around their nominal value. The proposed technique has been validated using low power prototype of five-level MMC feeding an 1.5-kW induction motor. Index Terms—Induction motors, medium-voltage drives, modular multilevel converters, synchronous optimal pulsewidth modulation (SOP), variable speed drives. I. I NTRODUCTION Multilevel converters (MLCs) have emerged as standard power electronic interface for medium-voltage (MV) and highvoltage (HV) high power applications. The main reason is excellent quality of output voltage/current waveforms and feasibility of utilizing low voltage (LV) and MV power semiconductor devices. Several MLC topologies have been proposed in the literature after the advent of three-level neutralpoint-clamped (3L-NPC) converter in 1980s [1]. Due to modularity and scalability, the cascaded H-Bridge (CHB) topology has become industrial standard in high power and high quality demanding applications. However, the main disadvantage with CHB topology is requirement of bulky and expensive phaseshifting multi-winding isolation transformers to provide isolated dc sources [2]. In applications such as traction, marine propulsion and wind power conversion, CHB topology may not be preferred due to space and weight restrictions. One feasible option is modular multilevel converter (MMC) that has been originally proposed for high-voltage dc transmission (HVDC) systems [3]–[5]. This topology overcomes the drawback of CHB topology by eliminating the need of isolated dc sources by means of floating capacitors that acts as voltage sources. Due to modularity and scalability, MMC is suitable for any voltage/current level requirements and offers faulttolerant operation. Recently, MMC has been commercially introduced for MV drives both as an active-front-end (AFE) rectifier and also as an inverter [6]. In literature, several control and modulation techniques have been proposed based on the requirements of MMC. The major challenge in control of MMC is to maintain capacitor voltages around their nominal value. The original publications proposed a simple and novel method to obtain voltage balancing of capacitors. The idea is to use modulation stage to determine the number of submodules to be inserted in each arm at any given time instance. The selection of submodule to be inserted/bypassed is based on a sorting algorithm, which requires measurement of all capacitor voltages at each sampling instant. Depending on the direction of arm current, higher ones are selected to discharge them or lower ones are selected to charge them [7]. The well-known sinusoidal pulsewidth modulation (PWM) technique for MLCs such as level-shifted PWM and phase-shifted PWM have been implemented for MMCs in combination with sorting algorithm [8]. Similarly, space vector modulation (SVM) technique has been adapted for MMCs [9], [10]. Later, an open-loop control approach has been developed to determine the number of submodules to be inserted in each arm based on the estimation of energy stored in each arm [11]. Another idea has been proposed by utilizing averaging and balancing control loops to modify the modulation index of each submodule based on the voltage error and direction of arm current [12]. Thermal constraints of semiconductor device technology set limitation on the overall device losses in high power applications. Usually, low device switching frequency operation is preferred in order to limit the dominating switching losses so that power converter can be operated at rated fundamental current with feasible cooling requirements [13]. On the contrary, reducing the device switching frequency increases the harmonic distortion of converter output currents. Therefore, the challenge is to maintain quality of converter output currents while operating at low device switching frequency. Classical modulation techniques such as sinusoidal PWM and SVM techniques require higher device switching frequency to achieve better quality of converter output currents [14]. Another popular classical technique to operate MV converter at low device switching frequency is selective harmonic elimination modulation (SHEM), which utilizes numerical techniques to determine switching angles off-line in order to eliminate lower order harmonic components [15]. 0093-9994 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2016.2536585, IEEE Transactions on Industry Applications 2 However, some demerits of SHEM are limited operating region due to unachievable numerical solutions and poor dynamic performance [2]. Another classical method, which is gaining popularity in the field of high power converters to achieve low device switching frequency operation is model predictive control (MPC) [16]. However, higher computational burden to solve underlying optimization problem as number of levels increase heavily restricts its practical implementation [17]. Synchronous optimal pulsewidth modulation (SOP) is an emerging modulation technique to operate high power converters at low device switching frequency, while maintaining the quality of output currents. It has been successfully implemented for several classical MLC topologies [18]–[22]. Also, it has been recently introduced in commercial MV drives [23]. SOP utilizes off-line optimization technique to pre-determine switching angles that minimize the harmonic distortion of converter output currents for each steady-state operating point. These optimal switching patterns are derived for constant v/f control of induction motor drive. However, these optimal switching patterns are suitable only for low performance MV drives due to assumption of steady-state operating conditions [24]. For high performance drives, which are subjected to frequent transient conditions, SOP technique should be combined with optimal stator current trajectory tracking method or stator flux trajectory tracking method or model predictive control [25]–[27]. On the other hand, SOP technique for MMC topology has been not explored yet. The major challenge will be to maintain floating capacitor voltages around their nominal value, which conduct fundamental frequency load current. The objective of this study is to propose enhanced SOP technique for MMC to achieve low device switching frequency operation, minimized harmonic distortion of converter output currents and minimal capacitor voltage ripple [28]. The paper contents are organized as follows: Circuit topology and operation of MMC is discussed in Section II, basics of SOP technique are presented in Section III, implementation of SOP for MMC topology is presented in Section IV. The experimental results are demonstrated in Section V to validate the performance of proposed technique. II. C IRCUIT T OPOLOGY AND O PERATION The circuit configuration of MMC is shown in Fig. 1. Each phase leg of MMC consists of two arms connected in series via arm inductors. The arm connected to positive rail is called upper arm and the arm connected to negative rail is called lower arm. Each arm consists of several submodules connected in series. The submodule consists of a half-bridge cell with a dc capacitor. Each submodule can be either inserted or bypassed by turning on top switch S1 or bottom switch S2, respectively. When a submodule is inserted, its output voltage is equal to capacitor voltage that gets charged or discharged depending on the direction of arm current. When a submodule is bypassed, its output voltage will be zero and its capacitor voltage remains constant. The ac-side output voltage is controlled by varying the number of submodules that are inserted in the upper and lower Fig. 1. MMC topology TABLE I S YNTHESIS OF OUTPUT VOLTAGE LEVELS OF 5L-MMC Nu Nl viu vil vphO 0 1 2 3 4 4 3 2 1 0 0 Vnom 2Vnom 3Vnom 4Vnom 4Vnom 3Vnom 2Vnom Vnom 0 2Vnom Vnom 0 -Vnom -2Vnom arms. Consider a single phase leg, let the instantaneous inserted voltages in upper arm and lower arm are denoted as viu and vil , respectively. By neglecting the arm inductor voltage drop, it can be shown that ac-side output voltage is equal to 1 2 (vil − viu ) [11]. Let the number of submodules in each arm are denoted as Nsm . Then, nominal value of submodule capacitor voltage Vnom should be equal to Vdc /Nsm . In general, MMC is operated such that Nsm submodules are inserted in one phase leg, which lead to Nsm +1 voltage levels in output phase voltage. Thus, MMC with n-1 submodules in one arm is referred as nL-MMC in this paper. For example, MMC with four submodules in each arm is referred as 5L-MMC. The operation of 5L-MMC for one of three phase legs is shown in TABLE I, where Nu , Nl denote the number of submodules inserted in upper arm and lower arm, respectively. It should be observed that phase output voltage vphO (ph ∈ A, B, C) of MMC with four submodules consists of five voltage levels. III. BASICS OF SOP SOP is a combination of synchronous PWM and optimal PWM. Synchronous PWM is usually used in low device switching frequency applications, where frequency of carrier signal fc is always made an integer multiple of fundamental frequency f1 . This is done in order to eliminate inter-harmonic components. Synchronous PWM results in a fewer number of switching commutations in a fundamental period and thus optimization methods are suggested for off-line determination of switching angles with goal to minimize the harmonic distortion of converter output currents [29]. 0093-9994 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2016.2536585, IEEE Transactions on Industry Applications 3 The SOP technique has been implemented for v/f control of variable speed induction motor drives. In variable speed drives, the fundamental frequency f1 varies from 0 to rated fundamental frequency f1R . The typical value of f1R is 50/60 Hz, however, it might go up to a few hundred Hertz in some high-speed applications. Therefore, the standard practice 1 , in SOP is to utilize normalized fundamental frequency ff1R which is defined as modulation index m. The value of m varies from 0 to 1 and the entire range of m is usually divided into small intervals to obtain the discrete values of m. SOP technique determines switching angles for all possible discrete values of m. In general, half-wave and quarter-wave symmetries are introduced in the switching pattern to eliminate all odd order harmonics and then, it is sufficient to determine the switching angles in a quarter period. The number of switching angles in a quarter period is denoted as pulse number N . Each steady-state operating point is denoted as (m,N ). The implementation of SOP technique for any power electronic converter involves three steps [28]: 1) Determine value of N such that the device switching frequency fs is limited to fs,max for each m. 2) Perform optimization to pre-determine switching angles for each steady-state operating point (m,N ) that minimize the harmonic distortion of output current. 3) Assign switching angles to each power semiconductor device based on optimal switching patterns. The first step in SOP technique is dependent on converter topology. However, some classical topologies such as neutralpoint-clamped (NPC), flying-capacitor (FC), CHB or hybrid topologies such as 3L-NPC leg based CHB topology, share a common feature that an nL-MLC consists of 0.5*(n-1) subconverters (H-Bridge or 3L-NPC) in each phase. Therefore, a generalized expression has been developed to calculate pulse number N for entire range of m [18]. However, this generalized expression is not valid for MMC topology that will be explained in Section IV. The last step of SOP deals with assigning switching angles to each power semiconductor device to realize optimal voltage waveforms. One of the important factor to be considered while assigning switching angles is to achieve identical device switching frequency. There might be additional requirements unique to each topology such as capacitor voltage balancing, minimizing capacitor voltage ripple, elimination/minimization of common-mode voltages or currents and so on. Therefore, the overall procedure to allocate switching angles is unique to each topology and its implementation becomes more complex as number of voltage levels increases, which is due to higher number of redundant switching states. The topology of MMC poses further challenges due to presence of floating capacitors which conduct fundamental frequency load current. More details about first and last steps of SOP technique for MMC topology will be dealt in Section IV. In the second step, optimization is performed for each steady state operating point (m, N ) to pre-determine the N switching angles, which minimize the harmonic distortion of converter output currents. The objective function for optimization is distortion factor d, which is independent of any Fig. 2. Possible structures of 3L, and 5L waveforms with N =5 machine parameters. For a nL-MLC, the final expression for d is obtained as [30], qP PN 1 2 2 ih k ( k4 )( i=1 s(i)cos(kαi )) q = , (1) d= P 1 ih,six−step (n − 1) ( ) k k4 where, ih and ih,six−step represents the harmonic rms current during normal operation and six step operation (m=1) of converter, respectively, k represents k th order harmonic (k=5,7,11,13,. . . ), and the term s(i) represents switching transition at switching angle αi . The value of s(i) = 1 when switching leads to higher output potential and s(i)=-1 if switching leads to lower output potential. For constant v/f control of induction motor drive, the following non-linear constraint is obtained, f1 u1 = f1R u1,six−step N (n − 1)m X = s(i) cos(αi ), (2) 2 i=1 where, u1 and u1,six−step represents the fundamental component of converter output voltage for normal operation and six-step operation, respectively. The goal of optimization is to determine switching angles correspond to minimum d for each steady-state operating points (m,N ), while satisfying the non-linear constraint given by (2). The expression for d has two variables: switching transitions s(i) and switching angles αi (i=1 to N ). To simplify the optimization calculations, it is important to obtain all possible set of switching transitions s(i) (i=1 to N ) known as structures, which correspond to an nL waveform for a given pulse number N . The structure represents a unique sequence of output voltage levels. As number of levels increase, the possible structures increase due to an additional degree of freedom in choosing next voltage level. Another obvious fact is that the number of structures also increases at higher values of pulse number N . The different possible structures for 3L, and 5L waveforms with N =5 are shown in Fig. 2. The more details about structures can be read in [18]. After determining all possible structures for a given pulse number N , the next step is to perform optimization to determine switching angles αi (i=1 to N ) for each structure 0093-9994 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2016.2536585, IEEE Transactions on Industry Applications 4 corresponding to each steady-state operating point (m,N ). In addition to non-linear constraint (2), the switching angles should satisfy the following constraints: (1) sufficient gap (10µs) between consecutive switching angles to allow for minimum on times and off times of the power semiconductor devices, (2) continuity of switching angles for a given pulse number N over its associated modulation index range in order to avoid transients in output currents. The structure which exhibits minimum d for a particular pulse number N over its associated modulation index range is selected. The switching transitions of best possible structure along with optimal switching angles are stored in look-up tables for each steady-state operating point (m,N ). Complete details about optimization algorithm can be seen in [18]. IV. SOP OF MMC T OPOLOGY The details of first and last steps in SOP technique for MMC topology are given in this Section. In the first step, the pulse number N has to be estimated for each discrete value of m such that device switching frequency fs is limited to fs,max . In the second step, optimization algorithm generates optimal switching angles for each steady-state operating point (m,N ), as explained in Section III. In the last step, switching angles are assigned to each power semiconductor device based on the following criteria: identical device switching frequency, and maintaining capacitor voltages around their nominal value. More details of implementation are given next. A. Determination of N Consider an nL-MMC that has to be operated with device switching frequency fs limited to fs,max . Let the ratio between fs and f1 be denoted as Rf . As the SOP technique demands N AND fs FOR A GIVEN m 0.801 0.668 0.572 0.501 0.445 0.401 0.365 0.334 0.309 0.287 - TABLE II m WITH fs,max = 200 H Z FOR 5L-MMC f1 (Hz) 1.000 0.800 0.667 0.571 0.500 0.444 0.400 0.364 0.333 0.308 40.05 33.40 28.60 25.05 22.25 20.05 18.25 16.70 15.45 14.35 - 50.00 40.00 33.35 28.55 25.00 22.20 20.00 18.20 16.65 15.40 N 8 10 12 14 16 18 20 22 24 26 fs (Hz) 160.20 167.00 171.60 175.35 178.00 180.45 182.50 183.70 185.40 186.55 - 200 200 200 200 200 200 200 200 200 200 Fig. 4. Results of optimization for operating 5L-MMC at fs,max =200 Hz : d versus m that Rf should be an integer, the following relationship is obtained for each m, fs,max Rf = f loor , (3) mf1R where, the function ‘floor’ returns largest previous integer. Then, the total number of commutations in one arm which contains (n-1) submodules should be equal to (n-1)*2*Rf . Finally, the value of N for the nL-MMC is obtained as, (n − 1) ∗ 2Rf 4 (n − 1) fs,max = ∗ f loor . 2 mf1R N= (4) The goal of our study is to implement SOP for a 5L-MMC with fs,max set at 200 Hz. The selected value for fs,max is based on the experimental results from classical 5L-MLC topologies [18]. Based on (4), the estimated value of N for different values of m with fs,max set at 200 Hz is shown in TABLE II. From estimated values of N , the device switching frequency fs for different values of m is shown in Fig. III. It should be observed from TABLE II and Fig. III that device switching frequency is limited to 200 Hz for each value of m. Next, optimization is performed to determine N switching angles for a given operating point (m,N ) that minimize the harmonic distortion of converter output currents. B. Optimization of switching angles The optimization algorithm given in Section III is implemented using MATLAB programming. The MATLAB gradient method ‘FMINCON’ with active-set algorithm searches for switching angles αi (i=1 to N ), which minimize the objective function d for each steady-state operating point (m,N ). The optimization results of proposed SOP technique for 5L-MMC with fs,max = 200 Hz is shown in Fig. IV-A. It should be noticed that harmonic distortion has been reduced significantly when m < 0.93. At higher modulation index values m >0.93, harmonic distortion increases as MMC approaches six-step operation. C. Allocation of Optimal Switching Angles Fig. 3. N and fs for different values of m to operate 5L-MMC at fs,max = 200 Hz After determining the optimal switching angles, the next step is to allocate switching angles to each power semiconductor device. Two main factors to be considered while assigning switching angles are identical device switching frequency and maintaining capacitor voltages around their nominal value. 0093-9994 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2016.2536585, IEEE Transactions on Industry Applications 5 TABLE III L IST OF COMPONENTS AND THEIR PARAMETERS IN EXPERIMENTAL SETUP Fig. 5. Submodule capacitor voltages (p.u.) of one phase leg with pre-assigned switching angles for insertion/bypass of submodules An algorithm has been developed to predetermine switching angles of each submodule based on the optimal switching patterns, while achieving identical device switching frequency. However, the submodule capacitor voltages get diverged as shown in Fig. 5. The reason is that net transfer of energy to each submodule capacitor is either positive or negative in each fundamental cycle. The conclusion is that it is not possible to maintain capacitor voltages around their nominal value with predetermined switching angles to insert/bypass submodules. In this paper, angle swapping technique has been proposed to maintain capacitor voltages around their nominal value. Angle Swapping Technique: At any given time instant, each submodule of MMC is operated either in insertion mode or bypass mode. In bypass mode, arm current does not flow via submodule capacitor and thus its voltage remains constant. In insertion mode, the submodule capacitor gets charged or discharged depending on the direction of arm current and total amount of energy transferred to each submodule capacitor depends on the magnitude of arm current and duration of submodule insertion. During one fundamental cycle, the capacitor voltage increases if the net energy transfer is positive, whereas capacitor voltage decreases if net energy transfer is negative. With pre-assigned switching angles, the submodule capacitor voltages either continuously increase or decrease over a period of time as shown in Fig. 5. The basic idea behind angle swapping technique is to ensure that net transfer of energy to each submodule capacitor is zero over a few fundamental cycles. This is done by swapping the gating signals among the submodules of each arm after every fundamental cycle. For example, predetermined gating signals G1, G2, G3 and G4 for one arm of 5L-MMC will drive the submodules as follows: 1st cycle: SM1, SM2, SM3 and SM4, 2nd cycle: SM2, SM3, SM4 and SM1, 3rd cycle: SM3, SM4, SM1, SM2, and 4th cycle: SM4, SM1, SM2, SM3. In this way it is possible to maintain submodule capacitor voltages around their nominal value. DC-link voltage Vdc Number of submodules per arm Nsm Nominal capacitor voltage Vnom Arm inductance Submodule capacitance Half-bridge modules Six-pack driver Induction motor 300 V 4 75 V 1.35 mH 1.33 mF SK30GBB066T VCE =600 V, ICnom =30 A SKHI 61R 400 V, 3.5 A, 50 Hz 1.5 kW, 0.79 PF, 1500 rpm Fig. 6. Prototype of 5L-MMC phase leg (a) V. E XPERIMENTAL R ESULTS The proposed technique has been implemented for modulating 5L-MMC feeding an 1.5-kW induction motor with fs,max set at 200 Hz. A low power prototype of 5L-MMC phase leg has been developed with half-bridge modules from Semikron (SK30GBB066T) and six-pack IGBT driver SKHI 61R, as shown in Fig. 6. The list of components and their rated parameters of experimental set-up are shown in TABLE III. The output of 5L-MMC is connected directly to induction motor without using any LC filter to get better understanding of significant harmonics in stator currents. (b) Fig. 7. Experimental results for operating point (m=0.9216, N =8). X-axis: 5 ms/div. (a) Output phase and line-to-line voltage (Y-axis: 50 V/div, 100 V/div) (b) three-phase stator currents (Y-axis: 1 A/div) 0093-9994 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2016.2536585, IEEE Transactions on Industry Applications 6 The optimal switching angles have been generated for three different operating points (m=0.9216, N =8), (m=0.6667, N =12), and (m=0.4431, N =18). The output phase voltage with five levels, line-to-line voltage, and stator currents for these three different operating points are shown in Figs. 7 (a)(b) to Figs. 9 (a)-(b), respectively. It should be observed that the machine stator currents are sinusoidal, although the device switching frequency has been limited to 200 Hz, as shown in Figs. 7 (b) to Figs. 9 (b). Thus, it can be concluded that SOP technique permits reduction in device switching frequency up to 200 Hz for 5L-MMC, while maintaining the quality of machine stator currents. The space vector trajectories of stator currents for these three operating points are shown in Fig. 10 (a)-(c), respectively. The circular trajectories demonstrate low harmonic distortion of machine stator currents, although the device switching frequency has been limited to 200 Hz. In addition, FFT analysis has been performed on recorded stator currents to get better understanding of the harmonic spectrum with calculated optimal switching angles. The harmonic spectrum of stator currents for three operating points are shown in Fig. 12 (a)-(c), respectively. The THD of stator currents for three operating points are obtained as 2.09%, 3.09% and 3.81%, respectively. Also, the enlarged view of harmonic spectrum shows that all dominant harmonic components are limited to 1% of fundamental component. The SM capacitor voltages of upper arm of phase leg A for the three operating points (m=0.9294, N =8), (m=0.6667, N =11), and (m=0.5020, N =15) are shown in Fig. 11 (a)(c), respectively. The SM capacitor voltages are well balanced with low voltage ripple owing to angle swapping technique. It should be noticed that voltage ripple increases as the value of m decreases. From all the experimental results, it should be concluded that proposed technique modulates the 5L-MMC with fs,max set at 200 Hz, while minimizing the harmonic distortion of machine stator currents, and maintaining floating capacitor voltages around their nominal value. (a) (a) VI. S UMMARY AND C ONCLUSION Modular multilevel converters (MMCs) have recently found industrial relevance in medium voltage drives. In medium voltage drives, thermal constraints of semiconductor devices restrict device switching frequency to a few hundred Hertz. However, low device switching frequency operation leads to higher harmonic distortion of machine stator currents. An emerging low device switching frequency modulation technique for medium voltage converters that does not compromise on the quality of output currents is synchronous optimal pulsewidth modulation (SOP). The implementation of SOP for MMC topology requires following modifications: method to estimate pulse number N at each modulation index value, and allocation of switching angles to each power semiconductor (b) (b) Fig. 8. Experimental results for operating point (m=0.6667, N =12). X-axis: 10 ms/div. (a) Output phase and line-to-line voltage (Y-axis: 50 V/div, 100 V/div) (b) three-phase stator currents (Y-axis: 1 A/div) Fig. 9. Experimental results for operating point (m=0.4431, N =18). X-axis: 20 ms/div. (a) Output phase and line-to-line voltage (Y-axis: 50 V/div) (b) three-phase stator currents (Y-axis: 1 A/div) 0093-9994 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2016.2536585, IEEE Transactions on Industry Applications 7 (a) (b) (c) Fig. 10. Space vector trajectories of machine stator currents. X,Y-axis: 1 A/div (a) (m=0.9216, N =8). (b) (m=0.6667, N =12). (c) (m=0.4431, N =18) (a) (b) (c) Fig. 11. Submodule capacitor voltages of upper arm of phase A leg. X-axis: 20 ms/div. Y-axis: 20 V/div (a) (m=0.9216, N =8). (b) (m=0.6667, N =12). (c) (m=0.4431, N =18) (a) device. The optimal switching angles should be allocated to each power semiconductor device based on following criteria: identical device switching frequency and maintaining capacitor voltages around their nominal value. An angle swapping scheme has been utilized to maintain submodule capacitor voltages around their nominal value. The experimental results from 5L-MMC fed 1.5-kW induction motor drive validated the proposed method and demonstrated its performance. R EFERENCES (b) (c) Fig. 12. Harmonic spectrum of stator currents (enlarged view to show the dominant harmonic components). X-axis: Harmonic Order. Y-axis: IIh . (a) 1 (m=0.9216, N =8). (b) (m=0.6667, N =12). (c) (m=0.4431, N =18) [1] A. Nabae, I. Takahashi, and H. Akagi, “A New Neutral-Point-Clamped PWM Inverter,” IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp. 518 –523, sept. 1981. [2] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. Franquelo, B. Wu, J. Rodriguez, M. Pérez, and J. Leon, “Recent Advances and Industrial Applications of Multilevel Converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553 –2580, aug. 2010. [3] A. Lesnicar and R. Marquardt, “A new modular voltage source inverter topology,” in Sixth Eur. Conf. Power Electron. Appl., May 2003, pp. 2–4. [4] M. Glinka and R. Marquardt, “A new AC/AC multilevel converter family,” IEEE Trans. Ind. Electron., vol. 52, no. 3, pp. 662–669, June 2005. [5] B. Gemmell, J. Dorn, D. Retzmann, and D. Soerangr, “Prospects of multilevel VSC technologies for power transmission,” in IEEE/PES Trans. Distrib. Conf. Expo., April 2008, pp. 1–16. [6] SIEMENS. Sinamics SM120 Cabinet Modules. [Online]. Available: http://www.industry.siemens.com/drives/global/en/converter/mv-drives/ sinamics-sm120-cm/Pages/sinamics-sm120-cm.aspx [7] S. Rohner, S. Bernet, M. Hiller, and R. Sommer, “Modulation, Losses, and Semiconductor Requirements of Modular Multilevel Converters,” IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2633–2642, Aug 2010. [8] M. Saeedifard and R. Iravani, “Dynamic Performance of a Modular Multilevel Back-to-Back HVDC System,” IEEE Trans. Power Deliv., vol. 25, no. 4, pp. 2903–2912, Oct 2010. 0093-9994 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIA.2016.2536585, IEEE Transactions on Industry Applications 8 [9] A. Lesnicar and R. Marquardt, “An innovative modular multilevel converter topology suitable for a wide power range,” in IEEE Bologna Power Tech Conf., vol. 3, June 2003, pp. 6–6. [10] Y. Deng, Y. Wang, K. H. Teo, and R. Harley, “Space vector modulation method for modular multilevel converters,” in IEEE IECON, Oct 2014, pp. 4715–4721. [11] L. Angquist, A. Antonopoulos, D. Siemaszko, K. Ilves, M. Vasiladiotis, and H.-P. Nee, “Open-Loop Control of Modular Multilevel Converters Using Estimation of Stored Energy,” IEEE Trans. Ind. Appl., vol. 47, no. 6, pp. 2516–2524, Nov 2011. [12] M. Hagiwara, K. Nishimura, and H. Akagi, “A Medium-Voltage Motor Drive With a Modular Multilevel PWM Inverter,” IEEE Trans. Power Electron., vol. 25, no. 7, pp. 1786–1799, July 2010. [13] J. Holtz and X. Qi, “Optimal control of medium-voltage drives —an overview,” IEEE Trans. Ind. Electron., vol. 60, no. 12, pp. 5472–5481, 2013. [14] M. Perez, S. Bernet, J. Rodriguez, S. Kouro, and R. Lizana, “Circuit Topologies, Modeling, Control Schemes, and Applications of Modular Multilevel Converters,” IEEE Trans. Power Electron., vol. 30, no. 1, pp. 4–17, Jan 2015. [15] G. Konstantinou, M. Ciobotaru, and V. Agelidis, “Selective harmonic elimination pulse-width modulation of modular multilevel converters,” IET Power Electron., vol. 6, no. 1, pp. 96–107, Jan 2013. [16] M. Perez, J. Rodriguez, E. Fuentes, and F. Kammerer, “Predictive Control of AC-AC Modular Multilevel Converters,” IEEE Trans. Ind. Electron., vol. 59, no. 7, pp. 2832–2839, July 2012. [17] J. Bocker, B. Freudenberg, A. The, and S. Dieckerhoff, “Experimental Comparison of Model Predictive Control and Cascaded Control of the Modular Multilevel Converter,” IEEE Trans. Power Electron., vol. 30, no. 1, pp. 422–430, Jan 2015. [18] A. Rathore, J. Holtz, and T. Boller, “Generalized Optimal Pulsewidth Modulation of Multilevel Inverters for Low-Switching-Frequency Control of Medium-Voltage High-Power Industrial AC Drives,” IEEE Trans. Ind. Electron., vol. 60, no. 10, pp. 4215–4224, Oct 2013. [19] A. Edpuganti and A. Rathore, “Fundamental Switching Frequency Optimal Pulsewidth Modulation of Medium-Voltage Nine-Level Inverter,” IEEE Trans. Ind. Electron., vol. 62, no. 7, pp. 4096–4104, July 2015. [20] A. Rathore, J. Holtz, and T. Boller, “Synchronous Optimal Pulsewidth Modulation for Low-Switching-Frequency Control of Medium-Voltage Multilevel Inverters,” IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2374 –2381, july 2010. [21] A. Edpuganti and A. Rathore, “Fundamental Switching Frequency Optimal Pulsewidth Modulation of Medium-Voltage Cascaded SevenLevel Inverter,” IEEE Trans. Ind. Appl., vol. 51, no. 4, pp. 3485–3492, July 2015. [22] A. Edpuganti and A. Rathore, “New Optimal Pulsewidth Modulation for Single DC-Link Dual-Inverter Fed Open-End Stator Winding Induction Motor Drive,” IEEE Trans. Power Electron., vol. 30, no. 8, pp. 4386– 4393, Aug 2015. [23] P. Torri, G. da Cunha, T. Boller, A. Rathore, J. Holtz, and N. Oikonomou, “Optimal pulse width modulation for multi-level inverter systems,” April 20 2011, EP Patent App. EP20,090,171,698. [Online]. Available: http: //www.google.com/patents/EP2312739A1?cl=en. [24] J. Holtz and B. Beyer, “The trajectory tracking approach-a new method for minimum distortion PWM in dynamic high-power drives,” IEEE Trans. Ind. Appl., vol. 30, no. 4, pp. 1048 –1057, jul/aug 1994. [25] N. Oikonomou and J. Holtz, “Closed-Loop Control of Medium-Voltage Drives Operated With Synchronous Optimal Pulsewidth Modulation,” IEEE Trans. Ind. Appl., vol. 44, no. 1, pp. 115 –123, Jan.-Feb. 2008. [26] J. Holtz and B. Beyer, “Fast current trajectory tracking control based on synchronous optimal pulsewidth modulation,” IEEE Trans. Ind. Appl., vol. 31, no. 5, pp. 1110 –1120, sep/oct 1995. [27] T. Geyer, N. Oikonomou, G. Papafotiou, and F. Kieferndorf, “Model Predictive Pulse Pattern Control,” IEEE Tran. Ind. Appl., vol. 48, no. 2, pp. 663–676, March 2012. [28] A. Edpuganti and A. Rathore, “Optimal pulsewidth modulation of medium-voltage modular multilevel converter,” in Proc. IEEE IAS Annu. Meeting, Oct 2015, pp. 1–8. [29] J. Holtz, “Pulsewidth modulation for electronic power conversion,” Proc. IEEE, vol. 82, no. 8, pp. 1194 –1214, aug 1994. [30] A. Edpuganti and A. Rathore, “A Survey of Low Switching Frequency Modulation Techniques for Medium-Voltage Multilevel Converters,” IEEE Trans. Ind. Appl., vol. 51, no. 5, pp. 4212–4228, Sept 2015. Amarendra Edpuganti (S’14, M’16) received the B.Tech. degree in electrical and electronics engineering from National Institute of Technology, Warangal, India, in 2007, the M.Tech degree in electrical engineering from Indian Institute of Technology, Kanpur, India, in 2012, and the Ph.D. degree in the area of power electronics in the Department of Electrical and Computer engineering, National University of Singapore, Singapore, in 2016. He was a Software Engineer with Adobe Systems Inc., Bangalore, India from August 2007 to December 2009. Currently, he is a Scientist with the ABB Grid Systems Research and Development Center, Chennai, India. His research interests include multilevel converters, high-voltage dc transmission systems, low device switching frequency modulation techniques, and medium-voltage drives. Akshay Kumar Rathore (M’05, SM’12) received his Masters degree from Indian Institute of Technology (BHU), Varanasi, India in 2003. He was awarded Gold Medal for securing highest academic standing among all electrical engineering specializations. He obtained PhD from University of Victoria, Victoria, BC, Canada in 2008. He was a recipient of University PhD Fellowship and Thouvenelle Graduate Scholarship. He had two subsequent postdoctoral research appointments with University of Wuppertal, Germany, and University of Illinois at Chicago, USA. From November 2010-Feb 2016, he was an Assistant Professor in Department of Electrical and ComputerEngineering, National University of Singapore, Singapore. Currently, he is an Associate Professor at Department of Electrical and Computer Engineering, Concordia University, Montreal, Canada. Dr. Rathore has published above 130 research papers in international journals and conferences including 45 IEEE Transactions. He is an Associate Editor of IEEE Transactions on Industry Applications, IEEE Transactions on Industrial Electronics, IEEE Transactions on Transportation Electrification, IEEE Transactions on Sustainable Energy, and IEEE Journal of Emerging Selected Topics in Power Electronics. He is a winner and recipient of 2013 IEEE IAS Andrew W Smith Outstanding Young Member Award and 2014 Isao Takahashi Power Electronics Award. 0093-9994 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.