Download N-channel 800 V, 0.400 typ., 12 A MDmesh™ K5 Power MOSFET in

STP14N80K5
N-channel 800 V, 0.400 Ω typ., 12 A MDmesh™ K5
Power MOSFET in a TO-220 package
Datasheet - production data
Features





Order code
VDS
RDS(on) max.
ID
STP14N80K5
800 V
0.445 Ω
12 A
Industry’s lowest RDS(on) x area
Industry’s best FoM (figure of merit)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Applications
Figure 1: Internal schematic diagram

Switching applications
Description
This very high voltage N-channel Power
MOSFET is designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
Table 1: Device summary
Order code
Marking
Package
Packing
STP14N80K5
14N80K5
TO-220
Tube
March 2016
DocID029058 Rev 1
This is information on a product in full production.
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www.st.com
Contents
STP14N80K5
Contents
1
Electrical ratings ............................................................................. 3
2
Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3
Test circuits ..................................................................................... 9
4
Package information ..................................................................... 10
4.1
5
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TO-220 type A package information................................................ 11
Revision history ............................................................................ 13
DocID029058 Rev 1
STP14N80K5
1
Electrical ratings
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
VGS
Parameter
Unit
± 30
V
ID
Drain current (continuous) at TC = 25 °C
12
A
ID
Drain current (continuous) at TC = 100 °C
7.4
A
Drain current (pulsed)
48
A
W
(1)
ID
PTOT
Gate-source voltage
Value
Total dissipation at TC = 25 °C
130
dv/dt
(2)
Peak diode recovery voltage slope
4.5
dv/dt
(3)
MOSFET dv/dt ruggedness
50
Tstg
Storage temperature range
TJ
Operating junction temperature range
- 55 to 150
V/ns
°C
Notes:
(1)
Pulse width limited by safe operating area.
(2)
ISD ≤ 12 A, di/dt ≤ 100 A/μs; VDS(peak) < V(BR)DSS,VDD= 640 V
(3)
VDS ≤ 640 V
Table 3: Thermal data
Symbol
Parameter
Value
Unit
Rthj-case
Thermal resistance junction-case
0.96
°C/W
Rthj-amb
Thermal resistance junction-amb
62.5
°C/W
Table 4: Avalanche characteristics
Symbol
Parameter
IAR
Avalanche current, repetitive or not repetitive (pulse width
limited by Tjmax)
EAS
Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR,
VDD = 50 V)
DocID029058 Rev 1
Value
Unit
4
A
270
mJ
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Electrical characteristics
2
STP14N80K5
Electrical characteristics
TC = 25 °C unless otherwise specified
Table 5: On/off-state
Symbol
Parameter
V(BR)DSS
Drain-source breakdown voltage
Test conditions
Min.
VGS = 0 V, ID = 1 mA
800
Typ.
Max.
Unit
V
VGS = 0 V, VDS = 800 V
1
µA
IDSS
Zero gate voltage drain current
VGS = 0 V, VDS = 800 V
(1)
TC = 125 °C
50
µA
IGSS
Gate body leakage current
VDS = 0 V, VGS = ±20 V
±10
µA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 100 µA
4
5
V
RDS(on)
Static drain-source on-resistance
VGS = 10 V, ID = 6 A
0.400
0.445
Ω
3
Notes:
(1)
Defined by design, not subject to production test.
Table 6: Dynamic
Symbol
Ciss
Parameter
Test conditions
Input capacitance
VDS = 100 V, f = 1 MHz,
VGS = 0 V
Min.
Typ.
Max.
Unit
-
620
-
pF
-
60
-
pF
Coss
Output capacitance
Crss
Reverse transfer capacitance
-
0.8
-
pF
(1)
Equivalent capacitance time
related
-
107
-
pF
Co(er)
(2)
Equivalent capacitance
energy related
-
39
-
pF
Rg
Intrinsic gate resistance
f = 1 MHz , ID= 0 A
-
6.5
-
Ω
Qg
Total gate charge
-
-
nC
Qgs
Gate-source charge
Qgd
Gate-drain charge
VDD = 640 V, ID = 12 A
VGS= 10 V
(see Figure 16: "Test circuit
for gate charge behavior"
Co(tr)
VDS = 0 to 640 V, VGS = 0 V
22
-
4.3
-
nC
-
16.5
-
nC
Notes:
(1)
Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when V DS
increases from 0 to 80% VDSS
(2)
Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when
VDS increases from 0 to 80% VDSS
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DocID029058 Rev 1
STP14N80K5
Electrical characteristics
Table 7: Switching times
Symbol
td(on)
tr
Parameter
Turn-on delay time
Rise time
td(off)
tf
Turn-off delay time
Fall time
Test conditions
Min.
Typ.
Max.
Unit
VDD= 400 V, ID =6 A, RG = 4.7 Ω
VGS = 10 V
see ( Figure 15: "Test circuit for
resistive load switching times" and
Figure 20: "Switching time
waveform")
-
12.5
-
ns
-
8
-
ns
-
33
-
ns
-
10
-
ns
Min.
Typ.
Max.
Unit
Table 8: Source-drain diode
Symbol
Parameter
Test conditions
Source-drain current
-
12
A
(1)
Source-drain current
(pulsed)
-
48
A
(2)
Forward on voltage
-
1.5
V
ISD
ISDM
VSD
ISD = 12 A, VGS = 0 V
trr
Reverse recovery time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
trr
Reverse recovery time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
-
365
ns
-
4.77
µC
-
26
A
-
485
ns
-
5.85
µC
-
24
A
Min.
Typ.
Max.
Unit
30
-
-
V
ISD = 12 A, di/dt = 100 A/µs,
VDD = 60 V
(see Figure 17: "Test circuit for
inductive load switching and
diode recovery times")
ISD = 12 A, di/dt = 100 A/µs,
VDD = 60 V, Tj = 150 °C
(see Figure 17: "Test circuit for
inductive load switching and
diode recovery times")
Notes:
(1)
(2)
Pulse width limited by safe operating area
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Table 9: Gate-source Zener diode
Symbol
V(BR)GSO
Parameter
Gate-source breakdown voltage
Test conditions
IGS= ± 1mA, ID= 0 A
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection,thus eliminating the need for additional external componentry.
DocID029058 Rev 1
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Electrical characteristics
2.2
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STP14N80K5
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
DocID029058 Rev 1
STP14N80K5
Electrical characteristics
Figure 8: Capacitance variations
Figure 9: Normalized gate threshold voltage
vs temperature
Figure 10: Normalized on-resistance vs
temperature
Figure 11: Normalized V(BR)DSS vs temperature
Figure 12: Maximum avalanche energy vs
starting TJ
Figure 13: Source-drain diode forward
characteristics
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Electrical characteristics
STP14N80K5
Figure 14: Maximum avalanche energy vs starting TJ
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DocID029058 Rev 1
STP14N80K5
3
Test circuits
Test circuits
Figure 15: Test circuit for resistive load
switching times
Figure 16: Test circuit for gate charge
behavior
Figure 17: Test circuit for inductive load
switching and diode recovery times
Figure 18: Unclamped inductive load test
circuit
Figure 19: Unclamped inductive waveform
Figure 20: Switching time waveform
DocID029058 Rev 1
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Package information
4
STP14N80K5
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
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DocID029058 Rev 1
STP14N80K5
4.1
Package information
TO-220 type A package information
Figure 21: TO-220 type A package outline
DocID029058 Rev 1
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Package information
STP14N80K5
Table 10: TO-220 type A mechanical data
mm
Dim.
Min.
Max.
A
4.40
4.60
b
0.61
0.88
b1
1.14
1.70
c
0.48
0.70
D
15.25
15.75
D1
12/14
Typ.
1.27
E
10
10.40
e
2.40
2.70
e1
4.95
5.15
F
1.23
1.32
H1
6.20
6.60
J1
2.40
2.72
L
13
14
L1
3.50
3.93
L20
16.40
L30
28.90
øP
3.75
3.85
Q
2.65
2.95
DocID029058 Rev 1
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5
Revision history
Revision history
Table 11: Document revision history
Date
Revision
04-Mar-2016
1
DocID029058 Rev 1
Changes
First release.
13/14
STP14N80K5
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