Download A complementarity approach to modeling dynamic electric circuits

University of Iowa
Iowa Research Online
Theses and Dissertations
Summer 2016
A complementarity approach to modeling dynamic
electric circuits
Mario Barela
University of Iowa
Copyright 2016 Mario Barela
This dissertation is available at Iowa Research Online: http://ir.uiowa.edu/etd/2042
Recommended Citation
Barela, Mario. "A complementarity approach to modeling dynamic electric circuits." PhD (Doctor of Philosophy) thesis, University of
Iowa, 2016.
http://ir.uiowa.edu/etd/2042.
Follow this and additional works at: http://ir.uiowa.edu/etd
Part of the Applied Mathematics Commons
A COMPLEMENTARITY APPROACH TO MODELING DYNAMIC ELECTRIC
CIRCUITS
by
Mario Barela
A thesis submitted in partial fulfillment of the
requirements for the Doctor of Philosophy
degree in Applied Mathematical and Computational Sciences
in the Graduate College of
The University of Iowa
August 2016
Thesis Supervisor: David Stewart
Copyright by
MARIO BARELA
2016
All Rights Reserved
Graduate College
The University of Iowa
Iowa City, Iowa
CERTIFICATE OF APPROVAL
PH.D. THESIS
This is to certify that the Ph.D. thesis of
Mario Barela
has been approved by the Examining Committee for the
thesis requirement for the Doctor of Philosophy degree
in Applied Mathematical and Computational Sciences at
the August 2016 graduation.
Thesis committee:
David Stewart, Thesis Supervisor
Bruce Ayati
Anton Kruger
Suely Oliveira
Keith Stroyan
ACKNOWLEDGEMENTS
I would like to sincerely thank my family: Mom, Dad, and my brothers Emilio
and Michael. Mom, you always encouraged and supported me. Dad, thank you
for your hard work and providing me the opportunity to go to school. Emilio and
Michael, I have always looked up to you two, thank you for being great brothers. I
thank you all for being great role models. To my girlfriend Christine, we came from
opposite coasts and met in the middle at the University of Iowa. I’m glad we shared
the same office our first year in graduate school. Thank you for always being there
for me, I love you very much.
I would also like to thank my thesis advisor Dr. David Stewart for being a
wonderful mentor. I am grateful for your guidance throughout the time I worked on
my PhD. I would also like to thank the University of Iowa Mathematics department
for the opportunities I was given while working here. I would like to thank the U.S.
Department of Education for their financial support through the GAANN fellowship
while working on my PhD.
ii
ABSTRACT
Circuit simulation has been an ongoing problem due to the difficult equations
that model circuit components. For example, an RLC circuit with ideal diodes can
be modeled by a system of differential algebraic equations with complementarity constraints on the diode currents and voltages. In this thesis we develop a mathematical
model for simulating dynamic electric circuits with ideal diodes. We start by developing an efficient model for static circuits which we describe by linear systems of the
form:
M Iˆ = b
where Iˆ represents the loop currents of the circuit and the matrix M describing the
system is symmetric and positive definite. This positive definite property becomes
crucial later when analyzing circuits with ideal diodes. We then extend our model
to include inductors and capacitors, key electric components used in many devices
today. The current voltage relationships within these components are modeled by the
differential equations:
C
dv(t)
= i(t),
dt
L
di(t)
= v(t)
dt
where v(t) and i(t) are the voltage across and the current through the components
at time t. We show that the numerical methods that we use are fast and accurate
with a variety of simulation examples. We then extend our model to include ideal
diodes. Diodes are special electrical elements in that they only allow current to flow
iii
in one direction. This can be represented by a complementarity condition between
the forward current and back voltage on the diode.
0 ≤ vd ⊥ id ≥ 0
where vd and id represent the back voltage and forward current across and through
the diode. We present numerical methods for simulating electrical networks with
resistors, capacitors, inductors, and diodes using a complementarity approach. We
show that applying diagonally implicit Runge-Kutta methods to RLC circuits with
ideal diodes simplifies to solving linear complementarity problems. The problem is
that given M, N ∈ Rn×n and voltage sources V0 ∈ Rn , find forward currents and back
voltages Id , Vd ∈ Rn such that:
M Id = Vd + N V0
with
0 ≤ Vd ⊥ Id ≥ 0
These methods have both high order of accuracy and work directly with the network
description of the circuit.
iv
PUBLIC ABSTRACT
The goal of electric circuit simulation is to describe the flow of electricity
throughout an electric circuit. Simulating the behavior of the circuit can not only
help improve the design and efficiency of electronics, but also save time and money
used in physically making the circuit. Circuit simulation has been an ongoing problem
due to the difficult equations that model circuit components. In this thesis we develop
a mathematical model for simulating dynamic electric circuits with ideal diodes. We
build our model to include key electrical components like power sources, resistors,
inductors, and capacitors. We then extend our model to include ideal diodes. Diodes
are special electrical elements in that they only allow current to flow in one direction.
We present numerical methods for simulating electrical networks with resistors, capacitors, inductors, and diodes using a complementarity approach. These methods
have both high order of accuracy and work directly with the network description of
the circuit.
v
TABLE OF CONTENTS
LIST OF TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
viii
LIST OF FIGURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ix
CHAPTER
1 INTRODUCTION TO ELECTRIC CIRCUITS . . . . . . . . . . . . .
1.1
1.2
1
Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . .
Circuit Components and Concepts . . . . . . . . . . . . . . . . .
1.2.1 Current . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.2 Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.3 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.4 Networks and Graph Theory . . . . . . . . . . . . . . . .
1.2.4.1 Network Terms and Concepts . . . . . . . . . .
Circuit Equations for a Static Circuit . . . . . . . . . . . . . . .
1.3.1 Static Circuits: Voltage Sources and Resistors . . . . . . .
1.3.2 Set up of equations for a circuit with resistors, voltage
sources, and current sources: . . . . . . . . . . . . . . . .
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
5
5
7
8
9
10
12
13
2 RLC CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30
1.3
1.4
2.1
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30
38
40
41
43
45
46
47
48
48
55
58
3 DIODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
2.2
2.3
2.4
2.5
3.1
Characteristics of Inductors and Capacitors . . . . .
2.1.1 RLC Circuit Equation Framework . . . . . .
Backward Euler’s Method . . . . . . . . . . . . . . .
2.2.1 Euler’s Method Applied to an Inductor . . .
2.2.2 Euler’s Method Applied to a Capacitor . . .
2.2.3 Forward Euler’s Method . . . . . . . . . . . .
Runge-Kutta Methods . . . . . . . . . . . . . . . . .
2.3.1 Basic framework for Runge-Kutta Methods .
Backward Euler’s: Runge-Kutta Method . . . . . . .
2.4.1 Diagonally Implicit Runge-Kutta Methods .
2.4.2 Example: Numerically Solving a RLC Circuit
Overview . . . . . . . . . . . . . . . . . . . . . . . .
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24
28
Diode Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1 The Shockley Model . . . . . . . . . . . . . . . . . . . . .
vi
61
62
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63
65
68
69
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71
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75
78
82
86
89
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91
93
4 DISCONNECTING THE NETWORK . . . . . . . . . . . . . . . . . .
95
3.2
3.3
3.4
3.5
3.6
4.1
4.2
4.3
3.1.2 The LCP Model . . . . . . . . . . . . . . . . .
Diodes in a Static Circuit without Current Sources . .
3.2.1 Schur-complements . . . . . . . . . . . . . . .
3.2.2 Set up of the Linear Complementarity Problem
The Linear Complementarity Problem . . . . . . . . .
3.3.1 LCP Applications . . . . . . . . . . . . . . . .
3.3.2 Complementary Cones . . . . . . . . . . . . . .
3.3.3 Existence and Uniqueness . . . . . . . . . . . .
3.3.4 Lemke’s Algorithm for Solving LCPs . . . . . .
Diodes in a Static Circuit with Current Sources . . . .
3.4.1 Example: Rectifier Circuit . . . . . . . . . . .
3.4.2 Threshold Diode Voltage . . . . . . . . . . . .
More DIRK Methods . . . . . . . . . . . . . . . . . .
3.5.1 Stiffly Accurate DIRK Methods . . . . . . . .
Overview . . . . . . . . . . . . . . . . . . . . . . . . .
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Bridge Rectifier Example . . . . . . . . . . . . . . . . . . . . . .
4.1.1 Another Example with Four Connected Components . . .
The GLCP of the Disconnected Component Case of the RLC Circuit with Ideal Diodes . . . . . . . . . . . . . . . . . . . . . . . .
4.2.1 The GLCP Formulation . . . . . . . . . . . . . . . . . . .
4.2.2 Setting up and solving an RLC Circuit with Diodes: No
Current Sources . . . . . . . . . . . . . . . . . . . . . . .
4.2.3 Example: Simulating the Bridge Rectifier . . . . . . . . .
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96
102
104
105
107
109
113
5 FUTURE WORK: TRANSISTORS . . . . . . . . . . . . . . . . . . . 114
5.1
Bipolar Junction Transistors . . .
5.1.1 How do Transistors Work?
5.2 A Simplified BJT Model . . . . . .
5.2.1 Loop Analysis . . . . . . .
5.2.2 Matrix Equations . . . . .
5.2.3 Some Examples . . . . . .
5.3 A Full BJT Model . . . . . . . . .
5.4 Conclusion . . . . . . . . . . . . .
References . . . . . . . . . . . . . . . .
vii
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115
116
118
119
120
122
129
130
132
LIST OF TABLES
Table
3.1
Initial Tableau . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
3.2
Pivot 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
3.3
Pivot 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
81
3.4
Pivot 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
81
3.5
Pivot 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
82
3.6
Pivot 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
82
viii
LIST OF FIGURES
Figure
1.1
Current Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
1.2
Directed Graph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
1.3
Circuit to Graph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
1.4
Circuit to Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
1.5
Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
1.6
Network MST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
1.7
Tree to Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
1.8
Static Circuit Setup Example . . . . . . . . . . . . . . . . . . . . . . . .
27
2.1
Capacitor with applied voltage v . . . . . . . . . . . . . . . . . . . . . .
31
2.2
Inductor Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
34
2.3
RC Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
39
2.4
Inductor Companion Model . . . . . . . . . . . . . . . . . . . . . . . . .
42
2.5
Capacitor Companion Model . . . . . . . . . . . . . . . . . . . . . . . . .
44
2.6
DIRK Inductor Companion . . . . . . . . . . . . . . . . . . . . . . . . .
51
2.7
Capacitor Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
54
2.8
RLC Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
55
2.9
RLC Companion Model . . . . . . . . . . . . . . . . . . . . . . . . . . .
57
2.10 Euler’s Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
57
2.11 DIRK Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
57
ix
2.12 Euler’s Max Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
2.13 DIRK: Max Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
3.1
Bridge Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
3.2
Diode Current-Voltage Relationship . . . . . . . . . . . . . . . . . . . . .
61
3.3
Diode Current-Voltage Relationship . . . . . . . . . . . . . . . . . . . . .
64
3.4
Ideal Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
65
3.5
Complementarity Cone . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
3.6
Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
86
3.7
Rectifier with capacitor smoothing . . . . . . . . . . . . . . . . . . . . .
87
3.8
Rectifier with capacitor smoothing . . . . . . . . . . . . . . . . . . . . .
88
3.9
Rectifier without capacitor smoothing . . . . . . . . . . . . . . . . . . . .
88
3.10 Ideal Diode with threshold voltage . . . . . . . . . . . . . . . . . . . . .
90
4.1
Bridge Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96
4.2
Bridge Rectifier with Diodes Removed . . . . . . . . . . . . . . . . . . .
97
4.3
Quotient Graph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
98
4.4
Loops 1 and 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.5
Loops 3 and 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.6
Four CC Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
4.7
Four CC Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
4.8
Full Bridge Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
4.9
Voltage Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
4.10 Current through edge 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
x
4.11 Current through edge 8: Zoom . . . . . . . . . . . . . . . . . . . . . . . 111
4.12 Current through edge 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
4.13 Current through edge 7: Zoom . . . . . . . . . . . . . . . . . . . . . . . 112
5.1
Transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
5.2
NPN BJT Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
5.3
NP Junction (Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.4
NPN Junction Transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
5.5
BJT Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
5.6
Amplifier Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
5.7
Amplifier Circuit Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
5.8
Amplifier Circuit 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
5.9
Amplifier Circuit 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
5.10 Flip-Flop Circuit Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
5.11 Flip-Flop Circuit: Both Switches On . . . . . . . . . . . . . . . . . . . . 128
5.12 BJT Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
xi
1
CHAPTER 1
INTRODUCTION TO ELECTRIC CIRCUITS
Electrical Engineering is primarily made up of two fundamental theories: electric circuit theory and electromagnetic theory. Many branches of electrical engineering
such as power, electric machines, control, communications, and electronics are based
on electric circuit theory. In circuit theory, when designing an electric circuit, it is not
trivial to describe the flow of current through the electrical components that make
up the circuit. Simulating the behavior of the circuit can not only help improve the
design and efficiency of electronics, but also save time and money used in physically
making the circuit. For integrated circuits, the photomasking process is very expensive and breadboarding is impractical. Often times when analyzing a circuit the user
may want to change values of the components, like the resistance of a resistor, in a
physical setup this will require the user to physically change the resistor. For these
reasons there has been a high demand for circuit simulation software that describes
that current and voltage throughout a circuit. Electric circuit simulation is an ongoing problem due to the difficult equations that model certain circuit elements. For
example, an exponential model is commonly used for modeling diodes which requires
small time steps to capture the rapid transition. This presents problems when simulating complex circuits over long periods due to high storage and computation time.
For circuits with a large number of elements the model used for simulation will need
to be efficient because of the number of computations needed for accurate results.
For example, static circuits can easily be modeled using a system of linear equations,
2
but RLC circuits with ideal diodes are harder to analyze because the model would
involve a system of differential algebraic equations with inequality constraints on the
diodes.
Traditionally, mesh analysis has been used to solve circuits for the current and
voltage at any place in the circuit. Mesh analysis uses Kirchoff’s Current and Voltage
Laws to establish a system of equations. Depending on the circuit components, the
system can be linear or differential algebraic (DAE). A static circuit, one with only
resistors and/or voltage and current sources can be represented as a system of linear
equations because the equations that describe the components are linear. Ohm’s Law
is a linear equation relating current and voltage in a resistor. When inductors and
capacitors are introduced, the system describing the circuit will become a system
of differential algebraic equations (DAEs), because differential equations model the
current and voltage within inductors and capacitors. In the following sections we will
explore methods to set up and solve the system of equations in an RLC circuit. We
will start with a static circuit and then build to numerical schemes to handle RLC
circuits with diodes and transistors. We must point out the terminology commonly
used in electrical engineering for static circuits is “steady state/ DC”. For circuits
that change over time we use the term dynamic instead of “transient”.
As we developed our mathematical model we also implemented our model in MATLAB. To demonstrate the flexibility of the model we review at least one example
at the end of each model type. We are able to test the accuracy of our model by
3
comparing the actual and numerical solutions to simple electric circuits.
1.1
Thesis Organization
In this thesis we develop a mathematical model for dynamic electric circuits
with ideal diodes. It was natural to organize the thesis in the same order in which
we developed the model, starting with most simple static circuit elements and then
building to the more difficult dynamic elements.
In Chapter 1 we introduce the definitions and concepts needed to understand
electric circuits. We discuss a convenient way to describe the structure of an electric
circuit that makes analysis and simulation straight forward. Using Kirchoff’s current
and voltage laws we strategically construct the loops needed to obtain a system of
linear equations needed to describe static circuits. We spend significant time analyzing static circuits because they will be the framework for simulating dynamic circuits.
Our algorithms for loop construction that gives us symmetric and positive definite
linear systems can be used in other settings in static circuit analysis.
In Chapter 2 we introduce inductors and capacitors into the model (RLC
circuits). The current-voltage relationship within these elements are modeled by differential equations and so we examine numerical methods to simulate these circuits.
We show that applying high-order diagonally implicit Runge-Kutta methods to an
RLC circuit relies on solving static circuits. Existing numerical methods for RLC
4
circuits usually have first or second order accuracy. Our high order methods allow for
larger time steps which is important when simulating large circuits over a meaningful
period of time.
In Chapter 3 we introduce ideal diodes into the model. Ideal diodes are electrical elements that only allow current to flow through them in one direction known
as the forward direction. This characteristic can be represented by a complementarity
condition between the forward current and back voltage of the diode. Traditionally
an exponential model is used for diodes. To capture the rapid growth within this
type model, small steps sizes must be used. We show that RLC circuits with ideal
diodes can be modeled by using linear complementarity problems (LCPs). We present
high-order numerical methods that use this complementarity approach, allowing the
use of larger time steps.
In Chapter 4 we address the problem of “disconnecting the network” that appears in Chapter 1. Certain circuits that become disconnected when removing diodes
cannot be analyzed using the standard procedures in the previous chapters. We show
that we can address this problem using a generalized linear complementarity problem
(GLCP).
In Chapter 5 we discuss some of the issues that arise when introducing bipolar
junction transistors (BJTs) into the model. Some of these issues are still open prob-
5
lems and more complicated models are needed. Throughout this thesis we present
examples that demonstrate the accuracy and flexibility of our model.
1.2
Circuit Components and Concepts
The following definitions, descriptions, and analogies to certain electrical components and concepts will help the reader understand electrical circuits. Current,
voltage, resistance, capacitance, and inductance will be the terms most used in the
following sections. Most of the electric circuit definitions and descriptions are given
in [1], Fundamentals of Electric Circuits by Alexander and Sadiku. Before we start
with the components that make up an electrical circuit, let’s define what an electric
circuit is.
Definition 1.1. An electric circuit is an interconnection of electrical components,
and each component is known as an element.
The basic concepts we will cover in this introduction will include charge, current, voltage, circuit elements, and power.
1.2.1 Current
From elementary physics we know that all matter is made up of atoms and
atoms are made up of electrons, neutrons, and protons. A electron, neutron, and
proton are negatively, neutrally, and positively charged particles respectively.
Definition 1.2. The charge e on an electron is negative and equal in magnitude to
1.602 × 10−19 C where the unit of charge C, a coulomb, is the charge transported by
a constant current of one ampere in one second.
6
Definition 1.3. Electric Current is the rate of flow of charge. That is, the relationship between current i and charge q is
i=
dq
dt
where the current is measured in amperes (A) and
1 ampere = 1 coulomb/second
To sum up the past few definitions, electricity is simply the flow of electric
charge over time. One very important aspect of the flow of current is the direction.
If you connect a standard battery to a small light then electrons will flow out of one
side of the battery, through the light bulb, and back into the the other side of the
battery in one direction. This type of current flow is known as direct current.
AC vs DC
100
Amps
50
0
−50
−100
0.005
0.01
0.015
0.02
Time
Figure 1.1: Current Flow
7
Definition 1.4. A direct current (DC) is current that flows in one direction.
Typically DC also implies a constant flow in one direction. Thomas Edison,
american inventor and businessman, developed the first electric power transmission
in the late nineteenth century that was based off of direct current. Not long after
the discovery of direct current, Nikola Tesla came up with the idea of alternating
current while working with Thomas Edison. Edison did not listen to Tesla about his
alternating current ideas and benefits and the two later stopped collaborating.
Definition 1.5. An alternating current (AC) is a current that varies sinusoidally
with time.
The standard flow of current used today to distribute power is alternating
current. We will discuss this idea more when we talk about voltage.
1.2.2 Voltage
Flow of electrons in an electrical conductor requires work or energy transfer.
Imagine water in a pipe, to get the water to move there must be a pressure in the
pipe. The electrical pressure needed to get flow of electrons in a conductor is known
as voltage or potential difference.
Definition 1.6. The voltage vab between two points a and b in an electric circuit is
the energy, or work, needed to move a unit charge from a to b; mathematically
vab =
dw
dq
where w is energy in joules (J) and q is charge in coulombs (C).
8
Voltage is measured in volts, 1 volt = 1 joule/coulomb. It is important to
note that electric current refers to through an element and voltage refers to across
an element. When we plug a lamp into a standard household electrical socket we are
applying an an alternating voltage source to the lamp.
Definition 1.7. The number of cycles per second (Hertz: abbreviated Hz) of anything that oscillates is called the frequency.
In the United States 60 Hz (60 cycles per second) is the standard frequency for
alternating current but in other parts of the world 50 Hz is common. The alternating
voltage source will induce an alternating current through the lamp and so electrons
will be pushed back and forth through the bulb at 60 cycles a second. The flow
of charge through the lightbulb filament cause the filament to glow and therefore
producing light.
1.2.3 Power
Though current and voltage are two important concepts in describing electric
circuits we often need to describe the rate at which electrical energy is transferred.
Definition 1.8. Power is the time rate of expending or absorbing energy, measured
in watts (W). Mathematically speaking we have
p=
dw dq
dw
=
·
= iv
dt
dq dt
where p is power in watts (W), w is energy in joules (J), and t is time in seconds (s).
That is, the power absorbed or supplied by an element is the product of the
9
current through the element and the voltage across the element. Today we use alternating current to transmit power over long distance because of power loss at high
currents. The power losses in a conductor with resistance R and current I are given
by
PL = I 2 R
The last term resistance is simply the opposition to current flow in an electrical
conductor. Resistance has units ohms or volts divide by amps. One ohm is the
resistance between two points when a constant potential difference of one volt applied
to these points produces a current of one ampere. As we add more elements to our
model we will describe the characteristics of the element at that time.
1.2.4 Networks and Graph Theory
In the coming chapters we seek to not only analyze dynamic electric circuits
but also simulate them. Bridging the gap between defining a model and implementing
that model for simulation often requires describing certain ideas for computer input.
When describing electric circuits it is easiest to describe the electric network by taking
a graph theory approach where circuit elements are edges and where those elements
are joined together are nodes. In this section we will describe the graph theory topics
needed to describe an electric circuit for software input. The network ideas and
concepts from this section are credited to Bondy and Murty thanks to their book
“Graph Theory with Applications” [2].
10
1.2.4.1
Network Terms and Concepts
In this section we will introduce some of the common terms and concepts
used in the coming chapters for circuit description. Many real world situations can
conveniently be described by means of a diagram consisting of a set of nodes and edges
connecting those nodes. For example: the states on a US map that share a border,
the interconnection cities via a subway, and in our situation the interconnection of
electric elements in an electric circuit. There are many different ways to define a
graph for describing an electrical network. The definition we give below is best suited
for developing a solver for dynamic electric circuits.
Definition 1.9. A graph G is an ordered pair (N, E) consisting of a non-empty
set of nodes N (G) and edges E(G) joining those nodes. The edges are two-element
subsets of the set of nodes.
This definition is usually used to describe an undirected graph but can be
slightly modified to include directed graphs. For loop analysis on electric circuits,
direction of current flow will be needed, and so directed graphs will be used.
Definition 1.10. A directed graph G is a ordered pair (N, E) consisting of a
non-empty set of nodes N (G) and edges E(G) joining those nodes. The edges are
orderedpairs of the set of nodes where the first entry is the start node and the second
entry is the end node: e = (nstart , nend ).
For the graph G above the vertex and edge sets can be defined as:
V (G) = {1, 2, 3, 4, 5, 6} and E(G) = {(1, 2), (2, 6), (3, 6), (1, 3), (1, 5), (5, 4)}.
11
Figure 1.2: Directed Graph
For electric circuits, using a node-edge incidence matrix to capture the network
structure simplifies the analysis. When simulating circuits, the circuit data must
be entered, and for large circuits this is no easy task. For our model, we tried
to simplify this process by creating an “add edge” feature. For static circuits, the
network structure and values of resistors and sources must be inputs.
Definition 1.11. The node-edge incidence matrix C for a directed graph G(N, E)
with n nodes and e edges is defined as

 1 if edge e flows into node n
−1 if edge e flows out of node n
Cne =

0 otherwise
With this definition we see that the columns of the matrix C represent the
edges of the graph and the orientation of the directed graph is captured through the
sign of the entries of the matrix. The node-edge incidence matrix for the graph in
12
figure 1.2 is given below:


−1 0
0 −1 −1 0
 1 −1 0
0
0
0


0
0 −1 1
0
0


C=

0
0
0
0
1
1


0
0
0
0
1 −1
0
1
1
0
0
0
The reader will notice that in order to input the electric circuit structure into graph
form that a labeling of nodes and edges will be required. This is common in circuit
analysis because the user will want to know the current flow on a particular edge. With
our definition of the node-edge incidence matrix we see that the resulting matrix will
be sparse. A network with e edges and n nodes will have a n × e node-edge incidence
matrix with 2e non-zero entries. With this definition we impose a direction on the
edges. When solving static circuits, the direction in which current will flow is not
known and so we need directed graphs.
1.3
Circuit Equations for a Static Circuit
For the remainder of the chapter we will focus on setting up and systematically
solving static circuits. We spend a lot of time describing this process because solving
static circuits will be the basis for numerically simulating dynamic circuits.
Definition 1.12. A static electric circuit is one that is made up of current sources,
voltage sources, and resistors. Static circuits with ideal elements do not change over
time. Once the switch is turned on, the flow of current through the circuit is constant,
assuming that the sources do not change over time.
With this definition we can allow the sources to change over time. Should this
13
be the case, we would have to solve the circuit at each time-step.
1.3.1 Static Circuits: Voltage Sources and Resistors
We will now consider a static circuit with only voltage sources and resistors.
As mentioned previously, we will represent the circuit as a node-edge graph to capture
the structure of the circuit. Using this representation we can easily use pre-existing
algorithms to identify certain characteristics of the circuit that will be needed for
analysis. Circuit components will represent edges and where they join together will
be nodes.
Figure 1.3: Circuit to Graph
With the node-edge incidence matrix we can then define other vectors to describe the values and location of current sources, voltage sources, and resistors. Later
on, we will go through an example of the overall circuit representation needed for
14
computer input. See the example of defining the node-edge incidence matrix below.
You start by labeling nodes and edges. Edges will need an orientation, or direction,
in which current is thought to flow. In this setting we can make sense of an edge
that has a negative current. This would mean that the current flows in the opposite
direction in which originally thought (labeled).
Example 1.1. Circuit to Matrix
Figure 1.4: Circuit to Matrix
The node-edge incidence matrix for the above circuit is given below.


1 −1 0
0
0 −1
0
1 −1 0 −1 0 

C=
−1 0
1
1
0
0
0
0
0 −1 1
1
There are a few fundamental equations used in defining the equations that
describe a static circuit. Kirchoff’s voltage law, current law (KVL, KCL), and Ohm’s
15
law are all used in creating the linear equations that describe the current flow in a
static circuit. They can be stated as follows:
1. Kirchoff’s Voltage Law: The directed sum of voltage drops across a closed loop
in the circuit is zero.
X
ve = 0
(1.1)
e∈loop
2. Kirchoff’s Current Law: At any node (junction) in the circuit, the sum of current
going into that node is equal to the sum of the current going out of that node
X
ie = 0
(1.2)
e∈node
3. Ohm’s Law: The current through a conductor is directly proportional to the
potential difference across the two points. Ohm’s law states that current is
equal to voltage divided by resistance.
I=
V
R
(1.3)
The main equation we will use to define our system is the KVL equation. If we
can construct loops that go through every edge in our circuit, then KVL will give us
a linear equation for each loop in terms of the voltage drops. We can now define loop
variables to describe the current and voltage in our circuit. The desired information
in circuit simulation is the current through and voltage across every circuit element
in the system.
Definition 1.13. The unknown variables ie and ve represent the current through and
voltage across edge e.
16
Since we will first be analyzing static circuits with voltage sources, current
sources, and resistors it is appropriate to name these values as well.
Definition 1.14. The known variables Re , ve,0 , and ie,cs represent that there is a
resistor, voltage source, and current source of those values on edge e.
For example, the information R1 = 1, v1,0 = 10, and i1,cs = 0 will indicate
that on edge 1 there is a resistor with resistance 1 unit and a voltage source with
voltage 10 units. When using loop analysis the user constructs loops and therefore
loop variables that describe current and voltage. The KVL model described below is
described by David Stewart in his book Dynamics and Inequalities [3].
Definition 1.15. Let us define v̂l to be the loop voltage in loop l. It is natural that
this be equal to the directed sum of voltage drops in that loop.
X
v̂l =
be,l ve
(1.4)
edges−e
where B is a edge-loop incidence matrix:
Be,l


1 if edge e in loop l goes in the positive direction
−1 if edge e in loop l goes in the negative direction
=

0 otherwise
Matrix B defines a direction of the “flow” of current through the edges of the
circuit. These directed loops allow us to describe the the current through any edge in
terms of loop current variables. Taking into account the voltage sources and Ohm’s
Law, 1.4 becomes:
v̂l =
X
edges−e
be,l (ve,0 + Re ie )
(1.5)
17
Where ve,0 represents a voltage source on edge e, and Re ie replaces the voltage across
any resistor on edge e. Note that the current through edge e is the net sum of loop
currents going through that edge and so:
X
ie =
be,k îk
(1.6)
loops−k
where îk represents the k-th loop current, and so equation 1.5 becomes:
v̂l =
X
be,l (ve,0 + Re
edges−e
X
be,k iˆk )
(1.7)
loops−k
Kirchoff’s Law gives us that V̂ = 0 and so equation 1.7 in matrix form becomes:
0 = B T V0 + B T RB Iˆ
(1.8)
where R is a diagonal matrix with vector r of resistances on the diagonal. Solving for
ˆ the current through our loops, gives:
I,
B T RB Iˆ = −B T V0
(1.9)
The linear system 1.9 can be solved through standard linear algebra techniques. Notice that the matrix B T RB is symmetric and positive definite because R is a diagonal
matrix with positive entries and B has full rank, which will be proved below.
Process used to find the edge-loop incidence matrix for a connected electrical network: In order to use KVL we must construct loops that go through every
edge in our network. Once we have loop currents we can reconstruct the current
through all edges by using equation 1.6. This tells us that the current through edge e
equal to the net sum of loop currents going through that edge. So how do we create
these loops?
18
Using our node-edge incidence matrix we can find a minimum spanning tree
of our network using Kruskal’s algorithm.
Algorithm 1.1 Kruskal(G(N,E))
1: A = ∅
2: for n ∈ N do
3:
MAKE-SET(n) {Make each node its own set}
4: end for
5: for e = (u, v) ∈ E do
6:
if FIND-SET(u) 6= FIND-SET(v) then
7:
A ← A ∪ {(u, v)} {Edges are odered by increasing weights}
8:
UNION(u,v)
9:
end if
10: end for
11: return A
A minimum spanning tree (MST), of a weighted graph G, is a subgraph that
spans all the nodes with no cycles with minimum total weight. A graph has a cycle if
you can find a node and a sequence of distinct edges that start and end at that node
(closed loop).
Note on MSTs: For loop analysis we only need a spanning tree. The notion of
“minimum” spanning tree has no meaning in electric circuits because our edges do
19
not have weights. We therefore only seek a spanning tree. Kruskal’s algorithm will
still work and we will not need to sort edges by increasing weight.
When implementing Kruskal’s algorithm we use a find-union data structure. This
type of data structure keeps track of elements that are partitioned in disjoint subsets.
In the initialization of Kruskal’s algorithm each node is its own set (and also a tree).
This data types has two useful operations, finding an element and joining to disjoint
subsets.
Figure 1.5: Network
20
Figure 1.6: Network MST
You see that if we add an edge back into the MST we will get a loop that uses
the edges in the MST and the added in edge. See the example below:
Figure 1.7: Tree to Loop
21
Using the node-edge incidence matrix of the red graph we can find a spanning
tree (the green graph above). As we add edges to the spanning tree we get the loops
needed for loop analysis. In the above example we get three loops, the red, green,
and blue loop. The edge-loop incidence matrix for these loops is given below.

1
1

1
B=
0

0
0
1
1
0
1
1
0

1
0

0

1

0
1
Algorithm Notes: For the following algorithm we will assume that we are working
with a graph with n nodes and e edges that represents an electrical network. We use
the following algorithm to find e − (n − 1) loops used for loop analysis.
22
Algorithm 1.2 KVL Circuit Loops
1: Set root node to be node 1: root ← n1
2: Find a spanning tree T using Kruskal’s Algorithm
3: for e ∈ E\T do
4:
[nstart , nend ] ← nodes(e)
5:
P ath1 ← PathToRoot(nstart , root) {Returns a path from node to root}
6:
P ath2 ← PathToRoot(nend , root)
7:
Loop ← LoopFromPath(P ath1, P ath2) {Combines paths and edge e to return
a loop for KVL}
8:
B(:, loop e) ← Loop
9: end for
Theorem 1.2. The edge-loop incidence matrix B obtained by creating loops using a
MST of the graph has full column rank.
Proof. Recall that the rank of a matrix is the number of linearly independent rows or
columns of the matrix. A matrix has full column rank if all columns of the matrix are
linearly independent. Suppose that the network has v vertices and e edges. The MST
of this network will have (v − 1) edges an so the remaining n = e − (v − 1) edges will
be used to create the loops. The edge-loop incidence matrix B will be of size e × n.
When using a MST to create loops we add add an edge back into the graph to create
a loop. This is done n times, creating our n loops. For each column(loop) of the
matrix there will be a indexed set of entries of length n that have n − 1 zero entries
23
and one entry of 1. This indexed set will be the edges not in the MST. There will be
zeros in n − 1 spots because there are n − 1 other edges not used to create the loop,
and there will be one edge to create the loop. We can therefore permute rows of the
matrix B so that the top n × n block will be the identity matrix. Tthereforeherefore
the column rank of the matrix will be n and so it will have full column rank.
Theorem 1.3. The matrix B T RB consisting of the edge-loop incidence matrix and
resistance matrix is symmetric and positive definite.
Proof. Recall that R is a diagonal matrix with positive entries on the diagonal and
so it’s symmetric. First we will show that the matrix is symmetric. We have
(B T RB)T = B T RT (B T )T = B T RB
therefore the matrix is symmetric. Next we will show that the matrix is positive
definite. Recall that a n × n matrix M is p.d. if xT M x > 0 for all suitable x 6= 0.
We have that
xT B T RBx = (Bx)T R(Bx)
Now since R is a symmetric matrix with positive entries we know that it is positive
definite and so (Bx)T R(Bx) > 0 provided Bx 6= 0. Since B has full rank we know
Bx 6= 0 provided x 6= 0, thus proving our claim.
If we look at the matrix B above we can permute rows of the matrix so that
the top 3 × 3 block is the identity matrix. If we make rows 3,5, and 6 be the top three
rows then the top 3 × 3 block will be the identity matrix.
24
1.3.2 Set up of equations for a circuit with resistors, voltage sources, and current
sources:
Introducing current sources into our circuit requires more analysis and a different way of setting up the equations to handle them. A current source that is contained
in two separate loops is traditionally treated as if it were not there, creating one big
loop, and then later relating the two loops with an equation with the big loop. For
this reason we will simply ensure that our current sources are only contained in a
single loop. For this process we will follow the steps below:
1. Remove current sources
2. Find a minimum spanning tree of the remaining graph
3. Find loops
4. Create a loop going through each current source using the MST
5. Modify system of equations to include current source loops
We can again define
Cne =


1 if edge e flows into node n
−1 if edge e flows out of node n

0 otherwise
to be our node-edge incidence matrix describing our circuit. For convenience we will
label edges with current sources last, in practice a few lines of code could take care
of this technicality. We will call the node-edge incidence matrix with current sources
removed C1 . This will allow us to find a MST where edges in the MST do not go
25
through edges with current sources (because those edges were removed). Next define

 1 if edge e in loop l goes in the positive direction
−1 if edge e in loop l goes in the negative direction
Be,l =

0 otherwise
to be our edge-loop incidence matrix. This matrix is found using the edges of the
original circuit not in the MST, edges that include current sources. For this reason
the matrix B will have the form
Bnorm Bcs
B=
0
I
where Bnorm is the edge-loop incidence matrix for the normal loops (loops without
current sources) and Bcs is the edge-loop incidence matrix for loops going through
the edges with current sources. The zero matrix and identity matrix in B come from
the fact the loops not going through edges with current sources, normal loops, will
have zeros in those spots which are located last in the vector. For the same reasoning
this fact accounts for the identity matrix. The resistance matrix R and voltage source
vector V0 will have a similar form. We have that R will have the form:
R1 0
R=
0 0
where R1 is a diagonal matrix containing the resistances of the resistors on each edge
on its diagonal. The voltage source vector V0 will have the form:
T
V0 = V0,norm 0cs
Now for each normal loop we can apply Kirchoff’s Voltage Law. For loops containing
current sources we cannot apply KVL because the voltage across the current source
26
is not known. Similar to equation (1.6) we get:
T
T
T
Bnorm
R1 Bnorm Iˆnorm + Bnorm
R1 Bcs Iˆcs = −Bnorm
V0,norm
(1.10)
Notice that the only unknown is Iˆnorm , and so this system of equations can be solved
using linear algebra techniques. Knowing Iˆnorm , the current in the normal loops, one
can reconstruct the current through each edge in the circuit using equation 1.6.
Important Note: When solving a static circuit with current sources and
voltage sources we assume that removing current source edges will not disconnect the
remaining network. We make this assumption because the process we take in finding
loops uses a tree that spans all the nodes. When handling a circuit with current
sources we construct our loops so that there is a distinct loop for each current source.
To do this we remove current source edges and then find a MST of the remaining
network. If removing current source edges disconnects the network then we are not
able to construct our loops. Later on when we simulate ideal diodes we will have
to worry about disconnecting the circuit when removing current sources and diodes
which is a more common problem. In a full wave bridge rectifier removing the diodes
from this type of circuit would disconnect the network. Earlier we mentioned an
example of the inputs needed to simulate a static circuit using MATLAB, see the
example below.
Example 1.4. Consider the labeled circuit below:
27
Figure 1.8: Static Circuit Setup Example
The inputs for the static circuit solver would be:
• The node-edge incidence matrix C:


1 −1 0
0 −1 0
0
0 −1 0
1 −1 

C=
0
1
1 −1 0
0 
−1 0
0
1
0
1
• The voltage source vector:
T
V0 = 10 0 0 0 0 0
• The current source vector:
T
I0 = 0 0 0 0 0 0
• The resistance vector:
T
r = 1 30 1 55 25 50
28
We would then call our function CircuitCurrent(C, I0 , V0 , r, Isources ) to solve the
static circuit and give the solution:
I = 0.2449 0.1114 0.0052 0.1166 0.1335 −0.1283
Earlier in the chapter we mentioned the importance of direction in our directed
graphs. When solving static circuits we not only want to know the current through
and voltage across every edge but also the direction of flow of the current. The
example about illustrates this need in the solution to the static circuit. In the last
edge we calculated a current of −.1283 amps. The sign tells us that the current
actually flows in the opposite direction in which we originally thought.
1.4
Overview
In Chapter 1 we introduced the basic circuit concepts and definitions needed
to understand static electric circuits. Static circuits are those that are made up of
power sources (voltage and/or current) and resistors. Describing an electric circuit
for computer input was a main consideration for simulation purposes of the model.
Taking a graph theory approach in describing the electrical network was key to finding fast and efficient algorithms for describing the circuit equations.
Keeping KVL, KCL, and Ohm’s law in mind we were able to strategically
construct loops needed for circuit loop analysis. Applying loop analysis in this way
resulted in a symmetric and positive definite matrix, B T RB, describing the linear
equations of the static circuit. This guarantees existence and uniqueness of solutions
29
to the static circuit and later on will be crucial to existence and uniqueness of dynamic circuits with ideal diodes. It is important to note that solving a static circuit
amounted to solving a linear system with a symmetric and positive definite matrix.
We are therefore able to use Cholesky decomposition that will speed up the computation time in solving the linear system. We must point out that loop analysis generally
does not result in linear systems that are symmetric and positive definite. In most
settings, our algorithms that provide symmetric and positive definite matrices are
better suited for loop analysis.
In the next chapter we will describe how we can modify our model to include inductors and capacitors. Differential equations model the current-voltage relationship
within these elements and so we have to deal with these more complicated equations
in our model. Throughout this thesis we keep efficiency in mind because modeling dynamic circuits over a meaningful timeframe requires a considerable amount of
computation and storage.
30
CHAPTER 2
RLC CIRCUITS
The applications of static circuits are quite limited in today’s electronics. In
this chapter we will introduce two electrical elements that have been hugely important
to the development of new electronics, the inductor and capacitor. Circuits with
current sources, voltage sources, resistors, inductors, and capacitors are known as
RLC circuits. The R stands for resistor, the L stands for the inductance in an
inductor, and the C stands for capacitor. The introduction of inductors and capacitors
allows us to analyze more practical circuits and systems. Last chapter we learned
that resistors have the ability to limit current flow or even step down voltage within
a circuit. They are able to do this by dissipating energy. Inductors and capacitors do
not dissipate energy but instead store energy, which can be retrieved at a later time.
In the next section we will describe some of the basic characteristics of inductors
and capacitors that will allow us to develop a model that can simulate dynamic RLC
circuits with high accuracy.
2.1
Characteristics of Inductors and Capacitors
A capacitor is a passive two-terminal element designed to store energy in an
electric field. Capacitors are used extensively in electronics, after the resistor the
capacitor is the most used circuit element. They are used in communication devices,
computers, and power systems. One important characteristic we will discuss below is
their ability to smooth out signals.
31
Definition 2.1. A capacitor consists of two conducting plates separated by a thin
insulator (dielectric).
Figure 2.1: Capacitor with applied voltage v
The conducting plates are usually made with foils while the dielectric is usually
air, mica, glass, or paper. When a voltage v is applied to a capacitor, as in the figure
above, the voltage source deposits a positive charge q on one plate and a negative
charge −q on the other plate. In this situation the capacitor is storing electric charge.
The amount of charge q that a capacitor is storing is directly proportional to the
applied voltage v:
q = Cv
(2.1)
where C, the constant of proportionality, is known as the capacitance of the capacitor.
Definition 2.2. Capacitance is the ratio of charge on one plate of a capacitor to
32
the voltage difference between the two plates, measured in Farads (F)
Note that from the equation q = Cv we have that 1 Farad = 1 coulomb/volt.
Another important characteristic to point out is that the capacitance C does not
depend on the charge q or voltage v. In general, the three factors that determine the
value of the capacitance C is the surface area of the plates, the spacing between the
plates, and the permittivity of the material. More information on the different types
of capacitors can be found in Fundamentals of Electric Circuits by Alexander and
Sadiku [1].
Recall that differentiating the charge q with respect to time gives us the flow
of current, that is
dq
= i. To obtain the current-voltage relationship of a capacitor
dt
we differentiate equation 2.1 to obtain:
i=C
dv
dt
(2.2)
Equation 2.2 is a differential equation in terms of the current through the capacitor
and the rate of change of voltage across the capacitor. It is important to note that applying loop analysis to an RLC circuit will result in loops that give linear equations
and loops that give differential equations. This type of system is known as a system of differential algebraic equations (DAEs). Another form of the current-voltage
relationship of a capacitor can be obtained by integrating equation 2.2. We get
Z
1
v(t) =
C
t
i(t)dt
−∞
or
1
v(t) =
C
Z
t
i(t)dt + v(t0 )
t0
(2.3)
33
where v(t0 ) = q(t0 )/C is the voltage across the capacitor at time t0 . Equation 2.3
shows that the voltage depends on the past history of the capacitor current. This
memory characteristic is often exploited in electronic design. The RLC model developed in the coming section will be flexible and allow for initial voltages on the
capacitor. Recall that power p is given by p = iv. Therefore therefore the power
delivered to a capacitor is
p = iv = Cv
dv
dt
The energy stored in the capacitor is therefore
Z
t
w=
Z
t
pdt = C
−∞
v
−∞
dv
1
dt = Cv 2
dt
2
(2.4)
since v(−∞) = 0. We therefore get the equation
1
w = Cv 2
2
(2.5)
or using the equation q = Cv we get
w=
q2
2C
(2.6)
Equations 2.5 and 2.6 represent the energy stored in the electric field between the
two plates of the capacitor.
There are a few important characteristics we should point out about capacitors:
• A capacitor is an open circuit to direct current: from equation 2.2 we
see that when the voltage across the capacitor is not changing then the current
is 0.
• The voltage across a capacitor cannot change abruptly.
34
• The ideal capacitor does not dissipate energy: It takes power from the
circuit when storing energy in its field and returns previously stored energy to
the circuit when delivering power to the circuit.
• A real nonideal capacitor has a parallel model leakage resistance: The
leakage resistance can be neglected for practical applications.
Now we will discuss some of the fundamental characteristics of the inductor.
An inductor is a passive element designed to store energy in its magnetic field. They
are used extensively in analog circuits, signal processing, power supplies, transformers,
sensors, and electric motors.
Definition 2.3. An inductor consists of a coil of conducting wire
Figure 2.2: Inductor Diagram
When current is able to flow through the inductor it follows that the voltage
35
across the inductor is directly proportional to the time rate of change of the current
through the inductor. Using passive sign convention we have
v=L
di
dt
(2.7)
where L is the constant of proportionality called the inductance of the inductor. The
unit of inductance is the henry (H), and from equation 2.7 we have that 1 henry
equals 1 volt-second per ampere. More precisely, Inductance is the property whereby
an inductor exhibits opposition to the change of current flowing through it, measured
in henrys (H). The inductance L depends on its physical dimension and construction.
For the inductor shown in the Figure above
N 2 µA
l
L=
where µ is the permeability of the core and the other variables are defined as in figure
2.2. Like capacitors, inductors come in many different sizes, types, and materials.
For more detailed information on inductors we refer the reader to [1].
For the rest of the thesis we will focus on linear inductors that have current-voltage
relationship described by equation 2.7. Integrating that equation gives
Z
1
i=
L
t
v(t)dt
(2.8)
v(t)dt + i(t0 )
(2.9)
−∞
or
1
i=
L
Z
t
t0
where i(t0 ) is the total current for −∞ < t < t0 and i(−∞) = 0.
Just like the capacitor, the inductor also depends on the history of current going the
36
inductor. The inductor is designed to store energy in its magnetic field and the energy
stored can be calculated as
p = vi = (L
di
)i
dt
(2.10)
The energy stored is
Z
t
w=
Z
t
pdt =
−∞
(L
−∞
di
)idt
dt
(2.11)
therefore
1
w = Li2
2
(2.12)
Like capacitors described above, we note important properties of inductors.
• An inductor acts like a short circuit to DC: from the differential equation
describing the current-voltage relationship in an inductor we know that the
voltage across an inductor is zero when the current is constant.
• The current through an inductor cannot change instantaneously: there
is an opposition to the change in current flowing through it.
• The ideal inductor does not dissipate energy: the energy is stored and
can be used at a later time.
Applications: Circuit elements like resistors and capacitors are commercially available in discrete form or in integrated circuits. Resistors and capacitors are used
extensively in small electronics. Inductors with appreciable inductance are difficult
to produce in small size so they are typically not used in integrated circuits. There are
several applications in which inductors have no substitute. They are routinely used
in relays, delays, sensing devices, radio and TV receivers, power supplies, and loud-
37
speakers. Together capacitors and inductors posses the following three characteristics
that make them very useful in electric circuits:
• The capacity to store energy makes them useful as temporary current or voltage
sources. In particular, they can be used for generating a large amount of current
or voltage in a short period of time.
• Capacitors oppose abrupt changes in voltage, while inductors oppose abrupt
changes in current. This property makes inductors useful for spark or arc suppression and for converting pulsating DC voltage into relatively smooth DC
voltage.
• Inductors and capacitors are frequency sensitive. This property makes them
useful for frequency discrimination.
Below we summarize the five major equations that describe the relationship
between voltage and current in an RLC circuit. These equations will allow us to
describe the current in our circuit as a system of DAEs.
1. Kirchoff’s Voltage Law: The net sum of voltage drops across a closed loop in
the circuit is zero.
X
ve = 0
(2.13)
e∈Loop
2. Kirchoff’s Current Law: The the net sum of current going into a node is zero.
X
ie = 0
(2.14)
e∈N ode
3. Ohm’s Law: The current through a conductor is directly proportional to the
38
potential difference across the two points. Ohm’s law states that current is
equal to voltage divided by resistance.
I=
V
R
(2.15)
4. Inductor Law relating current and voltage through an inductor:
v(t) = L
di(t)
dt
(2.16)
where L is inductance. Lastly we have,
5. Capacitor Law relating current and voltage through a capacitor:
i(t) = C
dv(t)
dt
(2.17)
where C is capacitance.
Dealing with a circuit with only resistors, current sources, and voltage sources has
been explored previously, the problem simplifies to solving a linear system of equations. The addition of inductors and capacitors requires dealing with the differential
equations that describe them. For this reason we explore Euler’s Method to numerically solve the ODE x0 (t) = f (t, x)
2.1.1 RLC Circuit Equation Framework
In chapter 1 the development of a mathematical model for static circuits simplified to applying loop analysis resulting in a system of linear equations. In particular, the matrix describing the linear system was symmetric and positive definite
thus giving existence and uniqueness of solutions. With the introduction of inductors
39
and capacitors we introduce differential equations into the system. Loop analysis of
a RLC circuit can result in a mixture of loops with and without inductors and or
capacitors. As we already know, loops without these elements give linear equations.
Figure 2.3: RC Circuit
In an RLC circuit we will get a combination of linear and differential equations. This
type of system is know as a system of differential algebraic equations (DAEs). Applying loop analysis to the above RC circuit will give a system of DAEs with one
differential equation and one linear equation.
DAE Framework: differential algebraic equations are a general form of differential
equations, for vector-valued functions x and independent variable t, DAEs take the
form
F (ẋ(t), x(t), t) = 0
(2.18)
40
where x : [a, b] → Rn is a vector of dependent variables x(t) = (x1 (t), ..., xn (t)) and
F = (F1 , ..., Fn ) : R2n+1 → R. The distinction between DAEs and ODEs is often
that the solution of a DAE system depends on the derivatives of the input signal and
not just on the signal itself as in ODEs. This issue is commonly found in systems
with hysteresis, the time based dependence of a systems output on present and past
inputs. A DAE system can often be written in semi-explicit form:
ẋ(t) = f (x(t), y(t), t),
(2.19)
0 = g(x(t), y(t), t)
where x(t) ∈ Rn , y(t) ∈ Rm , f : Rn+m+1 → Rn , and g : Rn+m+1 → Rm . In this form
it is clear that applying loop analysis to an RLC circuit will result in a system of
DAEs. Later on we will revisit this framework when we introduce ideal diodes into
the model.
2.2
Backward Euler’s Method
Consider the initial value problem (IVP)
x0 (t) = f (t, x),
(2.20)
x(t0 ) = x0
We would like to generate a sequence x0 , x1 , x2 , ... such that xn approximates x(t0 +nh)
where h is our time step size. The idea behind the backward Euler Method is to
integrate the the IVP from tn to tn+1 and approximate the integral on the right hand
side by the right rectangle rule with one rectangle. Doing so gives the result
x(tn+1 ) − x(tn ) ≈ hf (tn+1 , x(tn+1 ))
41
and written in sequence form gives
xn+1 = xn + hf (tn+1 , xn+1 )
Since we will be applying this method to the autonomous ODEs listed in equations
2.16 and 2.17 the sequence form of this method becomes:
xn+1 = xn + hf (xn+1 )
(2.21)
for n = 0, 1, 2, ..., N . Recall that a numerical method is said to be order p accurate if
the error e(h) satisfies:
e(h) = |x(tn ) − xn | = Chp
where C is the constant of proportionality and h is the time-step size.
Note: Backward Euler’s method is order p = 1 accurate.
2.2.1 Euler’s Method Applied to an Inductor
Now writing equation 2.16 in the standard x0 (t) = f (t, x) form we get:
i0 (t) =
v(t)
L
(2.22)
Now applying the Backward Euler Method to equation 2.22 gives the sequence:
in+1 = in +
h
vn+1
L
(2.23)
for n = 0, 1, 2, ..., N . Where in+1 is the approximation to the current going through
the inductor at time t0 + (n + 1)h, in is the approximation to the current going
through the inductor at time t0 + nh, and vn+1 is the approximation to the voltage
going through the inductor at time t0 + (n + 1)h. If we now solve for the voltage in
42
equation 2.23 we can see the equivalent companion model of the inductor. Solving
for the voltage gives:
vn+1 =
L
(in+1 − in )
h
(2.24)
At this point, equation 2.23 doesn’t seem to give us enough information to figure
the current through and voltage across the inductor at time tn+1 . What we actually
have is one equation with the two unknowns vn+1 and in+1 . One important piece
of information we must keep in mind is that our inductors will be embedded into
a network of electrical elements where Kirchoff’s current and voltage laws must be
satisfied. Consider a current source with current in in parallel with a resistor with
resistance L/h. Now if you define the current across the setup to be in+1 , then from
Kirchoff’s Current Law we know that equation 2.23 must be satisfied. That is, the
Backward Euler Method applied to an Inductor has an equivalent companion model
with a current source and resistor in parallel. To verify the companion model, we
Figure 2.4: Inductor Companion Model
43
do nodal analysis. From nodal analysis on the top node we know that the current
going into that node must be equal to the current going out of that node. That is,
the current in from the current source (known current through the inductor at time
tn ) plus the current from the resistor edge iR =
h
vn+1 must be equal to the current
L
through the setup which is defined to be in+1 . This tells us that applying Backward
Euler’s method to an inductor IVP embedded into a circuit will simplify to replacing
that inductor with a current source and resistor in parallel with appropriate values at
each time step. Our RL circuit then becomes a static circuit and solving that static
circuit is something we know how to do from the previous chapter. When solving that
equivalent static circuit we obtain the unknown information in+1 and vn+1 . We can
then reconstruct the current and voltage throughout the rest of the circuit. Simply
put, applying the backward Euler method to an RL circuit amounts to solving static
circuits at each time-step. Let’s now see what happens when we apply the same
method to the capacitor DE.
2.2.2 Euler’s Method Applied to a Capacitor
Now writing equation 2.2 in the standard x0 (t) = f (x, t) form we get:
v 0 (t) =
i(t)
C
(2.25)
and applying the Backward Euler Method to equation 2.25 gives the sequence:
vn+1 = vn +
h
in+1
C
(2.26)
for n = 0, 1, 2, ..., N . Where vn+1 is the approximation to the voltage going through
the capacitor at time t0 + (n + 1)h, vn is the approximation to the voltage going
44
through the capacitor at time t0 + nh, and in+1 is the approximation to the current
going through the capacitor at time t0 + (n + 1)h. If we now solve for the current in
equation 2.26 we can see the equivalent companion model of the capacitor. Solving
for the current gives:
in+1 =
C
(vn+1 − vn )
h
(2.27)
Now consider a voltage source with voltage vn in series with a resistor with resistance
h
.
C
Now if you define the current through and voltage across the setup to be
in+1 and vn+1 , then from Kirchoff’s Voltage Law we know that equation 2.26 must
be satisfied. That is, the Backward Euler Method applied to a Capacitor has an
equivalent companion model with a voltage source and resistor in series. Notice that
Figure 2.5: Capacitor Companion Model
both companion models only involve a current or voltage source with a resistor. You
can see that applying Euler’s Method to an RLC circuit simplifies to solving a static
45
circuit at each time step, which was previously explored in section 1. One might
now consider what other numerical methods can be applied to solving the differential
equations associated with an RLC circuit.
2.2.3 Forward Euler’s Method
Consider the initial value problem (IVP)
x0 (t) = f (t, x),
(2.28)
x(t0 ) = x0
We would like to generate a sequence x0 , x1 , x2 , ... such that xn approximates x(t0 +nh)
where h is our time step size. The idea behind the Forward Euler Method is to
integrate the the IVP from tn to tn+1 and approximate the integral on the right hand
side by the left rectangle rule with one rectangle. Doing so gives the result
x(tn+1 ) − x(tn ) ≈ hf (tn , x(tn ))
and written in sequence form gives
xn+1 = xn + hf (tn , xn )
Applying this method to the inductor differential equation
L
di(t)
= v(t)
dt
gives the sequence
in+1 = in +
h
vn
L
(2.29)
where in+1 represents the current through the inductor at time tn+1 , in represents
the current through the inductor at time tn , and vn represents the voltage across the
46
inductor at time tn . Recall that applying the backward Euler method to an inductor
resulted in a “companion model” of a current source and resistor in parallel. Is there
an equivalent companion model for Forward Euler’s method? The short answer is
No. Applying the Forward Euler to an RLC circuit will fail and and therefore will
not produce accurate solutions. The current and voltage within a inductor at a particular time depend on each other at that time. In other words, any approximation
to the current through an inductor at time tn+1 must depend on the voltage across
the inductor at time tn+1 . Therefore we cannot find an equivalent companion model
that satisfies equation 2.29 and Kirchoff’s laws. The same applies for Forward Euler’s
method applied to a capacitor.
We must point out that the Backward Euler method is only first order accurate. In effort to achieve a higher order of accuracy, we will look at implicit RK
methods. Later on we will need stiffly accurate methods when we model ideal diodes.
Higher order methods will allow us to take larger time-steps which is important when
modeling electric circuits due to the larger number of elements and the simulation
time. In the next section we will explore how Runge-Kutta (RK) methods can also
be applied to our RLC circuit.
2.3
Runge-Kutta Methods
Another important family of numerical methods are the Runge-Kutta methods. The techniques for this large class of methods was developed around 1900 by the
47
German Mathematicians C. Runge and M.W. Kutta. These iterative methods are so
popular because of their simplicity and high level of accuracy.
2.3.1 Basic framework for Runge-Kutta Methods
An s-stage Runge-Kutta method applied to the ODE x0 (t) = f (t, x) has the
form
zi = xn + h
s
X
ai,j f (tn + cj h, zi ),
i = 1, ..., s,
j=1
xn+1 = xn + h
s
X
(2.30)
bj f (tn + cj h, zi )
j=1
The coefficients ai,j , bj , and cj are known and are what determines the order of accuracy of the RK method. There are two types of RK methods that are distinguishable
from the coefficients ai,j . The method is explicit if ai,j = 0 for j ≥ i. Otherwise the
method is implicit because the s equations from 2.30 would be an implicit system of
equations. Implicit methods often have desirable numerical stability properties that
are important for many different differential equations, they are often applied to stiff
differential equations. The coefficients of an RK method are traditionally organized
in a Butcher Tableau. The coefficients ai,j are organized into an s × s matrix A, while
the coefficients bj , and cj are put into 1 × s and s × 1 vectors b and c.
c
A
b
48
2.4
Backward Euler’s: Runge-Kutta Method
The Backward Euler’s method studied in section 2.2 can actually be viewed
as an Implicit 1-stage RK method. The Butcher Tableau can be seen below:
1
1
1
Using the coefficients above with equations 2.30 one can see the Implicit Euler Method
is actually Backward Euler’s Method.
2.4.1 Diagonally Implicit Runge-Kutta Methods
One disadvantage to general Implicit RK methods is the need to solve a system
of equations at each iteration. Consider the ODE x0 (t) = f (x, t), if x is vector valued
with N variables, an Implicit RK method will need to solve a system of Ns equations
and Ns unknowns at every iteration. In a Diagonally Implicit Runge-Kutta Method,
or DIRK Method, the coefficients ai,j must satisfy that ai,j = 0 for i < j. The matrix
A in the Butcher Tableau will then be lower triangular and from the general form
of an s-stage RK method we will only have to solve s systems of N equations and
N unknowns. A DIRK method will still have the accuracy advantages as a general
Implicit Runge-Kutta Method while having significantly fewer computations.
Diagonally Implicit Runge-Kutta Methods Applied to an Inductor:
Consider the following equation modeling the current and voltage through an inductor
i0 (t) =
v(t)
. We will now apply a DIRK method to this equation to see how this
L
affects the overall circuit. We will use the method of Crouzeix and Raviart which is
49
a 3-stage DIRK method which has the following Butcher Tableau:
γ
1
2
1−γ
1
2
γ
−γ
2γ
δ
0
γ
1 − 4γ
1 − 2δ
0
0
γ
δ
1
1
1
π
where γ = √ cos( ) + and δ =
. Now writing the stages of the RK
18
2
6(2γ − 1)2
3
method when applied to x0 (t) = f (t, x) we get:
zn,1 = xn + ha1,1 f (tn + c1 h, zn,1 )
zn,2 = xn + ha2,1 f (tn + c1 h, zn,1 ) + ha2,2 f (tn + c2 h, zn,2 )
zn,3 = xn + ha3,1 f (tn + c1 h, zn,1 ) + ha3,2 f (tn + c2 h, zn,2 )
(2.31)
+ ha3,3 f (tn + c3 h, zn,3 )
xn+1 = xn + hb1 f (tn + c1 h, zn,1 ) + hb2 f (tn + c2 h, zn,2 )
+ hb3 f (tn + c3 h, zn,3 )
Let’s now see what this means for the inductor equation. We will define jk to be the kth intermediate step for the current i(t) and define wk to be the k-th intermediate step
for the voltage v(t). These variables will act as the z 0 s in the equations above. The
reason we need two types is because the function v(t) in i0 (t) =
v(t)
is not explicitly
L
known.
1
jn,1 = in + ha1,1 wn,1
L
1
1
jn,2 = in + ha2,1 wn,1 + ha2,2 wn,2
L
L
1
1
1
jn,3 = in + ha3,1 wn,1 + ha3,2 wn,2 + ha3,3 wn,3
L
L
L
1
1
1
in+1 = in + hb1 wn,1 + hb2 wn,2 + hb3 wn,3
L
L
L
(2.32)
At this point it is not clear that we can actually work with these equations because
50
the jk variables and wk variables are unknown. Let’s examine the first equation of
2.32 to see if we can come up with a companion model like we did while employing
Euler’s Method. Notice that the first equation looks similar to equation 2.23, Euler’s Method applied to an inductor. Like the companion model we observed from
applying Euler’s Method to an inductor, we can view the first Runge-Kutta stage as
a model representing a resistor and current source in parallel. Now if you define the
current across the setup to be jn,1 , then the voltage across the setup would naturally
be defined as wn,1 . Now letting the current source having current in and resistor
having resistance
L
, Kirchoff’s Laws tell us that the first equation 2.32 must be
ha1,1
satisfied. That is, the first equation can viewed as having the same companion model
as the one we had with backward Euler’s method. This means that we can solve for
jn,1 and wn,1 using our static solver.
A similar technique can be used to solve for the unknown variables jn,2 and
wn,2 in the second equation of 2.32, the only difference is the value of the resistor
and current source. The new value for the resistor will be
L
and the value of
ha2,2
1
the current source will be in + ha2,1 wn,1 . In a similar fashion the current source
L
for the third stage would be the first three terms on the right hand side of the third
equation of 2.32. After solving static circuits for each internal stage we can get the
variables jn,i and wn,i for i = 1, 2, 3 that are needed to compute the new current, in+1 ,
in equation 2.32. After computing in+1 , the current through the inductor at tn+1 , we
will treat the inductor edge as a current source with current in+1 in order to compute
51
the current through the rest of the circuit at time tn+1 .
Figure 2.6: DIRK Inductor Companion
Diagonally Implicit Runge-Kutta Methods Applied to a Capacitor:
Consider the following equation modeling the current and voltage through an capacitor v 0 (t) =
i(t)
. We will now apply a DIRK method to this equation to see how this
C
affects the overall circuit. We will use the method of Crouzeix and Raviart on the
capacitor. We will again define jk to be the k-th intermediate step for the current i(t)
and define wk to be the k-th intermediate step for the voltage v(t). We arrive at the
52
equations:
1
jn,1
C
1
1
= vn + ha2,1 jn,1 + ha2,2 jn,2
C
C
1
1
1
= vn + ha3,1 jn,1 + ha3,2 jn,2 + ha3,3 jn,3
C
C
C
1
1
1
= vn + hb1 jn,1 + hb2 jn,2 + hb3 jn,3
C
c
C
wn,1 = vn + ha1,1
wn,2
wn,3
vn+1
(2.33)
These equations are very similar to the inductor equations above and will in
fact be treated in a similar fashion. Recall the capacitor companion model for Euler’s
method was a voltage source and resistor in series. We can view the first RungeKutta stage as a model representing a resistor and voltage source in series. Now if
you define the voltage across the setup to be wn,1 , then the current through the setup
would naturally be defined as jn,1 . Now letting the voltage source have voltage vn
and resistor having resistance ha1,1
1
, Kirchoff’s Laws tell us that the first equation
C
of 2.33 must be satisfied. That is, the first equation can viewed as having the same
companion model as Euler’s for a capacitor. This means that we can solve for jn,1
and wn,1 using our static solver.
For the second stage the voltage source will be the first two terms on the
right hand side of the second equation of 2.33 and the resistor will have value ha2,2 C1 .
Lastly, for the third stage the voltage source will be the first three terms on the right
hand side of the third equation of 2.33 and the resistor will have value ha3,3 C1 . Now
53
all information needed to compute vn+1 from equation 2.33 is known. Now that the
voltage across the capacitor is known at time tn+1 we treat the capacitor edge as a
voltage source with value vn+1 to compute the current through the rest of the circuit
at time tn+1 .
Theorem 2.4.1. DIRK methods applied to an RLC circuit
Numerically solving an RLC circuit using a DIRK method simplifies to solving static
circuits (linear system of equations) at each internal stage of each time step.
The above analysis shows us that applying a DIRK method to an RLC circuit
amounts to solving static circuits. At each time step an inductor becomes a current
source and resistor in parallel and a capacitor becomes a voltage source and resistor
in series. The development of an efficient solver for static circuits in chapter 1 is
important now that the computations needed for RLC circuits is so high. Later
on we will discuss another type of DIRK method that will reduce the number of
computations needed but still have the desired stability and accuracy needed for
RLC circuits.
54
Figure 2.7: Capacitor Stages
Proposition 2.1. Applying an s-stage DIRK method to an RLC circuit requires the
solution of s + 1 static circuits at each time-step
Proof. An s-stage DIRK method is defined by s uncoupled equations and each stage
equation has an equivalent companion model. Solving the companion model for each
stage to get the internal stage information then requires us to solve s static circuits.
At the end of the time step we compute the new current through the inductors and
voltage across the capacitors and then to get the current and voltage throughout the
rest of the circuit requires us to treat the inductors and capacitors as sources and
solve another static circuit. Therefore we must solve s + 1 static circuits in total at
each time step.
55
2.4.2 Example: Numerically Solving a RLC Circuit
In this subsection we will test our methods on an RLC circuit in which the
actual solution can be found by solving the ODE that describes the system. Such
examples are hard to find because the DAEs describing even basic circuits can be
very difficult to solve.
Consider the RLC circuit below with one voltage source, resistor, inductor,
and capacitor.
Figure 2.8: RLC Circuit
Applying KVL to the circuit yields the equation:
10 = VC (t) + VL (t) + VR (t)
(2.34)
where VC , VL , and VR are the voltage drops across the capacitor, inductor, and resistor
56
respectively. From the inductor law and Ohm’s law this equation becomes:
10 = VC (t) + LI 0 (t) + RI(t)
(2.35)
where I(t) is the loop current. We still cannot solve this equation because there are
still two unknowns, the loop current and the voltage across the capacitor. Differentiating equation 2.35 gives:
0 = VC0 (t) + LI 00 (t) + RI 0 (t)
(2.36)
Now using the capacitor law and replacing L, R, and C with their respective values
gives the second-order ODE with constant coefficients:
I 00 (t) + I 0 (t) + I(t) = 0
(2.37)
with initial conditions I(0) = 0 and I 0 (0) = 10. The first initial condition comes from
assuming no initial flow of current. The second initial condition comes from equation
2.35 and assuming VC (0) = 0 (no charge in the capacitor). Using standard ODE
techniques we can solve this ODE to obtain the loop current I(t):
√
√
20 3 − 1 t
3
I(t) =
e 2 · sin(
t)
3
2
The equivalent static circuit model is given below:
(2.38)
57
Figure 2.9: RLC Companion Model
The error plots for Implicit Euler’s method and the 3-stage fourth order DIRK
method are given below for a step size of h = 10−3 .
Error in Euler’s Method
−3
4
x 10
Error in DIRK Method
−8
1.5
3
x 10
1
2
0.5
Amps
Amps
1
0
0
−0.5
−1
−1
−2
−1.5
−3
−4
0
2
4
6
8
Time
Figure 2.10: Euler’s Error
10
−2
0
2
4
6
Time
Figure 2.11: DIRK Error
8
10
58
Notice that the errors agree with the accuracy of the methods. For a step size
of 10−3 we have that the first order Euler’s method is on the same order and for the
fourth order DIRK method the error is four magnitudes smaller at 10−12 . We can see
the order of accuracy with a log-log plot
−1
10
log log : Euler’s Error
log log:DIRK
−7
10
−8
10
−2
−9
10
Max Error
Max Error
10
−3
10
−10
10
−11
10
−12
10
−4
10
−13
10
−14
−5
10 −5
10
−4
10
−3
Stepsize h
−2
10
10
Figure 2.12: Euler’s Max Error
10
−5
10
−4
10
−3
Stepsize h
10
−2
10
Figure 2.13: DIRK: Max Error
Now that we can simulate RLC circuits we would like to look into more complex
nonlinear electrical components.
2.5
Overview
In chapter 2 we focused on adding the dynamic circuit elements the inductor
and the capacitor to our circuit model. This type of circuit is known as an RLC
circuit. Within a static circuit we learned that resistors have the ability to step down
voltage as they dissipate energy. In an RLC circuit, capacitors and inductors are
59
able to store energy which can be retrieved at a later time. The current-voltage relationship within inductors and capacitors is modeled by the differential equations
di(t)
v(t)
dv(t)
i(t)
=
and
=
respectively.
dt
L
dt
C
We showed numerically solving an RLC circuit using a DIRK method resulted in replacing inductors and capacitors with respective static elements at each stage of each
time-step. The resulting circuit was therefore a static circuit at each stage which
could be solved fast and efficiently.
Existing models such as SPICE use Euler’s and Trapezoidal current source
models which are first and second order accurate. Higher order methods are desirable
due because larger time steps can be taken. When simulating an electric circuit over a
meaningful period of time, there are significant computations and information stored
at each time step. DIRK methods provided us with high order accuracy and the
ability to deal with the stiff problems we will see next in chapter 3 with ideal diodes.
60
CHAPTER 3
DIODES
Figure 3.1: Bridge Rectifier
So far we have been able to analyze RLC circuits by developing a strong
framework around solving static circuits. In our effort to build a solver to handle
more complex dynamic circuits we would like to be able to model circuits that have
ideal diodes in them. One important device in which diodes are used in is a bridge
rectifier, which can be used to convert alternating current to direct current. An ideal
diode is an electrical device that has the characteristic that it only allows current to
flow in one direction, known as the forward direction. In an ideal diode there is infinite
resistance in the backwards direction and zero resistance in the forward direction. In
actual practice, diodes have a current-voltage relationship that performs close to that
61
of an ideal diode.
Figure 3.2: Diode Current-Voltage Relationship
What this graph shows us is that when the diode has a forward (positive)
voltage that the current grows very rapidly. If there is a back (negative) voltage then
there is a small leakage current Is . Lastly, like all electrical components there is a
point at which the element loses the characteristics it was designed for. If there is a
strong enough back voltage then the diode breaks down and allows a lot of current to
flow in the opposite direction. We will discuss the two main models that can be used
to capture these traits.
3.1
Diode Models
In this section we look at two different diode models, our linear complementarity model and the Shockley model. The Shockley model has been the standard model
62
used in circuit simulation today. It is an exponential model that captures the rapid
growth of current when the diode is conducting in the forward direction. The LCP
model acts as a switch, an open circuit when there is aback voltage and a short circuit
when the diode is conducting in the forward direction. Both models have advantages
and disadvantages that will be discussed in the coming subsections.
3.1.1 The Shockley Model
Circuit analysis continues to be a difficult problem due to the difficult equations
that model electrical elements. In the previous chapter we had to deal with the
differential equations that modeled RLC circuits and now we must address diodes.
From figure 3.3 we see that the current-voltage relationship in diode appears to be
exponential when the diode is operating in the forward region. Named after one of
the inventors of the transistor, William Bradford Shockley, the Shockley diode model
is an exponential model that captures the diodes key characteristics.
The Shockley Model is given below:
Vd
I = Is (e nVT − 1),
where
• I is the diode current,
• Is is the reverse bias saturation current,
• Vd is the voltage across the diode,
• VT is the thermal voltage, and
• n is the ideality factor (varies between 1 and 2)
(3.1)
63
The thermal voltage VT is approximately 25.85mV at room temperature. We see that
as Vd starts to become negative that the current approaches -Is , the leakage current.
The Shockley model does a good job modeling diodes but has some drawbacks when
modeling large signals. Using an exponential model will require excessively small
time-steps to capture the rapid transition region as the diode begins conducting.
This becomes a problem when modeling dynamic circuits over significant time frame
due to the number of computations and storage. Next we present a linear model
that allows us to still capture the diode characteristics but doesn’t require small time
steps.
3.1.2 The LCP Model
We mentioned at the beginning of the chapter that an ideal diode has infinite resistance in the backward direction and zero resistance in the forward direction.
Therefore there is a complementarity relationship between the back voltage and forward current in an ideal diode. We have that if there is a back voltage (a voltage
trying to push electrons in the backwards direction), then it must follow that the
forward current must be zero (⇒ back current is zero). That is, we have the orthogonality relationship between the back voltage and forward current through the diode
0 ≤ vd ⊥ id ≥ 0. The orthogonality symbol means that the standard dot product of
the vectors vd and id is zero, vd ·id = 0. The graph below describes this current-voltage
relationship.
64
Figure 3.3: Diode Current-Voltage Relationship
What this complementarity relationship is actually describing is a one-way
electrical valve. In actual operation a diode mostly acts as one way valve but can
sometimes let a small amount of current through in the backwards direction if there
is a large enough back voltage. We neglect this leakage current and use the complementarity model. We will later show that these condition embedded into a static
circuit with ideal diodes will simplify to a Linear Complementarity Problem (LCP).
We will show that solving these problems compared to the nonlinear Shockley model
is much faster and more efficient.
Definition 3.1. The notation 0 ≤ vd ⊥ id ≥ 0 means that vd and id are positive
and orthogonal. If vd and id are n-dimensional vectors that represent all the diodes
in the circuit then it follows that 0 ≤ vd ⊥ id ≥ 0 implies that vd(j) · id(j) = 0 for
j = 1, 2, .., n.
65
Figure 3.4: Ideal Diode
3.2
Diodes in a Static Circuit without Current Sources
We will first examine how we can analyze a circuit with voltage sources, resistors, and diodes. The addition of current sources will be handled a different way
which we will tackle in a later section.
Assumption: We will assume for now that removing all diodes from the circuit will
not disconnect the circuit (graph). We make this assumption because we again want
to have at most one diode per loop. Also we assume that the circuit does not contain
current sources. The case with current sources will be treated separately just as in
section 1.
This assumption certainly doesn’t hold for certain circuits like the bridge rectifier pictured at the beginning of the section. The case where removing all diodes disconnects
the circuit can still be handled but requires special treatment.
Recall the static circuit equations from section 1, we have from equation 1.7
ˆ where V̂ and Iˆ are the loop voltage and
in matrix form that V̂ = B T V0 + B T RB I,
currents vectors, B is the edge-loop incidence matrix, R is the resistance matrix,
66
and V0 is the voltage source vector. Just as in section one where static circuits with
current and voltage sources were analyzed we will also have special structures for the
matrices and vectors defining our equations.
Definition 3.2. The unknown diode variables id and vd represent the forward current
through and back voltage across the diodes in the network.
Let’s assume that when we label our graph that we label edges with diodes
before we label any other edges. In practice this is not necessary because we can
always relabel edges and then switch back to the original labeling after computing
the solution. We will remove diodes from the circuit and then find a MST of the
remaining circuit. This will allow us construct loops in which only one loop will
go through each diode (Similar to the static circuit with current sources) The loop
voltage and current vectors will have the form:
T
V̂ = V̂d 0
(3.2)
T
Iˆ = Iˆd Iˆnorm
(3.3)
and
where Iˆd represents the loop currents through loops with diodes and Iˆnorm represents
the loop currents for the other loops. Before we set V̂ = 0 due to Kirchoff’s Voltage
Law but we do not set it to zero due to the diodes in the circuit. Though KVL must
still be satisfied with diodes in the loop we will instead use V̂d to represent the voltage
drop across the diode. From KVL we know that the sum of the voltage drops in a
67
diode loop with the diode removed must be equal to the negative of the forward diode
voltage (or back voltage). So V̂d will represent the back voltage of the diode in the
loop.
The edge-loop incidence matrix and resistance matrix will have the block form:
I
0
B=
Bd Bnorm
(3.4)
and
0 0
R=
0 R1
(3.5)
Since the diodes are labeled first the we will have the identity matrix block
in the matrix B. Recall that the columns of B represent the loops, and so the first
column will have a one in the first entry, the second will have a one in the second
entry, and so on. For the same reasoning, we have the zero block in the matrix B.
Now since R is a diagonal matrix with the edge resistances on the diagonal and there
are no resistors on diagonal edges the matrix R will have the form above.
Lastly, the vector containing the voltage sources will have the form:
T
V0 = 0 V0,norm
(3.6)
since there will be no voltage sources and diodes on the same edge. Now we can plug
our vectors and matrices into the equation
B T RB Iˆ = V̂ − B T V0
and we get the system:
(3.7)
68
BdT R1 Bnorm
BdT R1 Bd
T
T
R1 Bnorm
R1 Bd Bnorm
Bnorm
Iˆd
Iˆnorm
V̂ − B T V
= d T d 0,norm
−Bnorm V0,norm
(3.8)
This system has a special structure that can be solved in a few steps using Schur −
complements.
3.2.1 Schur-complements
The block linear system in equation 3.8 has a special structure that can be
solved using Schur-complements. Consider solving the block linear system:
Ax + By = a
(3.9)
Cx + Dy = b
where A, B, C, D are of dimension p × p, q × p, p × q, q × q. Multiplying the
bottom equation by BD−1 and subtracting it from the top equation gives:
(A − BD−1 C)x = a − BD−1 b
The matrix (A − BD−1 C) is known as the Schur-complement of D. If the overall system is symmetric then we have some special properties about the Schur-complement.
Properties of the Schur-Complement
Theorem 3.2.1. Let X be the symmetric block matrix:
A B
X=
BT C
where both A and C are square and symmetric. Let SC = A − BC −1 B T be the
Schur-complement of C in X.
69
• Then X is positive definite if and only if C and SC are positive definite.
• Then X is positive definite if and only if A and SA = C − B T A−1 B are positive
definite.
We can now apply these results to the system defining our circuit with voltage
sources, resistors, and ideal diodes.
3.2.2 Set up of the Linear Complementarity Problem
Let’s revisit equation 3.8, the linear system describing the loop current in our
static circuit with voltage sources, resistors, and ideal diodes. We have:
BdT R1 Bd
BdT R1 Bnorm
T
T
Bnorm
R1 Bd Bnorm
R1 Bnorm
Iˆd
Iˆnorm
V̂ − B T V
= d T d 0,norm
−Bnorm V0,norm
From the results on Schur-complements above we have that:
T
T
(BdT R1 Bd − BdT R1 Bnorm (Bnorm
R1 Bnorm )−1 Bnorm
R1 Bd )Iˆd =
(3.10)
V̂d −
BdT V0,norm
−
T
T
BdT R1 Bnorm (Bnorm
R1 Bnorm )−1 (−Bnorm
V0,norm ))
with the complementarity condition 0 ≤ V̂d ⊥ Iˆd ≥ 0. Equation 3.10 defines a linear
complementarity problem (LCP). We will revisit this problem after an introduction
to the Linear Complementarity problem. For this problem we would like to find Vd
and Id that satisfy the above linear relationship, are non-negative, and orthogonal.
3.3
The Linear Complementarity Problem
The linear complementarity problem (LCP) refers to a inequality linear system
with rich mathematical theory and a wide range of applications in applied science
70
and technology. A concentrated study of the LCP began in the 1960’s by Cottle and
Dantzig. The LCP is normally thought to belong in Mathematical Programming,
specifically identified with finite-dimensional optimization and physical or economic
equilibrium problems. A well known and important context in which the LCPs are
found is in the first-order optimality conditions of quadratic programming. A new tool
was brought to the LCP when Lemke and Howson published their renowned algorithm
for solving bi-matrix game problem. This eventually lead Lemke’s algorithm which
is still used today to solve LCPs. The ideas, definitions, and concepts on LCPs
presented in this chapter can be found in [4].
The linear complementarity problem consists of finding a vector in a finite-dimensional
vector space that satisfies a certain a certain linear system with inequalities.
Definition 3.3. Given a vector q ∈ Rn and a matrix M ∈ Rn×n , the LCP is to find
a vector z such that
z ≥0
(3.11)
q + M z ≥0
(3.12)
z T (q + M z) =0
(3.13)
or to show that no such vector z exists. The LCP above is often denoted by (q, M ).
Here we see that the problem LCP of order n has 2n variables and is defined
by the matrix M and column vector q. A vector z satisfying z ≥ 0 and M z + q ≥ 0 is
said to be feasible for (q, M ). The set of feasible vectors z is called the feasible region
71
and is denoted FEA(q, M ). Let
w = Mz + q
(3.14)
Then a feasible vector z of the LCP (q, M ) satisfies the complementarity condition
3.13
zi wi = 0 for all i = 1, ...., n
(3.15)
A vector z satisfying 3.15 is said to be complementary. The LCP is to therefore
find a feasible and complementary vector. The solution set of the LCP is denoted
SOL(q, M ). Notice that if the data q is positive then the LCP has the trivial solution
z = 0. With the above definitions for w and complementarity we give the more
common definition of the LCP.
Definition 3.4. Given a vector q ∈ Rn and a matrix M ∈ Rn×n , the LCP is to find
a vectors z and wsuch that
w ≥ 0, z ≥ 0
(3.16)
w = q + Mz
(3.17)
zT w = 0
(3.18)
or to show that no such vector z exists. The LCP above is often denoted by (q, M ).
3.3.1 LCP Applications
As mentioned before, the LCP has historically been a unifying formulation for
linear and quadratic programming. The applications to quadratic programming and
72
equilibrium problems has been important to development of new methods and algorithms for solving these problems. The following examples demonstrate the diversity
of the LCP and its importance. The following examples were first presented in [4]
and may be modified for this section.
Example 3.1. Quadratic Programming
Consider the quadratic program (QP)
1
minimize f (x) = cT x + xT Qx
2
(3.19)
subject to Ax ≥ b
x≥0
where Q ∈ Rn×n is symmetric, c ∈ Rn , A ∈ Rm×n and b ∈ Rm . Note that if Q = 0
then 3.19 gives rise to a linear program. From optimization theory we know that if x
is a locally optimal solution to 3.19 then there exists a vector y ∈ Rm such that the
pair (x, y) satisfies the Karush-Kuhn-Tucker (KKT) conditions
u = c + Qx − AT y ≥ 0, x ≥ 0, xT u = 0,
(3.20)
v = −b + Ax ≥ 0,
y ≥ 0, y T v = 0.
If Q is positive semi-definite, then the objective function is convex, and the conditions
3.20 are sufficient for the vector x to be a globally optimal solution of 3.19.
The conditions 3.20 define the LCP (q, M ) where
c
Q −AT
q=
and M =
A
0
−b
(3.21)
An important case of the QP is where the only constraints are the non-negativity
conditions on x. That is, if we remove the constraints Ax ≥ b and Q is positive
73
semi-definite then the QP is
1
minimize f (x) = cT x + xT Qx
2
(3.22)
subject to x ≥ 0
and is completely equivalent to the LCP (c, Q).
A large number of applications in engineering and the physical sciences lead to
the QP 3.22. These applications include the contact problem, the porous flow problem, and many other free boundary problems. Other areas in which LCPs arise are bimatrix games, market equilibrium, optimal invariant capital stock, optimal stopping,
convex hulls in the plane, nonlinear complementarity and variational inequalities, and
in our study of dynamic electric circuits with diodes.
Example 3.2. Consider the specific example with n = 2,
2 1
−5
M=
,q =
1 2
−6
Writing out the equations gives
w1 − 2z1 − z2 + 5 = 0,
w2 − z1 − 2z2 + 6 = 0,
w1 , w2 , z1 , z2 ≥ 0, and w1 z1 = w2 z2 = 0
Or written in vector notation we have:
0
−2
−1
−5
1
w1
+ w2
+ z1
+ z2
=
0
1
−1
−2
−6
(3.23)
Due to the complementarity conditions in each pair of variables (wi , zi ), one
approach to solve the problem is to fix one variable from each pair to be 0 and see
74
if the resulting problem has a non-negative solution. Geometrically this problem has
a solution provided the data from q is in one of the cones generated from the vectors (I·i , −M·i ). In this particular problem we have the solution (w1 , w2 ; z1 , z2 ) =
(0, 0; 34 , 73 ).
3.3.2 Complementary Cones
In the LCP problem the complementary cones are defined by the matrix M .
Let M be a matrix of order n. To define C(M ), the class of complementary cones
defined by M , we must look at the complementary vectors (I·i , −M·i ). Pick a vector
from each pair (I·i , −M·i ) and denote it by A·i . The cone Pos(A·1 , .., A·n ) = {y : y =
α1 A·1 + ... + αn A·n ; αi ≥ 0} is a complementary cone in the class C(M ). It’s easy to
see that 2n cones make up C(M ) since there are two choices for A·i for each i = 1, .., n.
See the example of complementary vectors below.
Example 3.3. A Geometric Interpretation:
2 1
Consider the LCP used previously with M =
The pairs of complementary vec1 2
tors are (I·i , −M·i ) = ([1, 0]T , [0, 1]T ), ([1, 0]T , [−1, −2]T ), ([0, 1]T , [−2, −1]T ),
([−2, −1]T , [−1, −2]T ). Positive linear combinations of these pairs make up the complementary cones.
75
Figure 3.5: Complementarity Cone
The complementarity cone in the above figure is the unbounded region defined
by positive linear combinations of the vectors ([0, 1]T , [−2, −1]T ). It is easy to see
that all complementarity cones for the matrix M will cover R2 and so the LCP would
indeed have a solution. In the next subsection we will give a condition on the matrix
M to ensure existence and uniqueness of a solution to the LCP (q, M ).
3.3.3 Existence and Uniqueness
In this section we will give some sufficient conditions for existence and uniqueness to the LCP. As it turns out, these conditions only depend on the matrix M of
(q, M ). Let us first recall some definitions for certain classes of matrices.
Definition 3.5. A matrix A ∈ Rn×n is said to be positive definite if
xT Ax > 0
for all n-dimensional vectors x 6= 0.
(3.24)
76
Theorem 3.3.1. Existence and Uniqueness to the LCP
Let M be a real n × n symmetric and positive definite matrix and q be real ndimensional column vector. Then the LCP (q,M) has a unique solution.
Proof. We refer the reader to [4] for the proof.
In general, positive definite matrices are hard to obtain in practice. We will
define weaker classes of matrices that still give desirable properties of the LCP.
Definition 3.6. A matrix M ∈ Rn×n is said to be
(a) copositive if xT M x ≥ 0 for all x ∈ Rn+
(b) strictly copositive if xT M x > 0 for all nonzero x ∈ Rn+
(c) copositive-plus if M is copositive and the following implication holds
[xT M x = 0, x ≥ 0]
=⇒
[(M + M T )x = 0]
(d) copositive-star if M is copositive and the following implication holds
[xT M x = 0, M x ≥ 0, x ≥ 0]
=⇒
[M T x ≤ 0]
It is easy to see that the class of copositive matrices contains copositive-star
matrices, which in turn contains copositive plus matrices, which in turn contains
strictly copositive matrices. We must note that the each above condition is a weaker
77
assumption than positive definite. For example, a non-negative matrix with positive
entries on the diagonal is strictly copositive but may not be positive definite.
Theorem 3.3.2. Existence of Solutions to the LCP
If M ∈ Rn×n is strictly copositive, then for each q ∈ Rn the LCP (q, M ) has a solution.
We refer the reader to [4] for the proof. The next result provides a sufficient
condition for (q, M ) to be solvable.
Theorem 3.3.3. Let M ∈ Rn×n be copositive and let q ∈ Rn be given. If the implication
[v ≥ 0, M v ≥ 0, v T M v = 0]
=⇒
[v T q ≥ 0]
is valid, then then (q,M) has a solution.
The above result 3.3.1 gives us existence and uniqueness to solutions of static
circuits with ideal diodes. Symmetric and positive definite is actually a very strong
property to obtain in practice. The development of a loop-resistance matrix that is
symmetric and positive definite is hugely important to the development of this model.
There has been extensive study to the LCP and algorithms to solve the problem. In particular, Lemke’s algorithm is a good tool in solving LCPs. We can now
solve static circuits with resistors, voltage sources, and ideal diodes simply by solving
a LCP for Iˆd and then using this to solve for Iˆn . We can now examine how this idea
is modified to include current sources as well.
78
3.3.4 Lemke’s Algorithm for Solving LCPs
In this section we explore some of the ideas developed for solving LCPs using
Lemke’s method. For an in depth analysis of pivoting methods we refer the reader
to [4].In [4] the authors spent considerable time addressing the question of under
what conditions the LCP (q, M ) is guaranteed to have a solution. During that time
the authors developed an augmented LCP (q̃, M̃ ) which is obtained from (q, M ) by
adding an extra variable and constraint.
The augmented LCP can be stated as follows. Given an LCP (q, M ), a scalar λ ≥ 0,
and a vector d > 0 the augmented LCP is (q̃, M̃ ) where
q
M d
q̃ =
,
λ
−dT 0
(3.25)
If the augmented LCP 3.25 has a solution then there exists a vector z and a scalar θ
which satisfy the system
w = q + M z + θd ≥ 0,
z ≥ 0, wT z = 0
(3.26)
σ = λ − dT z ≥ 0,
θ ≥ 0, σ · θ = 0
Note that if (z ∗ , θ∗ ) is a solution to (q̃, M̃ ) with θ∗ = 0, then z ∗ solves (q, M ). It
turns out that (q̃, M̃ ) always has a solution and this can be used to solve the original
LCP. Below we give the streamlined version of Lemke’s algorithm. For more detail
and explanation we refer the reader to [4].
79
Algorithm 3.1 Lemke
1: Initialization.
Input (q, d, M ).
If q ≥ 0, then stop: z = 0 solves (q, M ).
Otherwise, let z̄0 be the smallest value of the (artificial) variable z0 for which
w = q + dz0 ≥ 0. Let wr denote the (unique, by nondegeneracy assumption)
component of w that equals zero when z0 = z̄0 . Pivot hwr , z0 i. (After this pivot,
the complementary variable wr and zr are both nonbasic.) Choose the driving
variable to be the complement of wr , namely zr .
2: Determination of the blocking variable (if any). If the column of the driving vari-
able has at least one nonnegative entry, use the minimum ratio test to determine
the basic variable that blocks the increase of the driving variable. If the driving
variable is unblocked, then stop. (Interpret this outcome, if possible.)
3: Pivoting. The driving variable is blocked.
4: if If z0 blocks the driving variable, then pivot then
5:
hz0 , driving variablei
6: end if and stop. A solution to (q, M ) is at hand.
7: if If some other variable blocks the driving variable, then pivot then
8:
hblocking variable, driving variablei
9: end if Return to step 2 using the complement of the most recent blocking variable
as the new driving variable.
Note: The n-vector e whose components are all 1 is often used as the default
covering vector. To demonstrate Lemke’s algorithm we provide the example below
80
taken from [4].
Example 3.4. Consider solving the LCP (q, M ) with covering vector e = (1, 1, 1)
where


 
0 −1 2
−3



0 −2 , q = 6 
M= 2
−1 1
0
−1
The initial tableau is given as
Table 3.1: Initial Tableau
w1
w2
w3
1 z0
-3 1
6 1
-1 1
z1
0
2
-1
z2
-1
0
1
z3
2
-2
0
In this case, z̄0 = 3. At this time the blocking variable is w1 , and the pivot to
be performed is hw1 , z0 i. The resulting tableau is
Table 3.2: Pivot 1
z0
w2
w3
1 w1
3 1
9 1
2 1
z1
0
2
-1
z2
1
1
2
z3
-2
-4
-2
The driving variable is now z1 , the complement of the preceding blocking variable. There is only one candidate for a blocking variable, namely w3 . The pivot
81
operation, then is hw3 , z1 i.
Table 3.3: Pivot 2
z0
w2
z1
1 w1
3
1
13 3
2
1
w3
0
-2
-1
z2
1
5
2
z3
-2
-8
-2
The driving variable is now z3 . This time, the minimum ratio test is needed
to determine the blocking variable. We find that
3 13 2
2
min{ , , } =
2 8 2
2
hence the blocking variable is z1 . Performing the pivot operation hz1 , z3 i, we obtain
the tableau
Table 3.4: Pivot 3
z0
w2
z3
1 w1
1 0
5 -1
1 12
w3
1
2
− 12
z2
-1
-3
1
z1
1
4
− 12
The new driving variable is w1 is blocked by w2 , so the pivot operation is
hw2 , w1 i
82
Table 3.5: Pivot 4
z0
w1
z3
1
1
5
7
2
w2
0
-1
− 12
w3
1
2
1
2
z2
-1
-3
− 12
z1
1
4
3
2
The column of the driving variable z2 contains three negative entries. Performing the corresponding minimum ratio test, we find that the blocking variable is
z0 . This indicates that after performing the pivot step hz0 , z2 i, a solution will be
recovered from the resulting tableau which is
Table 3.6: Pivot 5
z2
w1
z3
1 w2
1 0
2 -1
3 − 12
w3
1
-1
0
z0
-1
3
1
2
z1
1
1
1
Thus, we have found the solution (z̄1 , z̄2 , z̄3 ) = (0, 1, 3)
3.4
Diodes in a Static Circuit with Current Sources
In this section we will describe how to set up and solve the LCP that describes
the current flow in a static circuit that includes resistors, voltage sources, current
sources, and ideal diodes. Let’s assume that we label the circuit so that diode edges
are labeled last and current sources edges directly before the diodes edges. Like
83
before, we will have special structures to the matrices defining our system.
ˆ 
In
ˆ

I = Iˆcs 
Iˆd
(3.27)
and
 
0
V̂ =  0 
V̂d
(3.28)
The subscripts n, cs, and d represent normal loops, current source loops, and diode
loops respectively. The resistance matrix will have the form


R1 0 0
R =  0 0 0
0 0 0
(3.29)
where R1 is a diagonal matrix with positive resistance on the diagonal. The other
diagonal entries of R are 0 because there are no resistors on current source edges or
diode edges. Lastly, the edge-loop incidence matrix will also have a block form.


Bn Bcs Bd
I
0
B= 0
(3.30)
0
0
I
ˆ
Now plugging the above matrix into the static circuit equation, V̂ = B T V0 + B T RB I,
and simplifying gives
   T
  T
 ˆ 
0
In
Bn V0,n
Bn R1 Bn BnT R1 Bcs BnT R1 Bd
T
T
T
T
 0  = Bcs
V0,n  + Bcs
R1 Bn Bcs
R1 Bcs Bcs
R1 Bd  Iˆcs 
BdT V0,n
BdT R1 Bn BdT R1 Bcs BdT R1 Bd
V̂d
Iˆd
(3.31)
with the complementarity condition on the diodes 0 ≤ V̂d ⊥ Iˆd ≥ 0. We can again
use Schur-complements to solve this type of system. Recall the block system
Ax + By = a
(3.32)
Cx + Dy = b
(3.33)
84
where A, B, C, D are of dimension p × p, q × p, p × q, q × q. Now defining
T
BnT R1 Bn BnT R1 Bcs
Bn R1 Bd
A=
,B =
T
T
T
Bcs
R1 Bn Bcs
R1 Bcs
Bcs
R1 Bd
(3.34)
C = BdT R1 Bn BdT R1 Bcs , D = BdT R1 Bd
we can again use Schur-complements to isolate Iˆd and set up a LCP. Once we solve
the LCP for Iˆd and V̂d we can then find Iˆn by back substitution.
Theorem 3.4.1. Existence and Uniqueness of Static Circuits with Ideal Diodes
using a Linear Complementarity Model.
Assume that the matrix M ∈ Rn×n , defining the linear system describing a static
circuit with ideal diodes, is symmetric and positive definite. Then the static circuit
has a unique solution.
Proof. Recall that a static circuit with ideal diodes is described by a linear system of
the form:
 ˆ 
  T
   T
In
0
Bn R1 Bn BnT R1 Bcs BnT R1 Bd
Bn V0,n
T
T
T
T




 0  = Bcs
V0,n + Bcs R1 Bn Bcs R1 Bcs Bcs R1 Bd
Iˆcs 
T
T
T
T
Bd R1 Bn Bd R1 Bcs Bd R1 Bd
Bd V0,n
V̂d
Iˆd
(3.35)
Using Schur-Complements we can uncouple the system into solving the an LCP and
then a linear system in that order. The LCP has the form:
V̂d =M Iˆd + q,
(3.36)
0 ≤ V̂d ⊥ Iˆd ≥ 0
where M ∈ Rn×n is a known symmetric positive definite matrix, V̂d , Iˆd ∈ Rn represent
the unknown back voltages and forward currents on the diodes, and q ∈ Rn is a known
data vector. Since M is symmetric and positive definite the LCP has a unique solution
85
(V̂d , Iˆd ) and so the remaining linear system containing the variables Iˆn and Iˆcs have
unique solutions as well. Therefore if M is symmetric and positive definite then a
static circuit with ideal diodes has a unique solution.
Note: Now that we can solve static circuits with ideal diodes we can then
solve RLC circuits with ideal diodes.
Corollary 3.4.1.1. Existence and Uniqueness of RLC Circuits with Ideal
Diodes using a Linear Complementarity Model.
Under the LCP framework developed in our model, we get existence and uniqueness
of numerical solutions applying a DIRK method to an RLC circuit with ideal diodes.
Proof. Recall that applying a DIRK method to an RLC circuit results in replacing
inductors and capacitors with their static element models. Therefore, at each stage
of a DIRK method, static circuits with ideal diodes with need to be solved. Under
our model the block linear system with complementarity constraints will simplify to
solving an LCP with a symmetric and positive definite matrix. We therefore get
unique solutions at each stage and therefore time step of the DIRK method.
Recall that solving an RLC circuit amounted to solving static circuits at each
time step. Including diodes into the model will require us to use the static solver
with ideal diodes which amounts to solving LCPs at each time step. Let’s look at an
example of simulating an RLC circuit with ideal diodes included.
86
3.4.1 Example: Rectifier Circuit
The circuit below is known as a rectifier circuit that converts alternating current to direct current. Two 120-volt 60-HZ alternating voltage sources in phase
together will provide wave pulses of current to the circuit. Diodes will only allow the
positive half cycles to flow to the rest of the circuit and a capacitor will smooth out
these pulses.
Figure 3.6: Rectifier
The values of the voltage sources will be V1 (t) = 120sin(120πt) and V2 (t) =
1
120sin(120π(t − 120
)). In this circuit the alternating voltage sources will be converted
to direct current through the middle resistor (load).
87
Rectifier with Capacitor Smoothing
45
40
35
Amps
30
25
20
15
10
5
0
0
1
2
3
4
5
Time
Figure 3.7: Rectifier with capacitor smoothing
We see that with capacitor smoothing that the charge on the capacitor quickly
builds up and there is a relatively constant current of 40 amperes after time t = 2
seconds going through the resistor (load). If we zoom in we still get to see the small
oscillations from the alternating sources.
88
Rectifier with Capacitor Smoothing
39.95
39.9
Amps
39.85
39.8
39.75
39.7
39.65
2.28
2.3
2.32
2.34
Time
2.36
2.38
Figure 3.8: Rectifier with capacitor smoothing
Now without the capacitor:
Rectifier w/o Capacitor Smoothing
60
50
Amps
40
30
20
10
0
0.02
0.04
Time
0.06
0.08
Figure 3.9: Rectifier without capacitor smoothing
Without the capacitor we simply get a combination of the positive half cycles
89
of the alternating waves. Though this is a direct current (not oscillating), it would
not be very useful as most things work with a smooth constant current.
3.4.2 Threshold Diode Voltage
In practice, semiconductor diodes begin conducting electricity when a certain
threshold voltage vth is present in the forward direction. This threshold voltage is
usually small, vth < 1 volt. The threshold voltage in figure 3.3 is at around .5 volts.
The complementarity model that we use does not account for this threshold voltage.
Recall the complementarity conditions we use for an ideal diode:
0 ≤ vd ⊥ id ≥ 0
The complementarity condition above only allows current to flow if the back voltage
is zero. Consider the “shifted” complementarity conditions:
0 ≤ (vd + vth ) ⊥ id ≥ 0
With this condition we see that if the back voltage vd = −vth then the quantity
vd + vth = 0 and the forward current id ≥ 0. Graphically we have:
90
Figure 3.10: Ideal Diode with threshold voltage
Incorporating this into our model does not change the model and solving the
LCPs are no harder. We can now model ideal diodes with threshold voltages
3.5
More DIRK Methods
Recall that when solving a static circuit with diodes we make the assumption
that removing current sources and diodes does not disconnect the network. The
process for constructing loops is to find a MST of the network and then add edges
back into the network to find loops. We would like one loop per current source or
diode and so we would like our MST to not include a current source or diode. So
we remove those edges and then find an MST. If the network is disconnected after
removing these edges then we can’t find a MST.
Recall that applying a DIRK method to an RLC circuit will replace the inductor
with a current source at the end of the time step so the current in the circuit can
91
be computed for that time step. Adding more current sources to the network is not
desirable because of the possibility of disconnecting the network when solving the
static circuit. Applying a certain type of DIRK method will solve this issue.
3.5.1 Stiffly Accurate DIRK Methods
Definition 3.7. When applying a numerical method to a problem that requires an
excessively small step size relative to the solution to get a smooth approximation then
we call this problem stiff [5].
Stiffly accurate DIRK methods for which asi = bi (i = 1, 2, ...s) are a special
subset of DIRK methods that are used on stiff problems. A stiffly accurate DIRK
method has a Butcher tableau of the form:
c1
c2
..
.
a11
a21
..
.
a22
cs−1
cs
as−1,1
b1
b1
..
...
...
.
...
...
as−1,s−1
bs−1
bs
...
...
...
bs
Stiff DIRK methods would address the problem of adding current source edges in
place of inductor edges at the end of the time stage. To see how this works we will
look at a specific example. The method of Alexander is a 3-stage third order Stiff
DIRK method with Butcher tableau given below.
α
τ2
1
α
τ2 − α
b1
b1
0
α
b2
b2
0
0
α
α
92
where α ≈ 0.42586652 is the root of x3 − 3x2 + 23 x −
τ2 =
1+α
,
2
b1 =
−(6α2 −16α+1)
,
4
and b2 =
1
6
= 0 in the interval ( 16 , 12 ),
(6α2 −20α+5)
.
4
Applying this method to the inductor differential equation gives the equations:
1
jn,1 = in + ha1,1 wn,1
L
1
1
jn,2 = in + ha2,1 wn,1 + ha2,2 wn,2
L
L
1
1
jn,3 = in + ha3,1 wn,1 + ha3,2 wn,2
L
L
(3.37)
1
+ ha3,3 wn,3
L
1
1
in+1 = in + hb1 wn,1 + hb2 wn,2
L
L
1
+ hb3 wn,3
L
where jk is the k-th intermediate step for the current i(t) and wk is the k-th intermediate step for the voltage v(t).
Since the method of Alexander is a stiffly accurate method we have that a3,1 =
b1 , a3,2 = b2 , and a3,3 = b3 . Recall that we solve a static circuit at each stage to obtain
the jk and wk variables. At the last stage of a stiffly accurate method we would obtain
jn,s and wn,s or in this specific case jn,3 and wn,3 by solving a static circuit. Since
asi = bi (i = 1, 2, ...s) the new current in+1 is already known at the last stage of the
of the time step. The last stage equation and the equation for in+1 are the same.
That is, jn,3 = in+1 and so we do not need to compute in+1 . The same property
holds for a stiff DIRK method applied to a capacitor model. We therefore know
the current throughout the circuit without treating the inductors and capacitors as
93
current sources and voltage sources respectively.
3.6
Overview
In chapter 3 we introduce diodes and the special characteristics that make
them useful in electrical circuits. Diodes have the ability to block current in one
direction and allow current to flow with very low resistance in the other direction.
These directions are known as the backwards and forwards directions respectively.
These one-way electrical valves are used to block current and can convert AC to DC.
Traditionally, the Shockley exponential model is used to model the current-voltage
relationship within a diode. This model captures the general characteristics of the
diode but requires small time-steps to capture the rapid growth of the current when
the diode is active.
We examine the LCP model for ideal diodes described by the complementarity conditions 0 ≤ vd ⊥ id ≥ 0. Where vd is the back voltage across the diode and id is
the forward current through the diode. Mathematically the LCP model tells us that
if there is a back voltage then there should be no current flow, and if there is not
a back voltage then we can have a forward current. Adding ideal diodes to a static
circuit required special loop analysis. The symmetric and PD matrix defining the
system allowed us to use Schur-complements to isolate the diode currents and back
voltages. This resulted in a LCP that could be solved using Lemke’s algorithm. After
solving for the diode currents and voltages we were able to reconstruct the current
through the rest of the static circuit. Adding diodes to a RLC circuit therefore sim-
94
plified to solving LCPs at each stage of each time-step of the DIRK method. The
addition of ideal diodes to our model allows us to model complex dynamic circuits
like the bridge-rectifier with relative simplicity. Other models would require solving
a systems of DAEs with complementarity conditions on the diodes. In chapter 4 we
will talk about the problem of disconnecting the network when doing loop analysis.
Recall that in order to have a symmetric PD system we have to construct loops in
strategic way. Current sources and diodes must have their own loops in order to get
a consistent system and uncoupled diode representation respectively. As we already
know, this cannot always be achieved and so we must spend significant time studying
how to deal with this more complicated problem. We must point out the significance
of symmetric systems in our analysis. They are crucial in obtaining existence and
uniqueness of solutions, we refer the reader to [6] and [7] for further explanation.
95
CHAPTER 4
DISCONNECTING THE NETWORK
In previous sections the problem of disconnecting the network when removing
current sources and diodes often came up and now we address this issue. Recall that
when we developed the equations that model a static circuit with diodes, that we constructed loops in a way so that there was only one loop going through each current
source and diode. We did this because if certain circuit components were in between
multiple loops then this would require further analysis to develop the equations that
model the current in the circuit. For example, we know that the loop current in a loop
with one current source will take on the value of the current source. Traditionally if
a current source is caught in between two loops then the circuit is treated as if the
current source is not there. This leads to one equation relating the two loop currents
and another equation relating the loop currents with the current source. When it
comes to diodes the complementarity conditions when two diodes are “coupled” between loops no longer simplifies to a standard complementarity condition.
In many situations this issue is not a problem because there are typically not
a lot of current sources or diodes in a circuit, or removing these components does
not disconnect the network. We still have to address this issue because this problem
does come up even in relatively simple circuits, like rectifier circuits where there are
typically a “bridge” of diodes.
96
4.1
Bridge Rectifier Example
To get some insight on how to address the problem of disconnecting the network we will look a specific example. Below is a full bridge rectifier that converts
alternating current from an alternating voltage source to direct current through the
resistor. The capacitor acts as a ”smoothing” device.
Figure 4.1: Bridge Rectifier
We see that if we remove diodes from the full bridge rectifier above that we will
disconnect the circuit into two connected components. In this example the algorithms
we have for finding loops will not be sufficient. In order to see how we can still
construct loops in simple algorithmic way we must define what a quotient graph is.
Definition 4.1. Let P = {V1 , V2 , ..., Vk } be a partition of the set of vertices V of a
graph G. We can define the quotient graph H that has set of vertices P such that
there exists an arc from Vi to Vj if i 6= j and there exists an arc in G from a vertex
in Vi to a vertex in Vj .
97
What this really means is that we collapse all the vertices in each Vi to a single
point. We will define our partition in a natural way, two vertices are related if they
are in the same connected component after removing some edges. Let’s see what
this looks like below. When we remove diode edges we get two distinct connected
components in blue and green.
Figure 4.2: Bridge Rectifier with Diodes Removed
This defines a partition P = {V1 , V2 } where V1 = {n1 , n4 } and V2 = {n2 , n3 , n5 , n6 }.
We therefore collapse the connected components into the single nodes V1 and V2 and
the edges of the quotient graph are the diode edges.
Now that we have the quotient graph we can find loops in this graph using
our regular algorithms. The loop matrix for the quotient graph is given below.


1 −1 1
1 0 0

LoopM atrix = 
0 1 0
0 0 1
The edges in each loop are listed below. Any edge with a negative sign means the
98
Figure 4.3: Quotient Graph
edge in the loop has a negative orientation.
• Loop 1: 1, 2 (corresponding to edges 2 and 3 in the original graph)
• Loop 2: -1, 3 (corresponding to edges 2 and 4 in the original graph)
• Loop 3: 1, 4 (corresponding to edges 2 and 5 in the original graph)
We then find an MST for each connected component and use that to create
”super loops” with the MSTs and loops from the quotient graph. The diode loops
from the quotient graphs will have some extra conditions due to the complementarity
conditions. We follow the process below for creating our loop matrix:
99
Algorithm 4.1 Super Loops
1. Remove current sources and diode edges and find the quotient graph of what
remains.
2. Use our regular algorithms to find a loop matrix for the quotient graph
3. Find MSTs of each connected component
4. Using the path to root algorithm find super loops using the MSTs and loops of
the quotient graph
5. Examine the super loops and create additional loops for any edges that are not
used and not already part of any connected component MST.
Following this process we get the following loop matrix:


0 1 −1 0
1 −1 1
0


1 0

0
0


0 1

0
0



1
0
SuperLoops = 0 0

1 0

1
0


1 0
1 −1


0 0
0
1
1 0
1
0
100
Figure 4.4: Loops 1 and 2
Figure 4.5: Loops 3 and 4
Notice that we have a total of four loops in our graph. The first three loops
were obtained from the loops of the quotient graph. These loops were obtained by
101
following steps 3 and 4 from above. After creating these loops we still have an edge
in the original graph that is not part of any loops(edge 8). We must therefore create
a loop going through that edge by simply using the MST from the connected component that the edge is located in (step 5).
Recall from previous sections we wanted each diode edge to be contained in
only one loop in order to create the LCP that satisfied our static circuit. In the
disconnected components case we do not have this nice property, but we do have the
information we need to set up and solve a generalized LCP. Let’s examine the loop
matrix for the quotient graph once again.

1 −1
1 0

0 1
0 0

1
0

0
1
The edges in the quotient graph correspond to the four diodes of the bridge rectifier(edges 2,3,4, and 5). Looking at the loop matrix we see that the first edge (edge
2 of the original graph) is actually in all three loops. This means that this diode is
contained in more than one loop. Since the other 3 diodes are only contained in one
loop each we know the current through each diode is equal to the loop current of the
loop going through that diode.
Let i2 , i3 , i4 , and i5 represent the diode currents in the four diodes of the
rectifier circuit. We automatically have the condition that each diode current must
be greater than or equal to zero. We also know from the loop matrix that i3 = Loop
102
1 Current, i4 = Loop 2 Current, i5 = Loop 3 Current, and since edge 2 is caught in
all loops we have i2 = Loop 1− Loop 2 + Loop 3 Current. We would therefore like
to find currents satisfying the circuit equations and the conditions:
i2 = i3 − i4 + i5 ≥ 0
i3 ≥ 0
(4.1)
i4 ≥ 0
i5 ≥ 0
4.1.1 Another Example with Four Connected Components
Consider the graph below representing a circuit with twenty nodes and thirty
edges. Edges in red will represent diode and current source edges.
Figure 4.6: Four CC Example
103
The quotient graph for this example is given below.
Figure 4.7: Four CC Example
The quotient graph has the loop matrix:


1 0 0 1 −1
1 0 0 0
0


0 1 0 1 −1


0 1 0 0
0


LoopM atrix = 

0
0
1
−1
1


0 0 1 0

0


0 0 0 1
0
0 0 0 0
1
For this example we get the following eleven loops. The edges in each loop
are listed below. Any edge with a negative sign means the edge in the loop has a
negative orientation.
• Loop 1: 1, 2, 3, 5, 6, 8, 9, -11,
• Loop 2: 10, 11, 12, 14, 15, 16
• Loop 3: -20, 23, 24, -25
104
• Loop 4: 1, 2, 5, 8, 10, 14, 16, -17, -23, 25, 27, 29
• Loop 5:-1, -2, -3, -5, -8, -10, -14, -16, 17, 23, 26, 30
• Loop 6: 1, 2, 3, 4
• Loop 7: -1, -2, -3, -5, -6, 7
• Loop 8: 10, 11, 12, 13
• Loop 9: 16, -17, -18, 19
• Loop 10: -16, 17, 18, 20, 21, 22
• Loop 11: 25, 26, 27, 28
Loops 1-5 are loops created from the quotient graph that act as Super Loops
and loops 6-11 were created to go through all unused edges. If we examine loops 1-5
we will see that each diode edge will no longer be in exactly one loop. For example,
diode edge number 14 is caught in loops 2,4, and 5.
4.2
The GLCP of the Disconnected Component Case of the RLC
Circuit with Ideal Diodes
In this section we will explore the details of numerically solving an RLC circuit
with ideal diodes where removing diodes disconnects the network. In the previous section we talked about how we can still set up loops that would still allow us to use KVL.
The main difference with the equations describing this type of situation compared to
the non-disconnected case is the extra conditions we get on the diodes. Before, we
simply had the complementarity condition between back voltage and forward current
for each diode. In the disconnected components case we had an additional constraint
105
that is a linear combination of the diode currents being greater than or equal to zero.
Recall that in the bridge rectifier example we had the conditions:
i2 = i3 − i4 + i5 ≥ 0
i3 ≥ 0
(4.2)
i4 ≥ 0
i5 ≥ 0
The only “new” constraint above is i2 = i3 − i4 + i5 ≥ 0, all others are assumed due to
diode complementarity. The above information is actually encoded in the edge-loop
matrix for the quotient graph.


1 −1 1
1 0 0 


0 1 0 
0 0 1
The rows of this matrix correspond to the diode edges (edges 2-5). If we look at the
edges that are part of the MST for the quotient graph, then the corresponding rows
of the edge-loop matrix will have more than one nonzero entry. This gives us the
extra “new” complementarity condition on the network.
4.2.1 The GLCP Formulation
The case described above can be formulated as a Generalized LCP. Given a
closed convex cone K, a matrix M and a vector q, find z such that
K 3 z ⊥ M z + q ∈ K∗
(4.3)
106
where K ∗ is the dual to the cone K. The cone K is defined by the extra conditions
on the diode loop currents defined above. In this situation we have to take
K = {z | z ≥ 0 , Ez ≥ 0}
(4.4)
where the matrix E has rows that are the rows of the edge-loop matrix of the quotient
graph corresponding to the MST edges of the quotient graph. That is, if M is the
edge-loop matrix of the quotient graph and B is the indexed set of MST edges for the
quotient graph, then E =M (B, :). Now using some basic calculations on dual cones
we have:
K ∗ = ({z | z ≥ 0} ∩ {z | Ez ≥ 0})∗
= ({z | z ≥ 0})∗ + ({z | Ez ≥ 0})∗
= Rn+ + E T Rn+
So we can write M z + q = w1 + E T w2 with w1 , w2 ≥ 0. So we the have:
0 = zT (M z + q)
= zT (w1 + E T w2 )
= zT w1 + zT E T w2
But z ≥ 0 and Ez ≥ 0, so zT w1 ≥ 0 and zT E T w2 ≥ 0. As the sum is zero implies
zT w1 = 0 and zT E T w2 = 0. Now putting z1 = z and z2 = Ez, we get
q = w1 − M z1 + E T w2
0 = z2 − Ez1
107
That is,
w1
M −E T
z1
q
=
+
z2
E
0
w2
0
with
w1
z
0≤
⊥ 1 ≥0
z2
w2
so that we are solving an LCP.
4.2.2 Setting up and solving an RLC Circuit with Diodes: No Current Sources
In this section we will set up the LCP that models a static circuit with voltage
sources, resistors, and diodes. In this particular case we will assume that removing
diodes will disconnect the network. The process of finding an edge-loop incidence
matrix was described earlier in the chapter. For simplicity, let us assume that we
label our edges so that diodes are labeled first. The edge-loop incidence matrix will
have the form
Bd 0
B=
Bm Bn
where Bd represents the part of the loops going through diode edges, Bm (mixed)
represents the part of diode loops going through non-diode edges, and Bn (normal)
represents the nonzero part of the non-diode loops going through non-diode edges.
Similarly we have special structures for the resistance matrix, loop current vector,
loop voltage vector, and voltage source vector:
0 0
Iˆd
0
V̂d
ˆ
R=
, I = ˆ , V̂ =
, V0 =
0 R1
V0,n
0
In
108
where all variables above are defined as they were in chapter 3. Now plugging these
in to the equation B T RB Iˆ = V̂ − B T V0 and rewriting gives the linear system:
T
T
Bm
R1 Bm Bm
R1 Bn
T
T
Bn R1 Bm Bn R1 Bn
T
Iˆd
V̂d − Bm
V0
=
−BnT V0
Iˆn
(4.5)
where the unknowns are Iˆd , Iˆn , and V̂d . Now using Schur-Complements we can solve
for Iˆd :
T
T
T
T
R1 Bn (BnT R1 Bn )−1 (BnT V0 )
V0 +Bm
R1 Bn (BnT R1 Bn )−1 BnT R1 Bm )Iˆd = V̂d −Bm
R1 Bm −Bm
(Bm
Now because the network becomes disconnected when removing diodes we don’t have
the standard complementarity conditions on Iˆd and V̂d . The problem formution above
is of the form: find Iˆd and V̂d such that
K 3 Iˆd ⊥ M Iˆd + q ∈ K ∗
where
K = {Iˆd | Iˆd ≥ 0 , E Iˆd ≥ 0}
and E has rows that are the rows of the edge-loop matrix of the quotient graph corresponding to the MST edges of the quotient graph. In the previous section we showed
how this problem can be formulated as an LCP. We can therefore solve the LCP for
Iˆd and then solve for Iˆn by using equation (4.1). We can now simulate RLC circuits
with ideal diodes even if removing diodes disconnects the network.
109
4.2.3 Example: Simulating the Bridge Rectifier
Consider the bridge rectifier circuit below.
1 Ohm
D1
e2
e1
D3
e4
e3
D2
VS
e5
D4
1 Ohm
e6
1F
C
e8
1 Ohm
e7
e9
Figure 4.8: Full Bridge Rectifier
This rectifier circuit will convert alternating current, in the form of an alternating voltage source, to direct current through the resistor on edge 7. The capacitor
in parallel with the resistor on edge 7 will smooth out the high oscillating current.
Though this circuit is somewhat easy to understand and small in size, the dynamics
are non-trivial. The equations modeling this circuit would be a system of differential
algebraic equations with inequality constraints.
Suppose that each resistor has value 1 ohm, the capacitor has value 1 farad, and the
voltage source is a 120 volt - 60 Hz source (Vs (t) = 120sin(120πt)).
110
AC Voltage Source: 60 hz
150
100
Voltage
50
0
−50
−100
−150
0
0.02
0.04
0.06
0.08
0.1
Time
Figure 4.9: Voltage Source
Now simulating the circuit with a 3-stage DIRK method we get the current
through the capacitor edge is:
Capacitor Edge
40
30
Amps
20
10
0
−10
−20
0
0.5
1
Time
1.5
2
Figure 4.10: Current through edge 8
111
and zoomed in:
Capacitor Edge
20
15
Amps
10
5
0
−5
−10
−15
0.85
0.9
0.95
1
Time
Figure 4.11: Current through edge 8: Zoom
The current through the resistor edge (edge 7) is graphed below:
112
DC resistor edge
18
16
14
Amps
12
10
8
6
4
2
0
0
0.5
1
Time
1.5
2
Figure 4.12: Current through edge 7
and zoomed in:
DC resistor edge
17.95
17.9
Amps
17.85
17.8
17.75
17.7
17.65
1.92
1.94
1.96
Time
1.98
2
Figure 4.13: Current through edge 7: Zoom
113
We see that as time starts, the alternating current on edge 1 is converted to
direct (positive) current through the resistor on edge 7. If we let time get large enough
we will see that the current through edge 7 is approaching 20 amps (120v/3ohms).
Shortly after two seconds we will have a steady flow of 20 amps through edge 7.
4.3
Overview
In chapter 4 we addressed the problem of disconnecting the electrical network when constructing loops for analysis. When constructing loops we must remove
current sources and diodes to ensure that they get their own loops. Should this disconnect the network we no longer have “nice” complementarity conditions on the
diodes because their loops are now coupled. The introduction of quotient graphs was
introduced to structurally see what happens to our network when it becomes disconnected.
The loop matrix of the quotient graph gave us the linear relationships between diodes
in a disconnected network. After analyzing this case we showed that the disconnected
components case simplified to solving a slightly modified LCP. With these new tools
we can analyze dynamic electric circuits with ideal diodes. Next we will examine
bipolar junction transistors (BJTs). These three-terminal circuit elements have characteristics similar to a diode but with a amplifying effect and thus can be modeling
using diodes and dependent current sources. The introduction of current sources that
depends on the current somewhere else in the network poses some problems with the
structure of the matrices defining the system.
114
CHAPTER 5
FUTURE WORK: TRANSISTORS
Figure 5.1: Transistor
In this chapter we introduce the transistor. The transistor is considered to be
one of the greatest inventions of the 20th century. Transistors were invented in Bell
Labs by John Bardeen, Walter Brattain, and William Shockley in 1947. A transistor
is a three-terminal electrical component that has two main characteristics, it can act
as a switch or an amplifier. These characteristics allow it to be used in a wide range
of electrical components like computers, amplifiers, radios and cell phones. Their
switching capabilities allow them to act as ”on/off” or ”1/0” and thus can used in
memory devices as well. We will look at two different models for the bipolar junction
transistor, we refer to the two as the “full” model and the “simplified” model. Both
of these models introduce issues of existence and uniqueness of solutions that have
yet to be solved. We examine some examples that shed some light on what it means
115
to have multiple solutions.
5.1
Bipolar Junction Transistors
Collector
I_C
Base
I_B
I_E
Emitter
Figure 5.2: NPN BJT Symbol
In this chapter we will focus on analyzing bipolar junction transistors or BJTs
for short. There are two main types of BJTs used called NPN and PNP. BJTs use
two junctions between two semiconductor types, p-type and n-type.
In an NPN BJT there are two N-doped semiconductor materials separated
by a thin P-doped semiconductor. Typically transistors are made with silicon that
are doped with impurities like arsenic, phosphorus, and antimony. These impurities
give the material extra free electrons (negative charge) and are thus called N-type
materials. Silicon doped with impurities like boron, gallium, and aluminum have
”holes” or fewer electrons and so electrons from nearby material flow to it. A material
that is doped in this way is called a P-type material. The NPN sandwich of these
116
materials make up a NPN transistor that has interesting properties.
5.1.1 How do Transistors Work?
N
P
Figure 5.3: NP Junction (Diode)
Above we mentioned the two doped semiconductor silicon materials of type
N and P. Recall that N-type have extra electrons and P-type have fewer electrons or
”holes”. Suppose that we connect an N-type and P-type layer together like the picture
above. If we now apply a voltage/current to this device we have that electrons will
flow from the N-type material to the P-type material. Since there is excess electrons
in the N-type there cannot be a current flow from P to N-type and the device above
is actually a diode. Specially doped types can emit light as current flows through
it creating a light emitting diode or LED for short. Next we will see that applying
another N-type layer will actually create an NPN transistor that will also have some
diode characteristics.
117
Emitter
Base
Collector
N
P
N
Figure 5.4: NPN Junction Transistor
Now we add another N-type layer to the device and we get an NPN transistor.
We must note that the emitter and collector N-types are doped different and are thus
not interchangeable.
Current Flow and Parameters: Due to the heavy doping in the emitter region
and light doping in the base region there there are many more electrons injected
from emitter to base. This gain of electrons, called common emitter current gain,
can be expressed with a constant β. The common base current gain is the gain of
current from emitter to collector, which we represent with the constant α. We have
the following equations describing this information.
IC
IB
IC
α=
IE
α
β
β=
⇐⇒ α =
1−α
β+1
β=
(5.1)
A transistor value of β ≈ 20 is typical for RF applications, and can be even
118
lower for other applications.
5.2
A Simplified BJT Model
Figure 5.5: BJT Model
If we refer to the equations from 5.1 and KCL we can conclude a few facts
about a typical BJT. From KCL we know that
IB + IC = IE
(5.2)
IC = βIB
(5.3)
We also know that
and so we can treat the collector as a current source with current βIB where IB is the
current going through the base. The NP junction can be thought of as a diode and
we therefore get the equivalent transistor model of a diode and current source above.
This BJT model seems to capture the main characteristic of an actual BJT. One
thing that we notice is that we have a current source that depends on the current
119
through the base edge. How will this affect the loop analysis that was worked out in
earlier chapters? In particular, will we still have symmetric positive definite matrices
defining our static circuits?
5.2.1 Loop Analysis
The main concern with the diode and current source model of our transistor
is the current source that depends on the current though the diode. We will have to
modify our current solvers and techniques to handle the dependent current sources
introduced by the transistor model. As in previous models we again have to make
some assumptions about our circuits.
Assumptions for the Transistor Model:
1. Only one loop goes through each current source.
Dependent Power Sources: In the context of electrical circuit simulation a dependent power source is a power source that depends on the current or voltage somewhere else in the circuit. These types of sources are often needed to describe certain
circuits that arise in a wide range situations. There are four basic types of dependent power sources. There are voltage-controlled voltage sources, voltage-controlled
current sources, current-controlled current sources, and current-controlled voltage
sources. With BJTs the type of dependent power source model we will use is a
current-controlled current source. The current through the collector terminal of the
transistor will be proportional to current through the base terminal. As seen above:
Ic = f (Ib ) = βIb
(5.4)
120
Now that we know what type of dependent source we have we can modify our system of
equations to handle this type of power source. Solving for loop currents in a transistor
model setting amounts to “eliminating” the dependent current source information.
Knowing the collector current amounts to knowing the base current, therefore we only
need the base current information along with the dependent current source factor β.
5.2.2 Matrix Equations
Recall the linear system from section 3.3 defining a static circuit with diodes:
B T RB Iˆ = V̂ − B T V0
where B is an edge-loop incidence matrix, R is a diagonal matrix with entries containing resistances, V0 is a column vector containing values of voltage sources, Iˆ is
the loop current variable, and V̂ is a column vector of back voltage variables.
If we assume that we order the edges as diodes first, current sources second, and others
third then we will have the follwoing structure to our edge-loop incidence matrix:
ˆ 


Id
I
0
0
ˆ
I
0  , I = Iˆcs 
B=0
Bd Bcs Bn
Iˆn
Suppose that for simplicity that there is only one transistor in the circuit and that
the diode and current source from the transistor model are labeled first in their categories. That is, the transistor diode is d1 (diode1) and the transistor dependent
current source is cs1 (current source 1). In order to “eliminate” the redundant information we define new matrices B 0 , B̃ T , and Iˆ0 as follows:
121

..
.


= B with Ics1 loop removed + β Ics1 -loop 0
..
.


..
.


= B T with Ics1 column removed
..
.


..
.


= Iˆ with Ics1 -variable removed
..
.

B0
B̃ T
Iˆ0
(5.5)
The new linear system of equations that now describes our static circuit becomes:
B̃ T RB 0 Iˆ0 = V̂ − B T V0
(5.6)
This new system, though similar to the original in derivation, has a completely different structure. The matrix describing our system, B̃ T RB 0 , is no longer symmetric
and positive definite. Equally important is whether or not the matrix is actually
invertible.
Is B̃ T RB 0 invertible?
Recall the above definitions for B̃ T , R, and B 0 . Now, for simplicity of analyzing the
matrix B̃ T RB 0 we let


B̄ = B with Ics1

..
.

loop removed
..
.
(5.7)
Then we have that
B 0 = B̄ + β Ics1 -loop 0
(5.8)
B̃ T = B̄.
(5.9)
and
122
With these definitions we have that
B̃ T RB 0 = B̄ T R(B̄ + β Ics1 -loop 0
(5.10)
T
T
= B̄ RB̄ + β B̄ R Ics1 -loop 0.
Can we say anything about the matrix B̃ T RB 0 in this form? Note that B̄ T RB̄ is
symmetric and positive definite because B has full rank and therefore B̄ has full
rank.
Note:
For sufficiently small β the matrix B̃ T RB 0 = B̄ T RB̄ + β B̄ T R Ics1 -loop 0. is a
perturbation of a symmetric and positive definite matrix and is therefore symmetric
and positive definite matrix. Therefore, for sufficiently small β the matrix B̃ T RB 0 is
invertible. For a circuit with more than one transistor the matrix equations have a
similar structure and that analysis is left out of this thesis.
5.2.3 Some Examples
Example 5.1. Amplifier Circuit
Consider the amplifier circuit below along with its transistor model equivalent.
Figure 5.6: Amplifier Circuit
123
We can then perform loop analysis with the loops below.
Figure 5.7: Amplifier Circuit Loops
Loop1:
10 = 1 · i1 + 1 · (i1 + i2 )
Loop 2:
i2 = β · i1
Now solving the system, we get
i1 =
10
2+β
10 · β
i2 =
.
2+β
(5.11)
We therefore know that this system has a unique solution for all β and therefore for
all β > 0. Let us now consider a slightly more complicated version of the above circuit.
124
Figure 5.8: Amplifier Circuit 2
Example 5.2. Amplifier Circuit with Feedback
Applying loop analysis leads to the following equations.
Loop1:
10 = 1(·i1 + i3 ) + 1 · (i1 + i2 )
Loop 2:
i2 = β · i1
Loop 3:
0 = 1 · (i1 + i3 ) + 1 · i3 + 1 · (i3 − i2 )
The matrix then defining the system for variables i1 and i3 is
2+β 1
A=
1−β 3
(5.12)
and notice that
det(A) = 3(2 + β) − (1 − β)
(5.13)
= 5 + 4β
so det(A) > 0 for all β > 0, and therefore the system has a unique solution. Let us
now see what happens to the solution for this circuit. Symbolically solving for i1 and
125
i3 gives
i1 =
30
4β + 5
10(β − 1)
i3 =
4β + 5
and therefore
i2 =
30β
4β + 5
Example 5.3. Amplifier Circuit with Feedback 2
Lastly, let’s consider another version of the amplifier circuit.
Figure 5.9: Amplifier Circuit 3
Applying loop analysis leads to the following equations.
Loop1:
10 = 1 · (i1 + i3 ) + 1 · (i1 + i2 + i3 )
Loop 2:
i2 = β · i1
Loop 3:
10 = 1 · (i1 + i3 ) + 1 · i3 + 1 · (i1 + i2 + i3 )
(5.14)
126
The matrix then defining the system for variables i1 and i3 is
2+β 2
A=
2+β 3
(5.15)
and notice that
det(A) = 3(2 + β) − 2(2 + β)
(5.16)
=2+β
so det(A) > 0 for all β > 0, and therefore the system has a unique solution. Let us
now see what happens to the solution for this circuit. Symbolically solving for i1 and
i3 gives
i1 =
10
β+2
i3 = 0
and therefore
i2 =
10β
β+2
Example 5.4. Bistable Flip Flop
Let us now consider the flip flop circuit below.
Figure 5.10: Flip-Flop Circuit Model
(5.17)
127
Applying loop analysis gives the following loops.
From loop analysis we get the following linear system.
Loop 1:
i1 = β1 i2
Loop 2:
10 = 1 · (−i1 + i2 + i4 ) + 10(−i1 + i2 ) − VD1
Loop 3:
10 = 1 · (i1 + i3 ) + 10 · i3 − VD2
Loop 4:
i4 = β2 i3
The LCP defining the system for variables i2 and i3 is
VD1
−11 ∗ β1 + 11 β2 i2
−10
=
+
VD2
β1
11 i3
−10
(5.18)
With the complementarity conditions 0 ≤ i2 ⊥ VD1 ≥ 0 and 0 ≤ i3 ⊥ VD2 ≥ 0.
From analyzing the system, it is clear that there two possible solutions for the LCP.
The first would be for i2 and i3 to be active while VD1 and VD2 are inactive. The
second would be for i3 and VD1 to be active while i2 and VD2 are inactive.
128
Proposition 5.5. For β1 , β2 ≥ 11 the LCP has exactly two solutions.
Example 5.6. Bistable Flip Flop
For β1 = β2 = 12 the LCP becomes
VD1
−121 12 i2
−10
=
+
VD2
12 11 i3
−10
(5.19)
Solving this LCP gives the two solutions (VD1 , VD2 , i2 , i3 ) = (0, 0, .0068, .9017) and
(VD1 , VD2 , i2 , i3 ) = (.9091, 0, 0, .9091)
Example 5.7. Bistable Flip Flop with both Switches On
Let us now consider the flip flop circuit with both switches on. We get the following
loops:
Figure 5.11: Flip-Flop Circuit: Both Switches On
Applying loop analysis gives the following loops. From loop analysis we get the
129
following linear system.
Loop 1:
10 = i1 − i2 + i4 + 10i1 − 10i2 − VD1
Loop 2:
i2 = β1 i1
Loop 3:
10 = i3 − i4 + i2 + 10i3 − 10i4 − VD2
Loop 4:
i4 = β2 i3
The LCP defining the system for variables i2 and i3 is
−10
VD1
i1
11 − 11β1
β2
+
=
−10
VD2
β1
11 − 11β2 i3
(5.20)
With the complementarity conditions 0 ≤ i1 ⊥ VD1 ≥ 0 and 0 ≤ i3 ⊥ VD2 ≥ 0.
Proposition 5.8. The LCP defined above has a unique solution for 0 ≤ β1 = β2 <
5.3
11
.
10
A Full BJT Model
Lastly, we present the full BJT model for transistors. This model has not
been fully analyzed and is left as future work. The matrix equations would have a
similar structure to those of the simplified model. In the previous section we explored
the simplified BJT model and some of the limitations especially with existence and
uniqueness of solutions. The full model is given below:
130
Figure 5.12: BJT Model
This full transistor model is a two dependent current source model. An important point about the full model is that the constants αF and αR are both less
than one. In this model the voltage across the current source between the collector
and bas with current αF iDE cannot go below the threshold voltage −vth , and the
voltage between the collector and emitter cannot go below zero. For more details on
the model we refer the reader to [3].
5.4
Conclusion
In chapter 5 we introduced a new circuit element called the bipolar junction
transistor (BJT). BJTs are three-terminal electrical components that are constructed
using a similar process as a diode and therefore have properties like a diode. Most
notably, BJTs have amplifying characteristics. The current through the collector terminal is a constant multiple of the current through the base terminal. With these key
131
characteristics, we can capture the basic function of a BJT using a diode and current
source model. The value of the current source on the collector edge is ic = βib .
This type of BJT model introduces a dependent current source into our circuit
model. Loop analysis shows that matrix defining the system is no longer symmetric
or positive definite. Looking at specific example shows that in general we do obtain
existence but not necessarily uniqueness of solutions. Under certain conditions on the
amplifying constant β we can show existence and uniqueness of solutions for specific
problems. A new BJT model must be explored to fully work out this problem.
In this work we have developed a efficient model for dynamic electric circuits with
ideal diodes. This model works well due to the development of a system defined by
symmetric and PD matrices. Our solver has been refined to take in the minimum
data required to define the structure of a dynamic circuit and output the current
through and voltage across every element in the network. Simulating dynamic circuits over meaningful time-frames is an ongoing problem due to the difficult equations
that model these circuits. We have addressed the issue of fast and efficient solutions
by simplifying the problem to solving linear systems (or LCPs).
We must point out that this model can be applied to circuits with nonlinear
circuit elements. The linearization and then simulation of such circuits can be solved
with our model.
132
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