Download unit-2: field effect transistors

UNIT-2: FIELD EFFECT TRANSISTORS
1. Explain the working of a N-channel E-MOSFET with neat diagram. Explain with a Diagram
output characteristics of the same.
(10 Marks)(June 2013)
The graphic symbols for the n-channel and p-channel JFETs are provided in Fig. Note that the
arrow is pointing in for the n-channel device of Fig to represent the direction in which IG would
flow if the p-n junction were forward-biased. The level of VGS that results in ID _ 0 mA is
defined by VGS _ VP, with VP being a negative voltage for n-channel devices and a positive
voltage forp-channel JFETs.On most specification sheets the pinch-off voltage is specified as
VGS(off) rather than VP. A specification sheet will be reviewed later in the chapter when the
primary elements of concern have been introduced.
The region to the right of the pinch-off locus of Fig. 5.10 is the region typically employed in
linear amplifiers (amplifiers with minimum distortion of the applied signal) and is commonly
referred to as the constant-current, saturation, or linear amplification region.
2. Find the values of voltages VD and VC for the circuit shown, Fig.Q2(b). Assume b = 100,
VBE = 0.7 V, saturation drain current of JFET is –10 mA and pinch off
voltage
is- 5V.
(4 Marks)(June 2013)
3) With circuit diagram, explain base bias amplifier and give the importance of capacitor.
(6 Marks)(June 2013)
To appreciate the importance of the dc bias on the operation of the power amplifier, consider the
collector characteristic. An ac load line is drawn using the values of VCC and RC. The intersection of
the dc bias value of IB with the dc load line then determines the operating point (Q-point) for the circuit.
The quiescent point values are those calculated using Eqs. (16.1)
Through (16.3). If the dc bias collector current is set at one-half the possible signal swing (between 0 and
VCC/RC), the largest collector current swing will be possible.
Additionally, if the quiescent collector–emitter voltage is set at one-half the supply voltage, the largest
voltage swing will be possible. With the Q-point set at this optimum bias point, the power considerations
for the circuit. The simplest transistor biasing circuit is referred to as base bias (or fixed bias). The name
stems from the fact that the current through the base circuit (IB) remains relatively fixed from one
transistor to another. A base bias circuit is shown (along with its primary mathematical relationships) in
figure below Note that the load line equations are used to plot the dc load line.
4. What are the difference between BJTs and FETs?
(10 Marks)(Dec 2013)
1. The BJT is a current-controlled device since its output is determined on the input current, while FET is
considered as a voltage-controlled device, because it depends on the field effect of the applied voltage.
2. The BJT (Bipolar Junction Transistor) uses both the minority and majority carriers (holes and electrons),
while FETs, which are sometimes called unipolar transistors, uses either holes or electrons for
conduction.
3. BJT’s three terminals are named the base, emitter, and collector, while FET’s are named the source,
drain, and gate.
4. BJTs are the first type to be commercially massed produced.
•
The Bipolar Junction Transistor (BJT) is a three layer device constructed form two
semiconductor diode junctions joined together, one forward biased and one reverse biased.
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There are two main types of bipolar junction transistors, the NPN and the PNP transistor.
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Transistors are “Current Operated Devices” where a much smaller Base current causes a larger
Emitter to Collector current, which themselves are nearly equal, to flow.
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The arrow in a transistor symbol represents conventional current flow.
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The most common transistor connection is the Common-emitter configuration.
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Requires a Biasing voltage for AC amplifier operation.
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The Base-Emitter junction is always forward biased whereas the Collector-Base junction is always
reverse biased.
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The standard equation for currents flowing in a transistor is given as: IE = IB + IC
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The Collector or output characteristics curves can be used to find either Ib, Ic or β to which a load
line can be constructed to determine a suitable operating point, Q with variations in base current
determining the operating range.
•
A transistor can also be used as an electronic switch to control devices such as lamps, motors and
solenoids etc.
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Inductive loads such as DC motors, relays and solenoids require a reverse biased “Flywheel” diode
placed across the load. This helps prevent any induced back emf’s generated when the load is
switched “OFF” from damaging the transistor.
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The NPN transistor requires the Base to be more positive than the Emitter while the PNP type
requires that the Emitter is more positive than the Base. Field Effect Transistor
•
Field Effect Transistors, or FET’s are “Voltage Operated Devices” and can be divided into two
main types: Junction-gate devices called JFET’s and Insulated-gate devices called IGFET´s or
more commonly known as MOSFETs.
•
Insulated-gate devices can also be sub-divided into Enhancement types and Depletion types. All
forms are available in both N-channel and P-channel versions.
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FET’s have very high input resistances so very little or no current (MOSFET types) flows into the
input terminal making them ideal for use as electronic switches.
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The input impedance of the MOSFET is even higher than that of the JFET due to the insulating
oxide layer and therefore static electricity can easily damage MOSFET devices so care needs to be
taken when handling them.
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When no voltage is applied to the gate of an enhancement FET the transistor is in the “OFF” state
similar to an “open switch”.
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The depletion FET is inherently conductive and in the “ON” state when no voltage is applied to
the gate similar to a “closed switch”.
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FET’s have very large current gain compared to junction transistors.
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They can be used as ideal switches due to their very high channel “OFF” resistance, low “ON”
resistance.
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To turn the N-channel JFET transistor “OFF”, a negative voltage must be applied to the gate.
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To turn the P-channel JFET transistor “OFF”, a positive voltage must be applied to the gate.
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N-channel depletion MOSFETs are in the “OFF” state when a negative voltage is applied to the
gate to create the depletion region.
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P-channel depletion MOSFETs, are in the “OFF” state when a positive voltage is applied to the
gate to create the depletion region.
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N-channel enhancement MOSFETs are in the “ON” state when a “+ve” (positive) voltage is
applied to the gate.
P-channel enhancement MOSFETs are in the “ON” state when “-ve” (negative) voltage is applied to the
gate.
5. Explain the working of a CMOS inverter.
(10 Marks)(Dec 2013) (June 2015)
Complementary MOSFET (CMOS) technology is widely used today to form circuits in numerous and
varied applications. Today’s computers CPUs and cell phones make use of CMOS due to several key
advantages. CMOS offers low power dissipation, relatively high speed, high noCSE margins in both
states, and will operate over a wide range of source and input voltages (provided the source voltage is
fixed). Next I will attempt to explain just how this logic gate works now that you have some idea of
how important CMOS is in your day-to-day life.
A CMOS circuit is composed of two MOSFETs. The top FET (MP) is a PMOS type device while the
bottom FET (MN) is an NMOS type. The body effect is not present in either device since the body of
each device is directly connected to the device’s source. Both gates are connected to the input line.
The output line connects to the drains of both FETs.
6. Explain the construction & working and principle of operation of an n-channel JFET.
(10 Marks)(Dec 2013)
JFET’s are of two types, namely N-channel JFETs and P-channel JFETs. Generally N-channel JFETs are
more preferred than P-channel. N-channel and P-channel JFETs are shown in the figures below. The
structure is quite simple. In an N-channel JFET an N-type silicon bar, referred to as the channel, has
two smaller pieces of P-type silicon material diffused on the opposite sides of its middle part, forming
P-N junctions, as illustrated in figure. The two P-N junctions forming
diodes or gates are connected internally and a common terminal, called the gate terminal, is brought
out. Ohmic contacts (direct electrical connections) are made at the two ends of the channel—one lead
is called the Source terminal S and the other Drain terminal D.
The silicon bar behaves like a resistor between its two terminals D and S. The gate terminal is
analogous to the base of an ordinary transistor (BJT). It is used to control the flow of current from
source to drain. Thus, source and drain terminals are analogous to emitter and collector terminals
respectively of a BJT. In the figure below, the gate is P-region, while the source and the drain are Nregions. Because of this, a JFET is similar to two diodes. The gate and the source form one of the
diodes, and the drain form the other diode. These two diodes are usually referred as the gate-source
diode and the gate-drain diode. Since JFET is a silicon device, it takes only 0.7 volts for forward bias
to get significant current in either diode.
Figure: JFET construction
8) What are the differences between JFET & MOSFET. (10 Marks)(June 2013)
MOSFET: It can be operated in both depletion & enhancement mode. E MOSFET are operated only
in enhancement mode. Input resistance is high of order tera ohms, It has low drain resistance, leakage
current is small of nano amperes and easier to construct, whereas for an JFET: It operates in depletion
mode only, Input resistance is low of giga ohms, has high drain resistance of 100Kohms, leakage
current is high of micro amperes and difficult in construction.
10. With the help of neat figures, explain the construction and characteristics of N-channel
depletion MOSFET.
(10 Marks)(June 2013)
11. How Biasing configuration using De-MOSFET work. Justify. Given that saturation drain
current is 8mA, and the pinch off voltage is -2V. Determine the value of gate source voltage,
drain current and the drain source voltage. (10 Marks)(June 2013)
Ans.
12. Explain with neat sketches the operation and characteristics of N-channel DE- MOSFET
(8 Marks) (June 2015) (Dec 2014/ 2015)
Figure shows the construction of N-channel depletion MOSFET. It consists of a highly doped P- type
substrate into which two blocks of heavily doped N-type material are diffused forming the source and
drain. An N-channel is formed by diffusion between the source and drain. The type of impurity for the
channel is the same as for the source and drain. Now a thin layer of SiO2 dielectric is grown over the
entire surface and holes are cut through the SiO2 (silicon-dioxide) layer to make contact with the Ntype blocks (Source and Drain). Metal is deposited through the holes to provide drain and source
terminals, and on the surface area between drain and source, a metal plate is deposited. This layer
constitutes the gate. Si02 layer results in an extremely high input impedance of the order of 1010 to
1015 Q for this area. The chip area of a MOSFET is typically 0.003 um2 or less which is about only
5% of the area required by a BJT. A P-channel DE-MOSFET is constructed like an N-channel DEMOSFET, starting with an N-type substrate and diffusing P-type drain and source blocks and
connecting them internally by a P-doped channel region. The working principle of MOSFET depends
up on the MOS capacitor. The MOS capacitor is the main part. The semiconductor surface at below
the oxide layer and between the drain and source terminal can be inverted from p-type to n-type by
applying a positive or negative gate voltages respectively.
Figure: Operation of D-MOSFET
Figure: Construction of D-MOSFET
When we apply positive gate voltage the holes present beneath the oxide layer experience repulsive
force and the holes are pushed downward with the substrate. The depletion region is populated by the
bound negative charges, which are associated with the acceptor atoms. The positive voltage also
attracts electrons from the n+ source and drain regions in to the channel. The electron reach channel
is formed. Now, if a voltage is applied between the source and the drain, current flows freely between
the source and drain gate voltage controls the electrons concentration the channel. Instead of positive
if apply negative voltage a whole channel will be formed beneath the oxide layer. Now, the controlling
of source to gate voltage is responsible for the conduction of current between source and the drain. If
the gate voltage exceeds a given value, called the three voltages only then the conduction begins.
13. Calculate the value of operating point for the circuit shown in fig given that threshold voltage
for the MOSFET is 2v and Id(on)=6ma for Vgs(on)=5V.
(7 Marks) (Jan 2015)
VGS = VDS
Solve for VDS = 5.18 volts
Analytically
ID = (VDD - VDS)/RD
PSpice gives VDS = 2VGS = 7.97
volts ID = 0.993 ma
Analytically
ID = (VDD - VDS)/RD
ID = K(VGS-VT)(VGs-VT) 2VGS = VDS
ID = K(VGS-VT)(VGS-VT)
14. Write the advantages of MOSFET over JFET (5 Marks)(Dec 2014 2015) • MOSFETS
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Much more finicky difficult process (to make) than JFET’s.
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Good news: Extremely high input impedance. Zero input current.
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Bad news: Easily blown up by ESD on the gate. Add protection circuit and input bias current
becomes at best comparable to JFET’s.
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Good news: Essentially infinitely fast. If you change the gate voltage, the device will respond
instantaneously! Essentially always in static equilibrium.
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Bad news: It can be really hard to change the gate voltage quickly! (especially power devices)
• Much better power devices than JFET’s. (There were briefly power JFET’s as output devices in
audio amps. Too many blew up.)
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And you can’t make digital VLSI out of JFET’s.
JFET’s
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Very simple manufacturing process like BJT’s. Much cheaper than (discrete) MOSFET’s.
Quieter than MOSFET’s.
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Low input bias current – like back biased diode. As low as 10pA.
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But note this doubles every 6 deg C! At high temps a JFET op amp can have more input current
than some bipolar op amps!
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Used in microphones, hearing aids and other high impedance sources (electret microphones
have very high output impedance) because of low noCSE and ruggedness compared to MOSFET’s.
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Fast. Used on many high speed scope probes. Was major advance in bias current and speed
over bipolar-input op amps. See data sheets of (JFET input) LF356 series and compare to then extant
bipolars.
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Downside is input capacitance can’t be as low as some BJT’s.
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Wide spread in threshold voltage and zero-Vgs current. Sometimes requires sorting and
selecting for a given circuit
15. Explain any three FET applications with circuit diagram (6 Marks)( June 2015)
Applications of FET:
1. Low NoCSE Amplifier. NoCSE is an undesirable disturbance super-imposed on a useful signal.
NoCSE interferes with the information contained in the signal; the greater the noCSE, the less the
information. For instance, the noCSE in radio-receivers develops crackling and hissing which
sometimes completely masks the voice or music.