Download High Pass Filter

High Pass Filter
Capacitor Z1 = -j/wC
Resistor Z2 = R2
Load resistor Z3 = R3
R2 and R3 in parallel – equivalent resistance R4 = (R2 R3)/(R2+R3)
We then have a simple voltage divider were
Vo = Vs . R / (R – j/wC) = Vs. R(R+j/wC) / (R^2 + (1/wC)^2)
|Vo/Vs| = Av = Vs . R / sqrt(R^2 + 1/(wC)^2)
low frequencuies: w to 0, 1/w to infinity Av to 0
Av = R / (1/wC)^2 = R (wC)^2
10log(Av) = 10 log(w^2 ) + …. = 20log(w) + ….
Graph Av (dB) vs log(f) : straight line segment with slope 20
high frequencies w to infinity Av to R/R = 1
When Av = 1/sqrt(2) since max gain is 1, then with some algebra w = 1/ sqrt(RC)
Control values R2 = R3 = 1000 ohms R = 500 ohms C = 1e-6 F
Cut-off frequency fo = 318 Hz
Phase
tan(angle) = imag/real
For low frequenceies: real part to 0 therefore tan(angle) to infinity hence angle to pi/2
For high frequencies: imag to 0 therefore angle to 0 circuit effectively becomes
resistive
RACHAEL OFFORD
SID:0002326 Instrumentation Question 5
* Firstly, just an explanation of the symbols used in my answer.
*
Xc=impedance of capacitor
Vs=voltage across source
Zr=impedance of the
resistor pair
Zc=impedance of capacitor
* In the high pass filter circuit, the resistor pair and the capacitor act like a voltage
divider.i.e. Vout=Zr/(Zc+Zr). When Zc decreases, the Vout approaches Vs. The
voltage gain (which is Vout/Vs) approaches 1 with increasing frequency. This is
because as frequency increases, Zc decreases, as given by, Zc=1/2(pi)fC.
* Similarly as the frequency reduces Zc increases and the gain reduces.
* In figure 1, this can be seen as on the graph of the control data the gain approaches 1
with increasing frequency. At low frequencies, the voltage gain falls off in inverse
proportion to the frequency. This is shown by the straight line segment with a slope
of 20 in figure 1. When different data is used (i.e. the test data) the capacitance is
double that of the control data. On this graph, we can see that this is a better high
pass filter. It is better because as the capacitance increases, Zc approaches zero
faster. This graph also approaches a voltage gain of 1.
* We know that Xc=1/(2pi)fC. C is fixed and therefore Xc is proportional to 1/f. We also
know that the Power=i^2R. From these, as the frequency increases, Xc decreases.
As this impedance has decreased, more current can pass through (i increases) and
thus Power also increases. Therefore power increases as the frequency increases.
* Also note that power is proportional to voltage (gain) squared. This explains the shape
of the power graphs and why they also approach a power gain of 1. i.e.the maximum
power gain is 1.
* Vout can be expressed as Vout=VsR/(R-jXc) where R=R2//R3. As the frequency
increases, -jXc approaches zero and therefore Vs approaches Vout. When the
frequency decreases, -jXc is high and so there is a noticeable phase shift.
* The circuit is called a high pass filter because it passes high frequency signals with less
attenuation than low frequency signals. This circuit does not have a sharp cut-off
frequency, but instead the attenuation changes gradually. This frequency, known as
the cut-off frequency is defined as f=1/2pi*(R1+R4/R1R4C2). This point (3dB point)
is the frequency where the voltage has fallen 3dB and also at this point the power is
1/2 the maximum power. For frequencies less than the cut-off frequency, the voltage
gain is essentially constant and independent of frequency and above this, the volatge
gain has a slope of 20.
* This circuit acts as a (passive) high pass filter but it does not have a well defined band
width or cut-off frequency.
X-Originating-IP: [129.78.64.5]
From: "Sam Campbell" <[email protected]>
To: [email protected], [email protected]
Subject: Assignment Question 5
Date: Mon, 30 Apr 2001 09:05:40 -0000
X-OriginalArrivalTime: 30 Apr 2001 09:05:41.0213 (UTC)
FILETIME=[BB0EA0D0:01C0D154]
%Matlab script looking at high pass filters.
%26 april 2001
%Sam Campbell
%SID 000 3982
%data
vso = 10;
fmin = 1;
fmax = 1e4;
num = 501;
% Control data
z1 = 1000;
c2 = 1e-6;
z3 = 1000;
% Test Data
option = menu('Choose which circuit component you would like to
test','C1','R2','R3');
if option == 1
z1t = 1000;
c2t = 2e-6;
z3t = 1000;
elseif option == 2
z1t = 2000;
c2t = 1e-6;
z3t = 1000;
elseif option == 3
z1t = 1000;
c2t = 1e-6;
z3t = 2000;
end
% Calculations
df = (fmax - fmin) / (num - 1);
f = fmin : df : fmax;
w = f .* (2*pi);
% Control Calculations
xc = 1 ./ (w .*c2);
z2 = -j*xc;
z4 = (z1 .* z3) ./ (z1 + z3);
z5 = z2 + z4 ;
i5 = vso ./ z5;
i2 = i5;
i4 = i5;
v3 = i4 .* z4;
v3db = real(20*log10(v3/vso));
phase3 = angle(v3)/pi;
power3 = abs( (v3 .^2) / z3);
% Test Calculations
xct = 1 ./ (w .* c2t);
z2t = -j*xct;
z4t = (z1t .* z3t);
z4t = z4t ./ (z1t + z3t);
z5t = z2t + z4t;
i5t = vso ./ z5t;
i2t = i5t;
i4t = i5t;
v3t = i4t .* z4t;
v3tdb = real (20*log10(v3t/vso));
phase3t = angle(v3t)/pi;
power3t = abs((v3t .^ 2) / z3t);
% Graphing
figure(1);
plot(log10(f),v3db);
hold on
plot(log10(f),v3tdb,'m');
grid on;
title('High Pass Filter - Gain vs log frequency');
xlabel('log(f)');
ylabel('Voltage gain Av (dB) ');
legend('V3 dB','V3 test dB');
figure(2);
plot(log10(f),phase3);
hold on
plot(log10(f),phase3t,'m');
grid on;
title('High Pass Filter - phase vs log frequency');
xlabel('log(f)');
ylabel('phase (in pi rad)');
legend('phase','test phase');
figure(3);
plot(log10(f),power3);
hold on
plot(log10(f),power3t,'m');
grid on;
title('High Pass Filter - power vs log frequency');
xlabel('log(f)');
ylabel('Pload (W) ');
legend('power','power test');
%
1.
%
%
When we double the capacitance of c1, we observe the following:
% *the graph of the gain is shifted towards lower frequencies, and attains
its maximum value for a lower frequecy.
%This is because as the capacitance increases the reactance decreases, and
so the effect is to allow the max gain reached
% to be reached at a lower frequency.
%
%*the graph of the phase of the output voltage is shifted towards lower
frequencies, but the end-points still coincide with
% the endpoints of the phase when c1 has its normal value.
% This is because
%
%*the graph of the power delivered to the load is shifted towards lower
frequencies, but has the same end-points for the
% normal value of c1.
% This is because the larger capacitance decreases the reactance, and thus
the 'resistance' the capacitor provides to the
% circuit is slightly less. This increases the voltage across R3 and thus
increases the power dissipated in R3.
%
%
%
%
%
2.
%
%We first DERIVE AN EXPRESSION FOR THE GAIN(where v0 is the voltage
over R3
(and R4)):
%
%
v0 / vso = Zr2r3 / (Ztot)
(by thevinin equivalent circuit theorem)
%
Ztot = Zr2r3 + Zc1
%
Ztot = Zr2r3 -j/wc
%
% so v0 / vso = Zr2r3 / (Zr2r3 -j/wc)
%
v0 / vso = Zr2r3 / (Zr2r3 -j/wc) * (Zr2r3 +j/wc) / (Zr2r3 +j/wc)
(remove
complex denominator)
%
v0 / vso = ( (Zr2r3)^2 + j*Zr2r3/wc ) / ((Zr2r3)^2 + 1/(wc)^2 )
%
%
Since this contains informaion about both the the magnitude and phase of
vo/vso, we find the magnitude alone
%
by multiplying through by the complex conjugate and taking the square
root. We omit this part due to the
%
difficulty in clearly expressing it this file. We find:
%
%
v0 / vso = ( ( (Zr2r3)^4 + (Zr2r3*wc)^2 ) / ( (Zr2r3)^4 + 2*(Zr2r3*wc)^2
+ (1/wc)^4 )
%
% So TO FIND THE MAX GAIN we take the limit as f tends to infinity (we note
that since w = 2*pi*f, w also tends to infinity):
%
%
v0 / vso = 1
% or in db:
%
20*log10(v0 / vso) = 0
%
% Which agree's with our plot of Gain vs log frequency.
%
%
% THE CUT OFF FREQUENCY:
%
% The cutoff frequency is defined as the frequency at which the gain is
equal to the maximum gain multplied by a factor of
% 1/(2^0.5). i.e
%
%
v0 / vso = 1/(2^0.5) * max gain
%as we have already seen, the maximum gain is 1, so
%
%
v0 / vso = 1/(2^0.5)
%
1/(2^0.5) = ( ( (Zr2r3)^4 + (Zr2r3*wc)^2 ) / ( (Zr2r3)^4 + 2*(Zr2r3*wc)^2
+ (1/wc)^4 )
%
% Upon simplifying, we find that:
%
%
f = 1 / (2*pi*Zr2r3*c)
%
% which evaluates to be 318.3099, or log10(f) = 2.5029
%
% This agrees well with our plots. For example, on the plot of gain vs log
frequency, log10(f) = 2.5 is the point at which
% the gain has almost attained its maximum value.
%
%
%
% MAX POWER:
%
% We note that at high frequencies the power dissipated in the capacitor is
zero. Hence the voltage across r3 equals the
% voltage across the source for high frequencies. We take the resistance of
the two resistors in parallel to be r4. Hence
%
%
V = IR
%
vso = Ir4
%
I = vso / (r4)
%
% and the resistance of the two resistors in parallel is
%
%
1 / r4 = 1 / r2 + 1 / r3
%
r4 = r2*r3 / (r2 + r3)
% and for r2 = r3 = 1000:
%
%
r4 = 500
% therefore:
%
%
I = 10 / 500
%
I = 1 / 50
%
% and so the current through each resistor is I / 2 = 1 / 100
%
% Therefore the max power dissipated in r3 is:
%
%
p = v*i
%
p = 10*(1/100)
%
p = 1/10 = 0.1
%
% This agrees exactly with the plot of power vs log frequency.
%
%
%
% SLOPE OF GAIN BELOW CUT - OFF FREQUENCY:
%
% Av (dB) = 20log10(1/(2^0.5)*(max gain))
(from the definition of the 3 dB
point)
%
% So the slope of the gain below the cut - off frequency is 20.
%
3.
%
% ADD COMENTS DISCUSSING THE BEHAVIOUR OF PASSIVE HIGH PASS
FILTERS
%
% At low frequencies the capacitor acts like a high resitance (since its
reactance is very large), so most of the input
% voltage will be across it, and so Vout (the voltage over the R2 & R3) will
be very small. Hence the power delivered
% to the load will also be very small (p = iv). Also, the gain will be very
small.
% At high frequencies the capacitor acts like a small resistance (since its
reactance is now very small), so most of the
% input voltage will appear across the resistor and Vout will be almost
equal to Vsource. So the power delivered to the
% load will attain its maximum value for high frequencies. Here the gain
(which is defined to be the ratio between Vout
% and Vsource will be very close to 1, or in dB, 0, which agrees well with
our plots.
% So in summary, this circuit passes high frequency input signals readily,
while blocking low frequency input signals.
%We can imagine how using several different types of filters together (ie
feeding the output of one filter into the input of
% another) we could select very accurately the frequencies we wish to pass.
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Physics 2901 (Instrumentation) Assignment Q5 by Patrick Leung
0018969
1.
For the graph 'Voltage Gain Av (dB) vs log10(f)' graph, at low frequencies, the
curves are straight lines (with a slope of 20). At high frequencies, the curves converge
to zero voltage gain. Moreover, the gain is larger for a larger capacitance.
Z4 = Z2*Z3 / ( Z2 + Z3 )
Z5 = Z1 + Z4
For high frequencies,
Av = (v3/vso)
= (i4*Z4) / (i4*Z5)
= (Z4/Z5)
= (Z4 / (Z1 + Z4))
= (Z4 / ( (-j /(w*C)) + Z4) )
Av (dB) = 20log10(v3/vso)
= 20log10(Z4 / ( (-j /(w*C)) + Z4) )
Since w = 2*pi*f,
w increases as f increases.
Therefore, (-j /(w*C)) is approximately equal to zero.
Hence, Av (dB) = 20log10(1) = 0.
For low frequencies,
Av = Z4 / ( (-j / w*C ) + Z4 )
= (w*C*Z4) / ((w*C*Z4) - j )
= ( (w*C*Z4)^2 + w*C*Z4*j ) / ( ( w*C*Z4 )^2 +1)
Since w*C*Z4 << 1, also (w*C*Z4)^2 << w*C*Z4*j
Av is approximately equal to w*C*Z4*j
so, abs(Av) = w*C*Z4
Av (dB) = 20log10(w*C*Z4)
= 20log10(f) + 20log10(2*pi*C*Z4)
= 20log10(f) + constant
Hence, the slope of the curve is 20.
Since Av (dB) = 20log10(Z4 / ( (-j /(w*C)) + Z4) ),
So the gain is larger (less negative) for a larger capacitance.
For the ‘phase vs log10(f)’ curve, the phase at the 3db point is 0.25 (pi rad),
which is pi/4 rad. This is because a capacitor has a phase difference between
the load voltage v3 and the supply voltage of positive 90 degrees.
For the ‘Pload vs log10(f)’ curve, the power is a half of the maximum power at
the 3dB point.
2.
From the graph of ‘Pload vs log10(f)’, the max power of the load = 0.1 (W),
half of this is 0.05(W) and from the control data curve, we can find that the
cut-off frequency is 10(2.5) = 316.23 Hz
From the graph of ‘Voltage gain Av (dB) vs log10(f)’, on the control data
curve, for the frequencies that are less than log10(f) = 2.5, the slope of the
curve is 20.
Eg. Slope of the curve = (-20 - (-30)) / (1.5-1) = 20
Recall that the fall of slope of the voltage gain curve is calculated to be 20 in
the previous question for either control data or test data with low frequencies.
This is consistent with the prediction by the theory whereas the low
frequencies, in this case means all frequencies less than log10(f) = 2.5.
From the graph of ‘phrase vs log10(f)’, with log10(f) = 2.5 for the control data,
the phrase difference is 0.25 pi rad. This is consistent with the prediction by
the theory.
3.
A high pass filter passes high frequency signals in the circuit with less
attenuation than low frequency signals.