UM-45MV 50mV DC Full Scale 4 1/2 DIGIT with 0.56” LEDs
... CN-PUSH/UM04 . Connector: Push-on Terminal Block, 9 to 36V DC/12 to 24 V AC$18 CN-PUSH/UM05 . Connector: Push-on Terminal Block, 5V DC . . . . . . . . . . . . . . . $18 CN-UM/ANLGC . . Connector: Pinout Changer to match Analogic AN20M02 etc . . $30 OP-N4SEAL/UM . NEMA 4 lens cover for UM Series mete ...
... CN-PUSH/UM04 . Connector: Push-on Terminal Block, 9 to 36V DC/12 to 24 V AC$18 CN-PUSH/UM05 . Connector: Push-on Terminal Block, 5V DC . . . . . . . . . . . . . . . $18 CN-UM/ANLGC . . Connector: Pinout Changer to match Analogic AN20M02 etc . . $30 OP-N4SEAL/UM . NEMA 4 lens cover for UM Series mete ...
Logical - Department of Computer Science
... • A transistor is a device that acts, depending on the voltage level of an input signal, either as a wire that conducts electricity or as a resistor that blocks the flow of electricity ...
... • A transistor is a device that acts, depending on the voltage level of an input signal, either as a wire that conducts electricity or as a resistor that blocks the flow of electricity ...
MAX3869 +3.3V, 2.5Gbps SDH/SONET Laser Driver with Current Monitors and APC General Description
... the device accepts a differential PECL clock signal for data retiming. When LATCH is high, the input data is synchronized by the clock signal. When LATCH is low, the input data is directly applied to the output stage. The output stage is composed of a high-speed differential pair and a programmable ...
... the device accepts a differential PECL clock signal for data retiming. When LATCH is high, the input data is synchronized by the clock signal. When LATCH is low, the input data is directly applied to the output stage. The output stage is composed of a high-speed differential pair and a programmable ...
FX3S Series
... 0.5 A/point The total load current of resistance loads per common terminal should be the following value. • 1 output point/common terminal: 0.5 A or less • 4 output points/common terminal: 0.8 A or less 12 W/24 V DC The total of inductive loads per common terminal should be the following value. • 1 ...
... 0.5 A/point The total load current of resistance loads per common terminal should be the following value. • 1 output point/common terminal: 0.5 A or less • 4 output points/common terminal: 0.8 A or less 12 W/24 V DC The total of inductive loads per common terminal should be the following value. • 1 ...
L6393
... the possibility to control the power stages using the PHASE signal to select the current direction in the bridge and the BRAKE signal to perform current slow decay on the low sides. From the point of view of the logic operations the two signals PHASE and BRAKE are completely equivalent, that means t ...
... the possibility to control the power stages using the PHASE signal to select the current direction in the bridge and the BRAKE signal to perform current slow decay on the low sides. From the point of view of the logic operations the two signals PHASE and BRAKE are completely equivalent, that means t ...
Basic Linear Amplifiers - benchmark
... lnverting Amplifiers DC output offset The remaining source of output offset is due to the op-amp’s input offset voltage, resulting from mismatches in the internal circuitry and fabrication of the op-amp. As shown for the inverting amplifier circuit of Fig. 2-7, the input offset voltage ,Voi, can be ...
... lnverting Amplifiers DC output offset The remaining source of output offset is due to the op-amp’s input offset voltage, resulting from mismatches in the internal circuitry and fabrication of the op-amp. As shown for the inverting amplifier circuit of Fig. 2-7, the input offset voltage ,Voi, can be ...
ADS1202 数据资料 dataSheet 下载
... 95dB dynamic range, operating from a single +5V supply. The differential inputs are ideal for direct connection to transducers or low-level signals. With the appropriate digital filter and modulator rate, the device can be used to achieve 16-bit analog-to-digital (A/D) conversion with no missing cod ...
... 95dB dynamic range, operating from a single +5V supply. The differential inputs are ideal for direct connection to transducers or low-level signals. With the appropriate digital filter and modulator rate, the device can be used to achieve 16-bit analog-to-digital (A/D) conversion with no missing cod ...
MAX1190 Dual 10-Bit, 120Msps, 3.3V, Low-Power ADC General Description
... The MAX1190 features parallel, CMOS-compatible threestate outputs. The digital output format can be set to two’s complement or straight offset binary through a single control pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing with various logic famil ...
... The MAX1190 features parallel, CMOS-compatible threestate outputs. The digital output format can be set to two’s complement or straight offset binary through a single control pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing with various logic famil ...
LMX2335/LMX2336/LMX2337 PLLatinum Dual Frequency Synthesizer for RF Personal Communications
... Several modes of operation can be programmed with bits R16–R20 including the phase detector polarity, charge pump tristate and the output of the FoLD pin. The prescaler and power down modes are selected with bits N19 and N20. The programmable modes are shown in Table 1. Truth table for the programma ...
... Several modes of operation can be programmed with bits R16–R20 including the phase detector polarity, charge pump tristate and the output of the FoLD pin. The prescaler and power down modes are selected with bits N19 and N20. The programmable modes are shown in Table 1. Truth table for the programma ...
PowerLab 30 Series Owner`s Guide
... Always check the status indicator on the front panel. It will always flash green each time the stimulator delivers a current pulse. A yellow flash indicates an ‘out-of-compliance’ (OOC) condition that may be due to the electrode contact drying up. Always ensure that there is good electrode contact ...
... Always check the status indicator on the front panel. It will always flash green each time the stimulator delivers a current pulse. A yellow flash indicates an ‘out-of-compliance’ (OOC) condition that may be due to the electrode contact drying up. Always ensure that there is good electrode contact ...
BD8143MUV : Power Management ICs
... parasitic elements. For example, when the resistors and transistors are connected to the pins as shown in below Fig.9, a parasitic diode or a transistor operates by inverting the pin voltage and GND voltage. The formation of parasitic elements as a result of the relationships of the potentials of di ...
... parasitic elements. For example, when the resistors and transistors are connected to the pins as shown in below Fig.9, a parasitic diode or a transistor operates by inverting the pin voltage and GND voltage. The formation of parasitic elements as a result of the relationships of the potentials of di ...
Analog Dialogue Volume 37, Part 2
... of these devices run at much lower voltages than the traditional 3.3 V or 5 V (for example, 1.2 V, 1.5 V, 1.8 V, and 2.5 V are common core-supply levels). Yet I/O protocols dictate that 3.3-V and 5-V supplies still be provided. In fact, some designs may require a 12-V supply; others need termination ...
... of these devices run at much lower voltages than the traditional 3.3 V or 5 V (for example, 1.2 V, 1.5 V, 1.8 V, and 2.5 V are common core-supply levels). Yet I/O protocols dictate that 3.3-V and 5-V supplies still be provided. In fact, some designs may require a 12-V supply; others need termination ...
MAX5152/MAX5153 Low-Power, Dual, 13-Bit Voltage-Output DACs with Configurable Outputs _______________General Description
... 16-pin QSOP and DIP packages. Access to the inverting input allows for specific gain configurations, remote sensing, and high output current capability, making these devices ideally suited for industrial process controls. These devices are also well suited for digitally programmable (4–20mA) current ...
... 16-pin QSOP and DIP packages. Access to the inverting input allows for specific gain configurations, remote sensing, and high output current capability, making these devices ideally suited for industrial process controls. These devices are also well suited for digitally programmable (4–20mA) current ...
DS1220AB/AD 16k Nonvolatile SRAM FEATURES PIN ASSIGNMENT
... 2. OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high-impedance state. 3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or CE going low to the earlier of CE or WE going high. 4. tDS is measured from the earlier of CE or WE ...
... 2. OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high-impedance state. 3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or CE going low to the earlier of CE or WE going high. 4. tDS is measured from the earlier of CE or WE ...
NB6L11S - 2.5 V 1:2 AnyLevel Input to LVDS Fanout Buffer / Translator
... Figure 4. Output Voltage Amplitude (VOUTPP) versus Input Clock Frequency (fin) and Temperature (@ VCC = 2.5 V) ...
... Figure 4. Output Voltage Amplitude (VOUTPP) versus Input Clock Frequency (fin) and Temperature (@ VCC = 2.5 V) ...
vxr15-2800s series
... low line. The voltage drop and the actual voltage at the input to the converter will determine the minimum source voltage at which the converter will operate. A high source inductance can interact with the feedback control loop of the converter. VPT’s EMI filters will typically isolate the source an ...
... low line. The voltage drop and the actual voltage at the input to the converter will determine the minimum source voltage at which the converter will operate. A high source inductance can interact with the feedback control loop of the converter. VPT’s EMI filters will typically isolate the source an ...
SN75LVDS32 数据资料 dataSheet 下载
... One of the most common problems with differential signaling applications is how the system responds when no differential voltage is present on the signal pair. The LVDS receiver is like most differential line receivers, in that its output logic state can be indeterminate when the differential input ...
... One of the most common problems with differential signaling applications is how the system responds when no differential voltage is present on the signal pair. The LVDS receiver is like most differential line receivers, in that its output logic state can be indeterminate when the differential input ...
DS1813 - Maxim Integrated
... The DS1813 EconoReset uses a precision temperature reference and comparator circuit to monitor the status of the power supply (VCC). When an out-of-tolerance condition is detected, an internal power-fail signal is generated which forces reset to the active state. When VCC returns to an in-tolerance ...
... The DS1813 EconoReset uses a precision temperature reference and comparator circuit to monitor the status of the power supply (VCC). When an out-of-tolerance condition is detected, an internal power-fail signal is generated which forces reset to the active state. When VCC returns to an in-tolerance ...
PNOZ X5 Data sheet
... – E-STOP pushbutton – Safety gate limit switch – Reset button – Light barriers ` LED indicator for: – Switch status channel 1/2 – Supply voltage ` See order reference for unit types ...
... – E-STOP pushbutton – Safety gate limit switch – Reset button – Light barriers ` LED indicator for: – Switch status channel 1/2 – Supply voltage ` See order reference for unit types ...
Transimpedance amplifier (140MHz)
... those produced by a laser diode. The maximum input current before output stage clipping occurs at typically 240µA. The SA5212A is a bipolar transimpedance amplifier which is current driven at the input and generates a differential voltage signal at the outputs. The forward transfer function is there ...
... those produced by a laser diode. The maximum input current before output stage clipping occurs at typically 240µA. The SA5212A is a bipolar transimpedance amplifier which is current driven at the input and generates a differential voltage signal at the outputs. The forward transfer function is there ...
HMC690 数据资料DataSheet下载
... designed for SONET OC-192 / SDH STM-64, 10GbE and 10Gbps systems employing optical amplifiers. It supports data rates up to 11.3 Gbps. This amplifier provides a differential output voltage that is proportional to an applied current at its input port. This current is typically provided by a photodiod ...
... designed for SONET OC-192 / SDH STM-64, 10GbE and 10Gbps systems employing optical amplifiers. It supports data rates up to 11.3 Gbps. This amplifier provides a differential output voltage that is proportional to an applied current at its input port. This current is typically provided by a photodiod ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.