MAX1875/MAX1876 Dual 180° Out-of-Phase PWM Step- Down Controllers with POR General Description
... Current-Limit Adjustment for Regulator 2 (REG2). The PGND–LX2 current-limit threshold defaults to 100mV if ILIM2 is connected to VL. Connect a resistor (RILIM2) from ILIM2 to GND to adjust the REG2’s current-limit threshold (VITH2) from 50mV (RILIM2 = 100kΩ) to 300mV (RILIM2 = 600kΩ). See the Settin ...
... Current-Limit Adjustment for Regulator 2 (REG2). The PGND–LX2 current-limit threshold defaults to 100mV if ILIM2 is connected to VL. Connect a resistor (RILIM2) from ILIM2 to GND to adjust the REG2’s current-limit threshold (VITH2) from 50mV (RILIM2 = 100kΩ) to 300mV (RILIM2 = 600kΩ). See the Settin ...
NB6L14M 2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
... operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. Measured by forcing VINPP (minimum) from a 50% duty cycle clock sou ...
... operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. Measured by forcing VINPP (minimum) from a 50% duty cycle clock sou ...
isscc 2013 / session 24 / energy
... The proposed IRC is applied to a 0.37V near-Vt adder array. Fig. 24.9.3(b) shows a block diagram of a test chip. 32 arrays of 32b adders are implemented with input/output latches. The critical path of each adder is 110 FO4 inverter delays. In IRC, static CMOS latches, instead of flip-flops, are used ...
... The proposed IRC is applied to a 0.37V near-Vt adder array. Fig. 24.9.3(b) shows a block diagram of a test chip. 32 arrays of 32b adders are implemented with input/output latches. The critical path of each adder is 110 FO4 inverter delays. In IRC, static CMOS latches, instead of flip-flops, are used ...
±15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers General Description Features
... Theory of Operation The MAX6816/MAX6817/MAX6818 are designed to eliminate the extraneous level changes that result from interfacing with mechanical switches (switch bounce). Virtually all mechanical switches bounce upon opening or closing. These switch debouncers remove bounce when a switch opens or ...
... Theory of Operation The MAX6816/MAX6817/MAX6818 are designed to eliminate the extraneous level changes that result from interfacing with mechanical switches (switch bounce). Virtually all mechanical switches bounce upon opening or closing. These switch debouncers remove bounce when a switch opens or ...
MAX5102 +2.7V to +5.5V, Low-Power, Dual, Parallel General Description
... peak values between 0 and VDD. The voltage at REF sets the full-scale output voltage for the DAC. The output voltage (VOUT) for any DAC is represented by a digitally programmable voltage source as follows: ...
... peak values between 0 and VDD. The voltage at REF sets the full-scale output voltage for the DAC. The output voltage (VOUT) for any DAC is represented by a digitally programmable voltage source as follows: ...
MAX8556/MAX8557 4A Ultra-Low-Input-Voltage LDO
... when the regulator output is within ±10% of its nominal output voltage. If the output voltage falls/rises outside this range or the IC experiences thermal fault, POK is internally pulled low. This open-drain output requires an external pullup resistor to VIN or another logic supply below 3.6V. For g ...
... when the regulator output is within ±10% of its nominal output voltage. If the output voltage falls/rises outside this range or the IC experiences thermal fault, POK is internally pulled low. This open-drain output requires an external pullup resistor to VIN or another logic supply below 3.6V. For g ...
Best Practices for Grounding Your Electrical Equipment
... We are being careful to discern input Return from earth ground, as Return may or may not also connect to earth ground. In Figure 1B, we see that the low input or minus lead could be fixed to a common reference point other than measurement Return. That is, the single-ended input might reference to a ...
... We are being careful to discern input Return from earth ground, as Return may or may not also connect to earth ground. In Figure 1B, we see that the low input or minus lead could be fixed to a common reference point other than measurement Return. That is, the single-ended input might reference to a ...
Evaluates: MAX1562/MAX1562H/MAX1563 MAX1563 Evaluation Kit General Description Features
... while the MAX1562H’s ON pin is active high. Access the ON pin through JU3 or the pad labeled ON2. See Tables 3 and 4 for ON shunt positions. ...
... while the MAX1562H’s ON pin is active high. Access the ON pin through JU3 or the pad labeled ON2. See Tables 3 and 4 for ON shunt positions. ...
ADS8402 数据资料 dataSheet 下载
... Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. ...
... Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. ...
Adv LinCMOS High-Speed 8-Bit A-to
... The recommended analog input voltage range for conversion is – 0.1 V to VCC + 0.1 V. Analog input signals that are less than Vref – + 1/2 LSB or greater than Vref+ – 1/2 LSB convert to 00000000 or 11111111, respectively. The reference inputs are fully differential with common-mode limits defined by ...
... The recommended analog input voltage range for conversion is – 0.1 V to VCC + 0.1 V. Analog input signals that are less than Vref – + 1/2 LSB or greater than Vref+ – 1/2 LSB convert to 00000000 or 11111111, respectively. The reference inputs are fully differential with common-mode limits defined by ...
Chapter 8
... device that amplifies the difference between two input voltages. Operational amplifiers are characterized by near-infinite input resistance and very small output resistance. As shown in Figure 8.4, the output of the op-amp is an amplified version of the difference between the voltages present at the ...
... device that amplifies the difference between two input voltages. Operational amplifiers are characterized by near-infinite input resistance and very small output resistance. As shown in Figure 8.4, the output of the op-amp is an amplified version of the difference between the voltages present at the ...
LM193/LM293/LM393/LM2903 Low Power Low Offset Voltage Dual
... the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (o ...
... the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (o ...
AD630 数据手册DataSheet 下载
... and the faster the output signal will move. This feature helps ensure rapid, symmetric settling when switching between inverting and noninverting closed loop configurations. The output section of the AD630 includes a current mirrorload (Q24 and Q25), an integrator-voltage gain stage (Q32), and a com ...
... and the faster the output signal will move. This feature helps ensure rapid, symmetric settling when switching between inverting and noninverting closed loop configurations. The output section of the AD630 includes a current mirrorload (Q24 and Q25), an integrator-voltage gain stage (Q32), and a com ...
SP526 数据资料DataSheet下载
... The SP526 is a monolithic device that supports three (3) physical layer serial interface standards. The SP526 is fabricated using a low power BiCMOS process technology, and incorporates four (4) drivers and four (4) receivers can be configured via software for the selected interface modes at any tim ...
... The SP526 is a monolithic device that supports three (3) physical layer serial interface standards. The SP526 is fabricated using a low power BiCMOS process technology, and incorporates four (4) drivers and four (4) receivers can be configured via software for the selected interface modes at any tim ...
TLC3702-Q1 Dual Micropower LinCMOS(TM) Voltage Comparators
... recommended common-mode input voltage range and activate the input protection circuit. Even under normal operation, these conditions occur during circuit power up or power down, and in many cases, when the device is being used for a signal conditioning function. The input voltages can exceed VICR an ...
... recommended common-mode input voltage range and activate the input protection circuit. Even under normal operation, these conditions occur during circuit power up or power down, and in many cases, when the device is being used for a signal conditioning function. The input voltages can exceed VICR an ...
FNA40860 Motion SPM 45 Series FNA40860 Motio
... fully-featured, high-performance inverter output stage for AC Induction, BLDC, and PMSM motors. These modules integrate optimized gate drive of the built-in IGBTs to minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts, over-current sh ...
... fully-featured, high-performance inverter output stage for AC Induction, BLDC, and PMSM motors. These modules integrate optimized gate drive of the built-in IGBTs to minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts, over-current sh ...
315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic Range General Description Features
... frequency range. Its signal range is from -114dBm to 0dBm. With few external components and a low-current power-down mode, it is ideal for cost- and power-sensitive applications typical in the automotive and consumer markets. The chip consists of a low-noise amplifier (LNA), a fully differential ima ...
... frequency range. Its signal range is from -114dBm to 0dBm. With few external components and a low-current power-down mode, it is ideal for cost- and power-sensitive applications typical in the automotive and consumer markets. The chip consists of a low-noise amplifier (LNA), a fully differential ima ...
In the project “Car Parking System”
... A bridge rectifier can be made using four individual diodes, but it is also available in special packages containing the four diodes required. It is called a full-wave rectifier because it uses all AC wave (both positive and negative sections). 1.4V is used up in the bridge rectifier because each di ...
... A bridge rectifier can be made using four individual diodes, but it is also available in special packages containing the four diodes required. It is called a full-wave rectifier because it uses all AC wave (both positive and negative sections). 1.4V is used up in the bridge rectifier because each di ...
ADS1605 数据资料 dataSheet 下载
... and passband ripple is less than ±0.0025dB (to 2.2MHz). Both devices offer the same outstanding performance at these speeds with a signal-to-noise ratio up to 88dB, total harmonic distortion down to −99dB, and a spurious-free dynamic range up to 101dB. For even higher-speed operation, the data rate ...
... and passband ripple is less than ±0.0025dB (to 2.2MHz). Both devices offer the same outstanding performance at these speeds with a signal-to-noise ratio up to 88dB, total harmonic distortion down to −99dB, and a spurious-free dynamic range up to 101dB. For even higher-speed operation, the data rate ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.