MAX1661/MAX1662/MAX1663 ________________General Description ____________________________Features
... power MOSFETs in power-plane switching applications. These small, low-cost devices can be used on a system motherboard to control point-of-load switching from a 2wire SMBus™ serial interface. Each device has three highvoltage open-drain outputs that double as TTL-level logic inputs, giving them bidi ...
... power MOSFETs in power-plane switching applications. These small, low-cost devices can be used on a system motherboard to control point-of-load switching from a 2wire SMBus™ serial interface. Each device has three highvoltage open-drain outputs that double as TTL-level logic inputs, giving them bidi ...
Evolution of Polymorphic Self-Checking Circuits
... The use of self-checking circuits is important to various applications nowadays. As it is assumed that fault-tolerance issues will be more important in the era of nanoelectronics, the use of this type of circuits will certainly grow. Self-checking circuits are conventionally constructed by adding ch ...
... The use of self-checking circuits is important to various applications nowadays. As it is assumed that fault-tolerance issues will be more important in the era of nanoelectronics, the use of this type of circuits will certainly grow. Self-checking circuits are conventionally constructed by adding ch ...
IOSR Journal of VLSI and Signal Processing (IOSR-JVSP)
... PMOS-latches and inverters which are used by means of Complementary Pass Transistor logic. Double passtransistor logic (DPL) uses both PMOS and NMOS devices in the pass-transistor network to avoid non full swing problems, but it has high-area and high-power drawbacks [5]. 2.1.2 Swing Restored Pass T ...
... PMOS-latches and inverters which are used by means of Complementary Pass Transistor logic. Double passtransistor logic (DPL) uses both PMOS and NMOS devices in the pass-transistor network to avoid non full swing problems, but it has high-area and high-power drawbacks [5]. 2.1.2 Swing Restored Pass T ...
MAX11190 4-Channel, Dual, Simultaneous Sampling, 3mm x 3mm TQFN Package
... The device features two dual, single-ended analog inputs connected to two ADC cores using 2:1 MUXs. The device also includes a separate supply input for data interface and dedicated inputs for reference voltage. This device operates from a 2.2V to 3.6V supply and consumes only 10.5mW at 3Msps. The d ...
... The device features two dual, single-ended analog inputs connected to two ADC cores using 2:1 MUXs. The device also includes a separate supply input for data interface and dedicated inputs for reference voltage. This device operates from a 2.2V to 3.6V supply and consumes only 10.5mW at 3Msps. The d ...
Digital Systems Topic 2: Logic Gates and Families: Definitions and Characteristics
... Bs,” IOL increases, causing the output voltage to increase (because the voltage across D is increasing). This will cause Vo to rise, possibly above an ...
... Bs,” IOL increases, causing the output voltage to increase (because the voltage across D is increasing). This will cause Vo to rise, possibly above an ...
MAX5436–MAX5439 ±15V, 128-Tap, Low-Drift Digital Potentiometers General Description Features
... the wiper position. This write-only interface contains three inputs: chip select (CS), data in (DIN), and serial clock (SCLK). When CS is taken low, data from DIN is synchronously loaded into the serial shift register on the rising edge of each SCLK pulse (Figure 2). The 8-bit data word requires 8 c ...
... the wiper position. This write-only interface contains three inputs: chip select (CS), data in (DIN), and serial clock (SCLK). When CS is taken low, data from DIN is synchronously loaded into the serial shift register on the rising edge of each SCLK pulse (Figure 2). The 8-bit data word requires 8 c ...
MAX8556/MAX8557 4A Ultra-Low-Input-Voltage LDO Regulators General Description
... when the regulator output is within ±10% of its nominal output voltage. If the output voltage falls/rises outside this range or the IC experiences thermal fault, POK is internally pulled low. This open-drain output requires an external pullup resistor to VIN or another logic supply below 3.6V. For g ...
... when the regulator output is within ±10% of its nominal output voltage. If the output voltage falls/rises outside this range or the IC experiences thermal fault, POK is internally pulled low. This open-drain output requires an external pullup resistor to VIN or another logic supply below 3.6V. For g ...
Backplane Interconnection
... circuit board [PCB]) that connects several connectors in parallel to each other, so that each pin of each connector is linked to the same relative pin of all the other connectors, forming a computer bus. ...
... circuit board [PCB]) that connects several connectors in parallel to each other, so that each pin of each connector is linked to the same relative pin of all the other connectors, forming a computer bus. ...
2-wire digital communication
... The clock shall have self–diagnostic capabilities for protocol detection, last received communication time and a comprehensive analysis of the entire clock. The clock will be capable of having remote diagnostic capabilities from the master clock location. The clock shall have automatic polarity dete ...
... The clock shall have self–diagnostic capabilities for protocol detection, last received communication time and a comprehensive analysis of the entire clock. The clock will be capable of having remote diagnostic capabilities from the master clock location. The clock shall have automatic polarity dete ...
Evaluates: MAX3680 MAX3680 Evaluation Kit _______________General Description ____________________________Features
... inputs, connect the inputs directly to the SMA connectors labeled PCLK and PD0–PD7. This configuration forms a 50-to-1 voltage divider that maintains a highimpedance load to each TTL output while interfacing to 50Ω. To interface to high-impedance inputs, connect the inputs to the 2-pin headers at R9 ...
... inputs, connect the inputs directly to the SMA connectors labeled PCLK and PD0–PD7. This configuration forms a 50-to-1 voltage divider that maintains a highimpedance load to each TTL output while interfacing to 50Ω. To interface to high-impedance inputs, connect the inputs to the 2-pin headers at R9 ...
HEF4046B Phase-locked loop
... Phase comparator 2 is an edge-controlled digital memory network. It consists of four flip-flops, control gating and a 3-state output circuit comprising p and n-type drivers with a common output node. When the p-type or n-type drivers are ON, they pull the output up to VDD or down to VSS respectively ...
... Phase comparator 2 is an edge-controlled digital memory network. It consists of four flip-flops, control gating and a 3-state output circuit comprising p and n-type drivers with a common output node. When the p-type or n-type drivers are ON, they pull the output up to VDD or down to VSS respectively ...
MAX698/MAX699 Low-Cost, Power-On Reset and Watchdog Controllers General Description
... eliminating all external components and adjustments. The MAX699 includes all features of the MAX698, but also provides a watchdog input to monitor microprocessor activity. The RESET output goes low if the watchdog input (WDI) is not toggled within 1 second. The watchdog feature can be disabled by le ...
... eliminating all external components and adjustments. The MAX699 includes all features of the MAX698, but also provides a watchdog input to monitor microprocessor activity. The RESET output goes low if the watchdog input (WDI) is not toggled within 1 second. The watchdog feature can be disabled by le ...
CH340 datasheet
... 7.1. USB convert 9-wire serial interface (the following image) The following image is using CH340T to realize USB convert RS232 serial interface. CH340 supplies common serial interface signal and MODEM signal, changes TTL serial interface to RS232 serial interface through level convert circuit U8. E ...
... 7.1. USB convert 9-wire serial interface (the following image) The following image is using CH340T to realize USB convert RS232 serial interface. CH340 supplies common serial interface signal and MODEM signal, changes TTL serial interface to RS232 serial interface through level convert circuit U8. E ...
STMICROELECTRONICS M27C2 datasheet
... The ES mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M27C256B. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M27C256B, with VCC = VPP = 5V. Two identifier bytes may then be sequenced from ...
... The ES mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M27C256B. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M27C256B, with VCC = VPP = 5V. Two identifier bytes may then be sequenced from ...
Deney4
... uncontrolled rectifier uses diodes, while a full-controlled rectifier uses thyristor. A half controlled rectifier uses both. Half-Wave Rectifier In practice, the half-wave rectifier is used most often in low-power applications because the average current in the supply will not be zero. While practic ...
... uncontrolled rectifier uses diodes, while a full-controlled rectifier uses thyristor. A half controlled rectifier uses both. Half-Wave Rectifier In practice, the half-wave rectifier is used most often in low-power applications because the average current in the supply will not be zero. While practic ...
MADR-009443-000100 Quad Driver for GaAs FET or PIN Diode Switches and Attenuators
... the current setting resistor (R1 & R2), additional spiking current can be achieved. To achieve the Non-Inverting and Inverting complementary voltages, each output is switched between two internal FETs. The FETs are connected to VOPT for the positive output and VEE for the negative output. VOPT and V ...
... the current setting resistor (R1 & R2), additional spiking current can be achieved. To achieve the Non-Inverting and Inverting complementary voltages, each output is switched between two internal FETs. The FETs are connected to VOPT for the positive output and VEE for the negative output. VOPT and V ...
Nyquist Rate Analog-to-Digital Converters
... Vref. Vx goes to –Vin + Vref/2. If Vx is negative, then Vin is greater than Vref/2 and the MSB capacitor is left connected to Vref. Otherwise the MSB capacitor is disconnected and the same procedure is repeated N times until the LSB capacitor has been ...
... Vref. Vx goes to –Vin + Vref/2. If Vx is negative, then Vin is greater than Vref/2 and the MSB capacitor is left connected to Vref. Otherwise the MSB capacitor is disconnected and the same procedure is repeated N times until the LSB capacitor has been ...
MAX7328/MAX7329 I C Port Expanders with Eight I/O Ports 2
... pulse may be lost (or very short) due to the resetting of the interrupt during this pulse. Each change of the I/Os after resetting is detected and, after the next rising clock edge, is transmitted as INT. ...
... pulse may be lost (or very short) due to the resetting of the interrupt during this pulse. Each change of the I/Os after resetting is detected and, after the next rising clock edge, is transmitted as INT. ...
PTH04070W: 3-A 3.3/5.5-V Input Adjustable
... regulator. When placed at the output their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed 200 μF. Also, to prevent the formation of local resonances, do not place more than three identical ceramic capacitors with values of 10 μF or greater in parallel. ...
... regulator. When placed at the output their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed 200 μF. Also, to prevent the formation of local resonances, do not place more than three identical ceramic capacitors with values of 10 μF or greater in parallel. ...
10-Bit, 210 MSPS TxDAC Digital-to-Analog Converter AD9740W
... Excellent spurious-free dynamic range performance SNR at 5 MHz output, 125 MSPS: 65 dB Twos complement or straight binary data format Differential current outputs: 2 mA to 20 mA Power dissipation: 135 mW at 3.3 V Power-down mode: 15 mW at 3.3 V On-chip 1.2 V reference CMOS-compatible digital interfa ...
... Excellent spurious-free dynamic range performance SNR at 5 MHz output, 125 MSPS: 65 dB Twos complement or straight binary data format Differential current outputs: 2 mA to 20 mA Power dissipation: 135 mW at 3.3 V Power-down mode: 15 mW at 3.3 V On-chip 1.2 V reference CMOS-compatible digital interfa ...
MAX16945 30mA Inverting Charge Pump in SOT23 for EMI-Sensitive Automotive Applications General Description
... ROUT = NUMBER OF DEVICES ...
... ROUT = NUMBER OF DEVICES ...
MAX1082/MAX1083 300ksps/400ksps, Single-Supply, 4-Channel, Serial 10-Bit ADCs with Internal Reference General Description
... The MAX1082/MAX1083 10-bit analog-to-digital converters (ADCs) combine a 4-channel analog-input multiplexer, high-bandwidth track/hold (T/H), and serial interface with high conversion speed and low power consumption. The MAX1082 operates from a single +4.5V to +5.5V supply; the MAX1083 operates from ...
... The MAX1082/MAX1083 10-bit analog-to-digital converters (ADCs) combine a 4-channel analog-input multiplexer, high-bandwidth track/hold (T/H), and serial interface with high conversion speed and low power consumption. The MAX1082 operates from a single +4.5V to +5.5V supply; the MAX1083 operates from ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.